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2008-06-26arm: convert to generic helpers for IPI function callsJens Axboe1-0/+3
This converts arm to use the new helpers for smp_call_function() and friends, and adds support for smp_call_function_single(). Fixups and testing done by Catalin Marinas <[email protected]> Cc: Russell King <[email protected]> Signed-off-by: Jens Axboe <[email protected]>
2008-06-23ftrace: store mcount address in rec->ipAbhishek Sagar1-0/+14
Record the address of the mcount call-site. Currently all archs except sparc64 record the address of the instruction following the mcount call-site. Some general cleanups are entailed. Storing mcount addresses in rec->ip enables looking them up in the kprobe hash table later on to check if they're kprobe'd. Signed-off-by: Abhishek Sagar <[email protected]> Cc: [email protected] Cc: Steven Rostedt <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2008-06-22[ARM] add Marvell 78xx0 ARM SoC supportStanislav Samsonov12-0/+436
The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring (depending on the model) one or two Feroceon CPU cores with 512K of L2 cache and VFP coprocessors running at (depending on the model) between 800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe interfaces that can each run either in x4 or quad x1 mode, three USB 2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI interface, four UARTs, and depending on the model, two or four gigabit ethernet interfaces. This patch adds basic support for the platform, and allows booting on the MV78x00 development board, with functional UARTs, SATA, PCIe, GigE and USB ports. Signed-off-by: Stanislav Samsonov <[email protected]> Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] Orion: PCIe x4/x1 detection supportLennert Buytenhek1-0/+1
The Discovery Duo (MV78xx0) has two x4 PCIe ports which can either be used in x4 mode or in quad x1 mode. This patch adds an accessor function to the generic plat-orion PCIe handling code to detect in which of the two modes we're running (which is determined by strap pins and/or configured by the bootloader). Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] add Marvell Kirkwood (88F6000) SoC supportSaeed Bishara12-0/+384
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface, a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS interface, and IDMA/XOR engines, and depending on the model, also features one or two Gigabit Ethernet interfaces, two SATA II interfaces, one or two TWSI interfaces, one or two UARTs, a TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and an SDIO interface. This patch adds supports for the Marvell DB-88F6281-BP Development Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs, enabling support for the PCIe interface, the USB interface, the ethernet interfaces, the SATA interfaces, the TWSI interfaces, the UARTs, and the NAND controller. Signed-off-by: Saeed Bishara <[email protected]> Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] Feroceon: L2 cache supportLennert Buytenhek2-0/+41
This patch adds support for the unified Feroceon L2 cache controller as found in e.g. the Marvell Kirkwood and Marvell Discovery Duo families of ARM SoCs. Note that: - Page table walks are outer uncacheable on Kirkwood and Discovery Duo, since the ARMv5 spec provides no way to indicate outer cacheability of page table walks (specifying it in TTBR[4:3] is an ARMv6+ feature). This requires adding L2 cache clean instructions to proc-feroceon.S (dcache_clean_area(), set_pte()) as well as to tlbflush.h ({flush,clean}_pmd_entry()). The latter case is handled by defining a new TLB type (TLB_FEROCEON) which is almost identical to the v4wbi one but provides a TLB_L2CLEAN_FR flag. - The Feroceon L2 cache controller supports L2 range (i.e. 'clean L2 range by MVA' and 'invalidate L2 range by MVA') operations, and this patch uses those range operations for all Linux outer cache operations, as they are faster than the regular per-line operations. L2 range operations are not interruptible on this hardware, which avoids potential livelock issues, but can be bad for interrupt latency, so there is a compile-time tunable (MAX_RANGE_SIZE) which allows you to select the maximum range size to operate on at once. (Valid range is between one cache line and one 4KiB page, and must be a multiple of the line size.) Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] Feroceon: L1 cache range operation supportStanislav Samsonov1-5/+1
This patch adds support for the L1 D cache range operations that are supported by the Marvell Discovery Duo and Marvell Kirkwood ARM SoCs. Signed-off-by: Stanislav Samsonov <[email protected]> Acked-by: Saeed Bishara <[email protected]> Reviewed-by: Nicolas Pitre <[email protected]> Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] add Marvell Loki (88RC8480) SoC supportLennert Buytenhek12-0/+361
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU core running at between 400 MHz and 1.0 GHz, and features a 64 bit DDR controller, 512K of internal SRAM, two x4 PCI-Express ports, two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs, two TWSI controllers, and IDMA/XOR engines. This patch adds support for the Marvell LB88RC8480 Development Board, enabling the use of the PCIe interfaces, the ethernet interfaces, the TWSI interfaces and the UARTs. Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] Orion: add a separate BRIDGE_INT_TIMER1_CLR defineKe Wei1-0/+1
Some Feroceon-based SoCs have an MBUS bridge interrupt controller that requires writing a one instead of a zero to clear edge interrupt sources such as timer expiry. This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform. Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] Orion: nuke orion5x_{read,write}Lennert Buytenhek1-5/+2
Nuke the Orion-specific orion5x_{read,write} wrappers. Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] Orion: use linux/serial_reg.h for Orion uncompress.hLennert Buytenhek1-7/+22
Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-22[ARM] Orion: add 88F5181L (Orion-VoIP) supportLennert Buytenhek1-2/+4
Signed-off-by: Lennert Buytenhek <[email protected]> Acked-by: Russell King <[email protected]>
2008-06-22[ARM] Orion: delete unused IO_SPACE_REMAP defineLennert Buytenhek1-1/+0
This define isn't used anywhere in the kernel tree -- nuke it. Signed-off-by: Lennert Buytenhek <[email protected]> Acked-by: Russell King <[email protected]>
2008-06-22[ARM] cache align destination pointer when copying memory for some processorsNicolas Pitre1-0/+15
The implementation for memory copy functions on ARM had a (disabled) provision for aligning the source pointer before loading registers with data. Turns out that aligning the _destination_ pointer is much more useful, as the read side is already sufficiently helped with the use of preload. So this changes the definition of the CALGN() macro to target the destination pointer instead, and turns it on for Feroceon processors where the gain is very noticeable. Signed-off-by: Nicolas Pitre <[email protected]> Signed-off-by: Lennert Buytenhek <[email protected]>
2008-06-16Merge branch 'linus' into tracing/ftraceIngo Molnar14-25/+42
2008-06-15[ARM] 5082/1: pxa: Definition for the third USB port control register UP3OCRStefan Schmidt1-0/+1
This adds the definition for the third USB port control register UP3OCR. It is used on the EZX GSM mobile phones. Signed-off-by: Stefan Schmidt <[email protected]> Acked-by: Eric Miao <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-12[ARM] 5091/1: Add missing bitfield include to regs-lcd.hStefan Schmidt1-1/+4
Macros like Fld() or FShft used in regs-lcd.h are defined in bitfield.h, but the latter is not included. Also fix one whitespace issue while being there. Signed-off-by: Antonio Ospite <[email protected]> Signed-off-by: Stefan Schmidt <[email protected]> Acked-by: Eric Miao <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-07[MTD] [NAND] rename at91_nand -> atmel_nand: internal symbolsHåvard Skinnemoen1-2/+2
This is basically s/at91_nand/atmel_nand/g with some manual inspection. Signed-off-by: Håvard Skinnemoen <[email protected]> Signed-off-by: David Woodhouse <[email protected]>
2008-06-07[MTD] [NAND] rename at91_nand -> atmel_nand: file names and KconfigHåvard Skinnemoen1-38/+0
The AT91 NAND driver needs just a few tiny modifications to work on AVR32 as well. Rename it atmel_nand to reflect this. Also move the ECC register definitions into drivers/mtd/nand since they are only useful to the atmel_nand driver, and get rid of the useless filename at the top of each file. Signed-off-by: Håvard Skinnemoen <[email protected]> Signed-off-by: David Woodhouse <[email protected]>
2008-06-02[ARM] pxa: separate out power manager and clock registersRussell King3-156/+165
The power manager and core clock registers aren't present in PXA3 CPUs. Move them out of pxa-regs.h into pxa2xx-regs.h, and include pxa2xx-regs.h where necessary. Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 4940/1: AT91: UDPHS driver: SAM9RL board and cpu integration.Nicolas Ferre1-1/+1
Adds support for the USB High Speed Device Port on the AT91SAM9RL system on chip. The AT91SAM9RL uses the same UDPHS IP as the AVR32 and the AT91CAP9 (atmel_usba_udc driver). Signed-off-by: Nicolas Ferre <[email protected]> Acked-by: Andrew Victor <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 4934/1: AT91CAP9 UDPHS driver: board and cpu integration.Stelian Pop2-1/+6
This is patch 2 of 2 adding support for the USB High Speed Device Port on the AT91CAP9 system on chip. The AT91CAP9 uses the same UDPHS IP as the AVR32 and the AT91SAM9RL. This patch declares the UDPHS ressources in the at91cap9 (cpu and adk board) files, wires up the atmel_usba_udc driver to them, and activates the driver in the defconfig. Signed-off-by: Stelian Pop <[email protected]> Acked-by: Haavard Skinnemoen <[email protected]> Acked-by: Andrew Victor <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 4933/1: AT91CAP9 UDPHS driver: generic AT91 parts.Stelian Pop2-1/+10
This is patch 1 of 2 adding support for the USB High Speed Device Port on the AT91CAP9 system on chip. The AT91CAP9 uses the same UDPHS IP as the AVR32 and the AT91SAM9RL. This patch makes the generic AT91 adaptations, mainly dealing with the addition of the UDPHS UTMI clock. Signed-off-by: Stelian Pop <[email protected]> Acked-by: Haavard Skinnemoen <[email protected]> Acked-by: Andrew Victor <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 5057/1: [AT91] Calao Systems - board filesAndrew Victor1-1/+16
Add support for three AT91-based boards available from Calao Systems: USB_A9260, USB_A9263 and QIL_A9260. Signed-off-by: Grégory Hermant <[email protected]> Signed-off-by: Andrew Victor <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 5074/1: fix warning: missing terminating ' characterDmitry Baryshkov1-1/+1
Signed-off-by: Dmitry Baryshkov <[email protected]> Acked-by: Richard Purdie <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 5067/1: _raw_write_can_lock macro bugfixsurinder1-1/+1
The current __raw_write_can_lock macro tests whether the lock can be locked by checking if it is equal to 0x80000000, whereas the lock should be lockable if its value is 0 i.e. unlocked state is represented by 0. Hence the macro should test the value of lock against 0 and not 0x80000000. Signed-off-by: Surinder Pal Singh <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 5070/1: pxa: add GPIO104_PSKTSEL to pxa27x MFP configurationPhilipp Zabel1-0/+1
PSKTSEL can be routed to GPIO pin 104. This configuration is used by HP iPAQ hx4700. Signed-off-by: Philipp Zabel <[email protected]> Acked-by: Jrgen Schindele <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02[ARM] 5068/1: PXA2xx Additional gpio definitionsJonathan Cameron1-0/+9
Some additional alternate gpio definitions relating to FFUART and USB on the pxa27x. These are used on the xbow imote2 platform. Signed-off-by: Jonathan Cameron <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-02ftrace: export kretprobe_trampoline for function tracerAbhishek Sagar1-0/+1
Follow suit from kprobe implementations on other archs and make kretprobe_trampoline non-static. Ftrace implmentation (more specifically, kernel/trace/trace.c) requires access to it (see-> http://kerneltrap.org/mailarchive/linux-kernel/2008/5/27/1955234). Signed-off-by: Abhishek Sagar <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2008-06-01[ARM] 5060/1: remove unnecessary include of asm/io.hGreg Ungerer1-1/+0
Remove unnecessary include of asm/io.h. Signed-off-by: Greg Ungerer <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-06-01[ARM] fix AT91 include loopsRussell King1-2/+0
AT91 has one include loop in its header files: include/asm-arm/io.h <- include/asm-arm/arch-at91/io.h <- include/asm-arm/io.h Circular include dependencies are dangerous since they can result in inconsistent definitions being provided to other code, especially if '#ifndef' constructs are used. Solve this by removing the offending includes. Built tested using my AT91 configuration. Acked-by: Andrew Victor <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-30Merge branch 'atags' into for-rmkUwe Kleine-König1-2/+0
2008-05-30ns9xxx: fix assembler version of __REG2 to be consistent with the C versionUwe Kleine-König1-2/+2
It's not very critical because __REG2 isn't used in assembler code currently. Additionally some white space noise is fixed. Signed-off-by: Uwe Kleine-König <[email protected]>
2008-05-30There is no need to have BOOT_PARAMS_SIZE known outside of atags.cUwe Kleine-König1-2/+0
atags.c was the only user of KEXEC_BOOT_PARAMS_SIZE and kexec.h was only included to get that definition. Signed-off-by: Uwe Kleine-König <[email protected]> Acked-by: Uli Luckas <[email protected]>
2008-05-23[ARM] fix OMAP include loopsRussell King4-4/+1
OMAP has two include loops in its header files: asm-arm/hardware.h <- asm-arm/arch-omap/io.h <- asm-arm/arch-omap/hardware.h <- asm-arm/hardware.h asm-arm/arch-omap/board-palmte.h <- asm-arm/arch-omap/hardware.h <- asm-arm/hardware.h <- asm-arm/arch-omap/gpio.h <- asm-arm/arch-omap/board-palmte.h Circular include dependencies are dangerous since they can result in inconsistent definitions being provided to other code, especially if '#ifndef' constructs are used. Solve these by removing the offending includes, and add additional includes where necessary. Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-23[ARM] 5053/1: define before use of processor_idGreg Ungerer1-14/+15
For the simple read_cpuid() macro case the variable processor_id has no definition on use of the macro. Add an extern for it. Move all the processor ID macros into the #ifndef __ASSEMBLEY__ block. Signed-off-by: Greg Ungerer <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-23[ARM] 5051/1: define pgtable_t for the !CONFIG_MMU case tooGreg Ungerer1-2/+2
The non-MMU case also needs the type definition of pgtable_t. So move it out of a CONFIG_MMU conditional section. Signed-off-by: Greg Ungerer <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-22[ARM] omap: fix omap clk support build errorsRussell King1-0/+5
arch/arm/plat-omap/clock.c:397: warning: "struct cpufreq_frequency_table" declared inside parameter list arch/arm/plat-omap/clock.c:397: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/plat-omap/clock.c: In function `clk_init_cpufreq_table': arch/arm/plat-omap/clock.c:402: error: structure has no member named `clk_init_cpufreq_table' arch/arm/plat-omap/clock.c:403: error: structure has no member named `clk_init_cpufreq_table' Signed-off-by: Russell King <[email protected]>
2008-05-22[RTC] remove old ARM rtc library codeRussell King1-43/+0
Now that all drivers using it are gone, remove the old ARM RTC library. Acked-by: Alessandro Zummo <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-22[ARM] 5025/2: fix collie cpu initialisationThomas Kunze1-0/+4
collie.h: * add some meaningfull names to some gpios collie.c: * initialize cpu registers correctly Signed-off-by: Thomas Kunze <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-19[ARM] pxa: separate PXA25x and PXA27x UDC register definitionsRussell King3-412/+419
The PXA25x and PXA27x USB device controller register definitions are different. Currently, they live side by side in pxa-regs.h, but only one set is available depending on the setting of PXA25x or PXA27x. This means that if we build to support both PXA25x and PXA27x, the PXA27x definitions are unavailable, even to PXA27x specific code. Remove these definitions from pxa-regs.h, and place them in separate files. Include these files where appropriate. Note: according to the dependencies in drivers/usb/gadget/Kconfig, we do not support the UDC on PXA27x nor PXA3xx CPUs, so remove the platform devices from pxa27x.c and pxa3xx.c. Signed-off-by: Russell King <[email protected]>
2008-05-17Merge branch 'omap-fixes' of ↵Russell King2-9/+19
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
2008-05-17Merge branch 'sa1100'Russell King2-9/+12
2008-05-17[ARM] fix parenthesis in include/asm-arm/arch-omap/control.hMariusz Kozlowski1-1/+1
Parenthesis fix in include/asm-arm/arch-omap/control.h Signed-off-by: Mariusz Kozlowski <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Tony Lindgren <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-17[ARM] 5026/1: locomo: add .settype for gpio and several small fixesThomas Kunze2-9/+12
irqs.h: * rename IRQ_LOCOMO_SPI_OVRN to IRQ_LOCOMO_SPI_REND locomo.h: * add some definition for locomo spi controller * correct some errors locomo.c: * correct some errors * add set_type for locomo gpio irq chip Signed-off-by: Thomas Kunze <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-12[ARM] dyntick: Remove obsolete and unused ARM dyntick supportRussell King3-39/+0
dyntick is superseded by the clocksource/clockevent infrastructure, using the NO_HZ configuration option. No one implements dyntick on ARM anymore, so it's pointless keeping it around. Remove dyntick support. Signed-off-by: Russell King <[email protected]>
2008-05-09ARM: OMAP: Add calls to omap2_set_globals_*()Paul Walmsley1-0/+4
Add the omap2_set_globals_{242x,243x,343x}() functions. These functions are called early upon boot in the map_io() functions in the board-specific init files. This patch was accidentally left out of the earlier series. This fixes omap2 booting as noted by Kyungmin Park <[email protected]>. Signed-off-by: Paul Walmsley <[email protected]> Cc: Kyungmin Park <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2008-05-09ARM: OMAP: Update MMC header to fix compileTony Lindgren1-9/+15
Update MMC header from linux-omap tree to match the recent MMC driver updates. Signed-off-by: Tony Lindgren <[email protected]>
2008-05-08[ARM] pxa: Fix RCSR handlingRussell King1-1/+2
Related to d3930614e68bdf83a120d904c039a64e9f75dba1. RCSR is only present on PXA2xx CPUs, not on PXA3xx CPUs. Therefore, we should not be unconditionally writing to RCSR from generic code. Since we now clear the RCSR status from the SoC specific PXA PM code and before reset in the arch_reset() function, the duplication in the corgi, poodle, spitz and tosa code can be removed. Acked-by: Richard Purdie <[email protected]> Signed-off-by: Russell King <[email protected]>
2008-05-04[ARM] 5027/1: Fixed random memory corruption on pxa suspend cycle.Robert Jarzmik1-1/+1
Each time a pxa type cpu went in suspend, a portion of kmalloc memory was corrupted. The issue was an incorrect length allocation introduced by the commit 711be5ccfe9a02ba560aa918a008c31ea4760163 for the save registers array (=> overflow). Signed-off-by: Robert Jarzmik <[email protected]> Signed-off-by: Russell King <[email protected]>
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