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2024-07-23drm/amd/display: Fix Potential Null DereferenceGabe Teeger1-3/+3
[what & why] System hang after s4 regression points to code change here. Removing possible NULL dereference. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Gabe Teeger <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Add helper function to check for non-address fast updatesIlya Bakoulin2-1/+30
[Why/How] Need to identify which fast updates will update more than just the address. Reviewed-by: Alvin Lee <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: rename dcn401_soc to dcn4_variant_a_socAurabindo Pillai2-2/+2
To distinguish between different soc with same DCN IP, use variants starting with alphabets Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: rename dcn3/dcn4 to more sound termsAurabindo Pillai12-475/+475
Use more accurate names to refer to the asic architecture. dcn3 in DML actually refers to DCN32 and DCN321, so rename it to dcn32x dcn4 refers to any DCN4x soc., and hence rename dcn4 to dcn4x Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Add source select helper functionsHansen Dsouza1-0/+324
[why & how] Add source select helpers based on DCCG spec Reviewed-by: Daniel Miess <[email protected]> Signed-off-by: Hansen Dsouza <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Check if Mode is Supported Before Returning ResultAustin Zheng1-1/+2
[Why] Even if the mode is not supported dml2_check_mode_supported() would still return true. This causes an unsupported mode to be programmed. [How] Check if the mode is supported or not and return the proper result. Reviewed-by: Chaitanya Dhere <[email protected]> Signed-off-by: Austin Zheng <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: ensure EASF and ISHARP coefficients are programmed togetherSamson Tam1-8/+20
[Why] EASF coefficients are programmed to RAM and then RAM selector is toggled. ISHARP coefficients are programmed after so they will not be in the same RAM block [How] Move ISHARP programming before EASF programming Add flag if ISHARP coefficients are updated. If so, then force EASF coefficients programming Reviewed-by: Alvin Lee <[email protected]> Signed-off-by: Samson Tam <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Fix visual confirm bug for SubVPRyan Seto3-6/+31
[Why] Visual confirm was incorrect on dual monitor SubVP setup [How] Adjusted p_state assignment for dual monitor SubVP setup Signed-off-by: Ryan Seto <[email protected]> Reviewed-by: Chaitanya Dhere <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Add RCG helper functionsHansen Dsouza1-0/+307
[why & how] Add standard RCG helpers based on DCCG spec Reviewed-by: Daniel Miess <[email protected]> Reviewed-by: Muhammad Ahmed <[email protected]> Signed-off-by: Hansen Dsouza <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Remove ASSERT if significance is zero in math_ceil2Rodrigo Siqueira1-2/+0
In the DML math_ceil2 function, there is one ASSERT if the significance is equal to zero. However, significance might be equal to zero sometimes, and this is not an issue for a ceil function, but the current ASSERT will trigger warnings in those cases. This commit removes the ASSERT if the significance is equal to zero to avoid unnecessary noise. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Chaitanya Dhere <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Refactoring HPORevalla Hari Krishna7-3/+16
[Why] To refactor HPO files [How] Moved hpo related files to specific hpo folder and update Makefiles. Reviewed-by: Martin Leung <[email protected]> Signed-off-by: Revalla Hari Krishna <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Add private data type for RCGHansen Dsouza1-0/+81
[why & how] Add private data types for better RCG control Reviewed-by: Chris Park <[email protected]> Reviewed-by: Yihan Zhu <[email protected]> Signed-off-by: Hansen Dsouza <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Check for NULL pointerSung Joon Kim1-1/+2
[why & how] Need to make sure plane_state is initialized before accessing its members. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Xi (Alex) Liu <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Remove hardmax usage for dcn401Dillon Varone3-29/+29
[WHY&HOW] Hardmax message will be retired for dcn4, so this removes it. Reviewed-by: Alvin Lee <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdkfd: Refactor queue wptr_bo GART mappingPhilip Yang7-68/+116
Add helper function kfd_queue_acquire_buffers to get queue wptr_bo reference from queue write_ptr if it is mapped to the KFD node with expected size. Add wptr_bo to structure queue_properties because structure queue is allocated after queue buffers are validated, then we can remove wptr_bo parameter from pqm_create_queue. Rename structure queue wptr_bo_gart to hold wptr_bo reference for GART mapping and umapping. Move MES wptr_bo_gart mapping to init_user_queue, the same location with queue ctx_bo GART mapping. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: Add sdma_v4_4_2 ip dump for devcoredumpSunil Khatri1-0/+80
Add ip dump for sdma_v4_4_2 for devcoredump for all instances of sdma. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: add print support for sdma_v_4_0 ip_dumpSunil Khatri1-0/+22
Add print support for ip dump for sdma_v_4_0 in devcoredump. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdkfd: amdkfd_free_gtt_mem clear the correct pointerPhilip Yang8-16/+16
Pass pointer reference to amdgpu_bo_unref to clear the correct pointer, otherwise amdgpu_bo_unref clear the local variable, the original pointer not set to NULL, this could cause use-after-free bug. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdkfd: kfd_bo_mapped_dev support partitionPhilip Yang3-4/+5
Change amdgpu_amdkfd_bo_mapped_to_dev to use drm_priv as parameter instead of adev, to support spatial partition. This is only used by CRIU checkpoint restore now. No functional change. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu/vcn: Use offsets local to VCN/JPEG in VFJane Jian2-5/+60
For VCN/JPEG 4.0.3, use only the local addressing scheme. - Mask bit higher than AID0 range v2 remain the case for mmhub use master XCC Signed-off-by: Jane Jian <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: Add empty HDP flush function to VCN v4.0.3Lijo Lazar1-0/+8
VCN 4.0.3 does not HDP flush with RRMT enabled. Instead, mmsch will do the HDP flush. This change is necessary for VCN v4.0.3, no need for backward compatibility Signed-off-by: Lijo Lazar <[email protected]> Signed-off-by: Jane Jian <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: Add empty HDP flush function to JPEG v4.0.3Lijo Lazar1-0/+8
JPEG v4.0.3 doesn't support HDP flush when RRMT is enabled. Instead, mmsch fw will do the flush. This change is necessary for JPEG v4.0.3, no need for backward compatibility Signed-off-by: Lijo Lazar <[email protected]> Signed-off-by: Jane Jian <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: disallow multiple BO_HANDLES chunks in one submitPierre-Eric Pelloux-Prayer1-0/+4
Before this commit, only submits with both a BO_HANDLES chunk and a 'bo_list_handle' would be rejected (by amdgpu_cs_parser_bos). But if UMD sent multiple BO_HANDLES, what would happen is: * only the last one would be really used * all the others would leak memory as amdgpu_cs_p1_bo_handles would overwrite the previous p->bo_list value This commit rejects submissions with multiple BO_HANDLES chunks to match the implementation of the parser. Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: Add sdma_v4_0 ip dump for devcoredumpSunil Khatri1-0/+80
Add ip dump for sdma_v4_0 for devcoredump for all instances of sdma. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: add print support for sdma_v_7_0 ip_dumpSunil Khatri1-0/+22
Add print support for ip dump for sdma_v_7_0 in devcoredump. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/amdgpu: Fix uninitialized variable warningsMa Ke1-1/+1
Return 0 to avoid returning an uninitialized variable r. Cc: [email protected] Fixes: 230dd6bb6117 ("drm/amd/amdgpu: implement mode2 reset on smu_v13_0_10") Signed-off-by: Ma Ke <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: fix a possible null pointer dereferenceMa Ke1-0/+3
In amdgpu_connector_add_common_modes(), the return value of drm_cvt_mode() is assigned to mode, which will lead to a NULL pointer dereference on failure of drm_cvt_mode(). Add a check to avoid npd. Cc: [email protected] Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") Signed-off-by: Ma Ke <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: Fix atomics on GFX12David Belanger8-1/+143
If PCIe supports atomics, configure register to prevent DF from breaking atomics in separate load/store operations. Signed-off-by: David Belanger <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: Add sdma_v7_0 ip dump for devcoredumpSunil Khatri1-0/+91
Add ip dump for sdma_v7_0 for devcoredump for all instances of sdma. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu/sdma5.2: Update wptr registers as well as doorbellAlex Deucher1-0/+12
We seem to have a case where SDMA will sometimes miss a doorbell if GFX is entering the powergating state when the doorbell comes in. To workaround this, we can update the wptr via MMIO, however, this is only safe because we disallow gfxoff in begin_ring() for SDMA 5.2 and then allow it again in end_ring(). Enable this workaround while we are root causing the issue with the HW team. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/3440 Tested-by: Friedrich Vock <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Add 'pstate_keepout' kdoc entry in 'optc1_program_timing'Srinivasan Shanmugam1-0/+1
Fixes the below with gcc W=1: Function parameter or struct member 'pstate_keepout' not described in 'optc1_program_timing' Cc: Tom Chung <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Roman Li <[email protected]> Cc: Alex Hung <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Hamza Mahfooz <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Tom Chung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/radeon: fix null pointer dereference in radeon_add_common_modesMa Ke1-0/+3
In radeon_add_common_modes(), the return value of drm_cvt_mode() is assigned to mode, which will lead to a possible NULL pointer dereference on failure of drm_cvt_mode(). Add a check to avoid npd. Cc: [email protected] Fixes: d50ba256b5f1 ("drm/kms: start adding command line interface using fb.") Signed-off-by: Ma Ke <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: Remove unused codeYiPeng Chai4-124/+0
Remove unused code. Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: optimize logging deferred error infoYiPeng Chai4-46/+40
1. Use pa_pfn as the radix-tree key index to log deferred error info. 2. Use local array to store a row of bad pages. Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amdgpu: optimize umc v12 address conversion functionYiPeng Chai1-39/+77
Split into 3 parts: 1. Convert soc physical address via ras ta. 2. Expand bad pages from soc physical address. 3. Dump bad address info. Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/radeon: change drm_dev_alloc to devm_drm_dev_allocWu Hoi Pok4-15/+12
"drm_dev_alloc" is deprecated, in order to use the newer "devm_drm_dev_alloc", the "drm_device" is stored inside "radeon_device", by changing "rdev_to_drm(rdev)" other functions still gain access to the member "drm_device". Also, "devm_drm_dev_alloc" is now allocating "radeon_device", allocation inside "radeon_driver_load_kms" has to be removed. In "radeon_device_init", it originally assigned "rdev->dev" etc. However it is already done right after "devm_drm_dev_alloc" as you can see down below. It is better remove them. Reviewed-by: Thomas Zimmermann <[email protected]> Tested-by: Thomas Zimmermann <[email protected]> Signed-off-by: Wu Hoi Pok <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/radeon: change rdev->ddev to rdev_to_drm(rdev)Wu Hoi Pok36-159/+159
This patch changes the way "drm_device" is accessed. It uses "rdev_to_drm(rdev)" instead of accessing the struct member directly. Reviewed-by: Thomas Zimmermann <[email protected]> Tested-by: Thomas Zimmermann <[email protected]> Signed-off-by: Wu Hoi Pok <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/radeon: add helper rdev_to_drm(rdev)Wu Hoi Pok1-0/+5
Add helper rdev_to_drm(rdev), similar to amdgpu, most function should access the "drm_device" with "rdev_to_drm(rdev)" instead, where amdgpu has "adev_to_drm(adev)". It also makes changing from "*drm_device" to "drm_device" in "radeon_devicce" later on easier. Reviewed-by: Thomas Zimmermann <[email protected]> Tested-by: Thomas Zimmermann <[email protected]> Signed-off-by: Wu Hoi Pok <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/radeon: use variable flags as parameterWu Hoi Pok1-1/+1
To be consistent with amdgpu driver, use "flags" as the parameter because it is already assigned as "ent->driver_data". Reviewed-by: Thomas Zimmermann <[email protected]> Tested-by: Thomas Zimmermann <[email protected]> Signed-off-by: Wu Hoi Pok <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/radeon: remove load callback from kms_driverWu Hoi Pok1-1/+4
The ".load" callback in "struct drm_driver" is deprecated. In order to remove the callback, we have to manually call "radeon_driver_load_kms" instead. Acked-by: Thomas Zimmermann <[email protected]> Tested-by: Thomas Zimmermann <[email protected]> Signed-off-by: Wu Hoi Pok <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/radeon: change variable name "dev" to "ddev" for consistencyWu Hoi Pok1-8/+8
In the probe function of amdgpu, it uses "ddev" as the name of "struct drm_device *", so I suggest renaming it to be consistent. Reviewed-by: Thomas Zimmermann <[email protected]> Tested-by: Thomas Zimmermann <[email protected]> Signed-off-by: Wu Hoi Pok <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: 3.2.292Aric Cyr1-1/+1
* FW Release 0.0.225.0 * DML2 fixes * Allow display DCC for DCN401 * Refactor DWB, OPP, MPC, MMHUBBUB * Fix dscclk Programming issue on DCN401 Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Remove unused dml2_core_ip_params structRodrigo Siqueira1-78/+0
Acked-by: Jerry Zuo <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Remove unnecessary DSC power gating for DCN401Joshua Aberback1-2/+0
[Why] In some cases during topology changes, a pipe that was used to drive a stream being removed can be re-assigned to drive a different stream. In these cases, DSC power gating is not handled properly, leading to situations where DSC is being setup while power gated. [How] - remove enable_stream_gating and disable_stream_gating for DCN401 Reviewed-by: Wenjing Liu <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Joshua Aberback <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: free bo used for dmub bounding boxAurabindo Pillai1-2/+11
fix a memleak introduced by not removing the buffer object for use with early dmub bounding box value storage Fixes: 234e94555800 ("drm/amd/display: Enable copying of bounding box data from VBIOS DMUB") Reviewed-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Add visual confirm for Idle StateDuncan Ma4-0/+8
[Why] Visual Confirm would tell us if it ever entered idle state. [How] Add debug option for IPS visual confirm Reviewed-by: Ovidiu Bunea <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Duncan Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Set Cursor Matrix to bypass instead of Input PlaneDaniel Sa1-12/+2
why: When the cursor disappears/reappears on fullscreen video, there is a short transitional period where the cursor's color matrix is using the same format as the video plane. This sets the cursor to the wrong color momentarily before the UI plane appears, correcting the color. how: Instead of defaulting to using the color space from the input plane, default to bypass mode. Reviewed-by: Nevenko Stupar <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Daniel Sa <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Check stream pointer is initialized before accessingSung Joon Kim1-4/+3
[why & how] We calculate static screen wait frames based on the current timing info in the active stream. If stream is not initialized, then we should skip the calculation and go with the default values. Reviewed-by: Gabe Teeger <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Export additional FAMS2 global configuration options from DMLDillon Varone7-95/+110
[WHY&HOW] Some global configuration options were previously hardcoded in DC, now they are exported by DML and sent to FW. Reviewed-by: Martin Leung <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-23drm/amd/display: Refactoring DWB related files from dcn30 FilesMudimela8-4/+10
[Why] To refactor DWB related files from dcn30 Files [How] Moved DWB related files from dcn30 to specific DWB folder and updated Makefiles to fix Compilation. Reviewed-by: Martin Leung <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Mudimela <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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