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2024-06-14net/mlx5e: Use tcp_v[46]_check checksum helpersGal Pressman1-5/+4
Use the tcp specific helpers to calculate the tcp pseudo header checksum instead of the csum_*_magic ones. Signed-off-by: Gal Pressman <[email protected]> Reviewed-by: Rahul Rameshbabu <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5e: Fix outdated comment in features checkGal Pressman1-1/+1
The code no longer treats only UDP tunnels, adjust the outdated comment. Signed-off-by: Gal Pressman <[email protected]> Reviewed-by: Cosmin Ratiu <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5: Replace strcpy with strscpyMoshe Shemesh1-2/+2
Replace deprecated strcpy with strscpy. Signed-off-by: Moshe Shemesh <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5: CT: Separate CT and CT-NAT tuple entriesChris Mi1-44/+143
Currently a ct entry is stored in both ct and ct-nat tables. ct action is directed to the ct table, while ct nat action is directed to the nat table. ct-nat entries perform the nat header rewrites, if required. The current design assures that a ct action will match in hardware even if the tuple has nat configured, it will just not execute it. However, storing each connection in two tables increases the system's memory consumption while reducing its insertion rate. Offload a connection to either ct or the ct-nat table. Add a miss fall-through rule from ct-nat table to the ct table allowing ct(nat) action on non-natted connections. ct action on natted connections, by default, will be handled by the software miss path. Signed-off-by: Paul Blakey <[email protected]> Signed-off-by: Chris Mi <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5: Correct TASR typo into TSARCosmin Ratiu1-1/+1
TSAR is the correct spelling (Transmit Scheduling ARbiter). Signed-off-by: Cosmin Ratiu <[email protected]> Reviewed-by: Gal Pressman <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14Merge tag 'vfio-v6.10-rc4' of https://github.com/awilliam/linux-vfioLinus Torvalds4-205/+124
Pull VFIO fixes from Alex Williamson: "Fix long standing lockdep issue of using remap_pfn_range() from the vfio-pci fault handler for mapping device MMIO. Commit ba168b52bf8e ("mm: use rwsem assertion macros for mmap_lock") now exposes this as a warning forcing this to be addressed. remap_pfn_range() was used here to efficiently map the entire vma, but it really never should have been used in the fault handler and doesn't handle concurrency, which introduced complex locking. We also needed to track vmas mapping the device memory in order to zap those vmas when the memory is disabled resulting in a vma list. Instead of all that mess, setup an address space on the device fd such that we can use unmap_mapping_range() for zapping to avoid the tracking overhead and use the standard vmf_insert_pfn() to insert mappings on fault. For now we'll iterate the vma and opportunistically try to insert mappings for the entire vma. This aligns with typical use cases, but hopefully in the future we can drop the iterative approach and make use of huge_fault instead, once vmf_insert_pfn{pud,pmd}() learn to handle pfnmaps" * tag 'vfio-v6.10-rc4' of https://github.com/awilliam/linux-vfio: vfio/pci: Insert full vma on mmap'd MMIO fault vfio/pci: Use unmap_mapping_range() vfio: Create vfio_fs_type with inode per device
2024-06-14net: phy: realtek: add support for rtl8224 2.5Gbps PHYChris Packham1-0/+8
The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the clause 45 MDIO interface and can leverage the support that has already been added for the other 822x PHYs. Signed-off-by: Chris Packham <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14eth: lan966x: don't clear unsupported statsJakub Kicinski1-8/+0
Commit 12c2d0a5b8e2 ("net: lan966x: add ethtool configuration and statistics") added support for various standard stats. We should not clear the stats which are not collected by the device. Core code uses a special initializer to detect when device does not report given stat. Acked-by: Horatiu Vultur <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14soc: qcom: pmic_glink: disable UCSI on sc8280xpJohan Hovold1-0/+4
Disconnecting an external display triggers a hypervisor reset on the Lenovo ThinkPad X13s since 6.10-rc1 which enabled UCSI. Disable it again until the regression has been fixed properly. Fixes: 3f91a0bf4a0b ("soc: qcom: pmic_glink: reenable UCSI on sc8280xp") Cc: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Heikki Krogerus <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-06-14drm/xe/uc: Fix and start using xe_uc_fw_sanitize()Michal Wajdeczko3-5/+3
Helper xe_uc_fw_sanitize() was defined but never used. First fix it by properly exiting also from the LOAD_FAIL state, then use it in GuC and HuC sanitize code. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Matthew Brost <[email protected]> Reviewed-by: Himal Prasad Ghimiray <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-14drm/xe: Use fixed CCS mode when running in SR-IOV modeMichal Wajdeczko1-1/+8
We don't support changing CCS mode when running in SR-IOV mode yet. When running as a PF driver just apply default ccs_mode=1 that VF drivers will assume as already applied and fixed. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-14drm/xe/sched_job: Promote xe_sched_job_add_deps()Francois Dugast4-19/+22
Move it out of the xe_migrate compilation unit so it can be re-used in other places. Cc: Matthew Brost <[email protected]> Signed-off-by: Francois Dugast <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
2024-06-14drm/amd/display: Skip wbscl_set_scaler_filter if filter is nullAlex Hung1-0/+3
Callers can pass null in filter (i.e. from returned from the function wbscl_get_filter_coeffs_16p) and a null check is added to ensure that is not the case. This fixes 4 NULL_RETURNS issues reported by Coverity. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Check BIOS images before it is usedAlex Hung1-0/+14
BIOS images may fail to load and null checks are added before they are used. This fixes 6 NULL_RETURNS issues reported by Coverity. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Add null checker before passing variablesAlex Hung1-3/+6
Checks null pointer before passing variables to functions. This fixes 3 NULL_RETURNS issues reported by Coverity. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Explicitly extend unsigned 16 bit to 64 bitAlex Hung1-2/+2
Coverity reports sign extention defects as below: Suspicious implicit sign extension: mode->htotal with type u16 ... to int (32 bits, signed), then sign-extended to type unsigned long (64 bits, unsigned). If mode->htotal * mode->vtotal is greater than 0x7FFFFFFF, the upper bits of the result will all be 1. Cast it to unsigned long to avoid possible overflow. This fixes 4 SIGN_EXTENSION issues reported by Coverity. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Send message to notify the DPIA host router bandwidthSung Joon Kim5-1/+81
[why] Tell the system about the current host router bandwidth to be used to measure and calculate the right voltage to be used. [how] Send SMU message of each DPIA host router bandwidth. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Add null check to dml21_find_dc_pipes_for_planeDillon Varone1-3/+8
When a phantom stream is in the process of being deconstructed, there could be pipes with no associated planes. In that case, ignore the phantom stream entirely when searching for associated pipes. Cc: [email protected] Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Attempt to avoid empty TUs when endpoint is DPIAMichael Strauss3-1/+75
[WHY] Empty SST TUs are illegal to transmit over a USB4 DP tunnel. Current policy is to configure stream encoder to pack 2 pixels per pclk even when ODM combine is not in use, allowing seamless dynamic ODM reconfiguration. However, in extreme edge cases where average pixel count per TU is less than 2, this can lead to unexpected empty TU generation during compliance testing. For example, VIC 1 with a 1xHBR3 link configuration will average 1.98 pix/TU. [HOW] Calculate average pixel count per TU, and block 2 pixels per clock if endpoint is a DPIA tunnel and pixel clock is low enough that we will never require 2:1 ODM combine. Cc: [email protected] # 6.6+ Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Refactor DCN3X into component folderMounika Adhuri44-61/+304
[why] Move DCN3X files to unique component folder. [how] Create respective component folder in dc, move the DCN3X files into corresponding new folders and made appropriate changes for compilation in Makefiles. Reviewed-by: Martin Leung <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Mounika Adhuri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: On clock init, maintain DISPCLK freqChris Park2-1/+27
[Why] On init if a display is connected, we need to maintain the DISPCLK frequency Even though DPG_EN=1, the display still requires the correct timing or it could cause audio corruption (if DISPCLK freq is reduced). [How] Read the current DISPCLK freq and request the same value to ensure the timing is valid and unchanged. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Chris Park <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: fix minor coding errors where dml21 phase 5 uses wrong ↵Wenjing Liu1-2/+2
variables There is a coding error which causes incorrect variables to be assigned in DML21 phase 5. Reviewed-by: Dillon Varone <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Remove redundant condition in VBA 314 funcIvan Lipski1-9/+0
[WHY] Coverity analysis this conditional code as DEADCODE. The conditional statement is never true since 'MacroTileSizeBytes' is either 256 or 65536. Thus, the code inside is the conditional statement is never reached. [HOW] Removed the conditional statement. Reviewed-by: Aurabindo Pillai <[email protected]> Reviewed-by: Alex Hung <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Ivan Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Remove redundant condition with DEADCODEIvan Lipski1-3/+0
[WHY] Coverity analysis flagged this condition as DEADCODE since the variable 'req128_c' is always false, thus the condition is never true. [HOW] Remove the condition. Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Ivan Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14Revert "drm/amd/display: workaround for oled eDP not lighting up on DCN401"Joshua Aberback3-5/+0
This reverts commit e902dd7f3e3b93a401e1d3c0322cce933e75e809. A proper fix for this issue has been implemented in DMUB FW. So, no need to keep the workaround. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Joshua Aberback <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Add dcn401 DIG fifo enable/disableRelja Vojvodic3-3/+11
[Why] Found while hotplugging MST daisy chain displays. Changing dispclk during this sequence caused SMU hang due to DIG fifo not being disabled correctly (caused by missing functions). [How] Adding disable/enable DIG fifo functions for dcn401 Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Relja Vojvodic <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Enable DCN401 idle optimizations by defaultDillon Varone1-1/+0
[WHY&HOW] Re-enable idle optimizations by default. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: DCN401 full power down in HW init if any link enabledJoshua Aberback2-1/+1
[Why] During HW init, certain operations the driver performs are invalid on enabled hardware in an unknown state (for example, setting all clock values to minimum when the GPU is actively driving a display). There is already code present to call HWSS->power_down during init when any link is enabled in HW, but that function pointer is unpopulated for most asics. We want to enable this codepath for DCN401, as it resolves the issue with being unable to drive certain display configs on adapter re-enable, and we can restore boot optimizations. [How] - add power_down HWSS function for DCN401 - remove debug bit to disable boot optimizations for DCN401 Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Joshua Aberback <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amdgpu: refine gfx8 firmware loadingYang Wang1-36/+33
refine gfx8 firmware loading Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amdkfd: add ASIC version check for the reset selection of RAS poisonTao Zhou1-2/+8
GFX v9.4.3 uses mode1 reset, other ASICs choose mode2. Signed-off-by: Tao Zhou <[email protected]> Acked-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amdkfd: use mode1 reset for RAS poison consumptionTao Zhou1-2/+2
Per firmware's requirement, replace mode2 with mode1. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/pm: update check condition for SMU mode1 resetTao Zhou3-3/+3
The fed status does indicate RAS fatal error. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amdgpu: set RAS fed status for more casesTao Zhou2-0/+2
Indicate fatal error for each RAS block and NBIO. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amdgpu: create amdgpu_ras_in_recovery to simplify codeTao Zhou7-51/+29
Reduce redundant code and user doesn't need to pay attention to RAS details. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amdgpu: trigger mode1 reset for RAS RMA statusTao Zhou3-11/+29
Check RMA status in bad page retirement flow. v2: fix coding bugs in v1. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Disable PHYSYMCLK RCODaniel Miess2-2/+2
[Why] PHYSYMCLK RCO has been found to lead to crashes in some corner cases [How] Disable PHYSYMCLK RCO debug bit Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Daniel Miess <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: [FW Promotion] Release 0.0.221.0Anthony Koo1-1/+60
- Create a general command and fix Replay desync error with general cmd Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: 3.2.288Aric Cyr1-1/+1
* FW Release 0.0.221.0 * Fixed missing targets in FAMS2 * Populate hardware_release hook for dcn401 * Disable DMCUB timeout for DCN35 * Move PRIMARY plane zpos higher * Introduce overlay cursor mode * Change dram_clock_latency for dcn35 and dcn351 * DCN401 cursor code update Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Update idle hardmins if uclk or fclk requirement changedDillon Varone1-1/+1
[WHY&HOW] Update the idle hardmin with SMU if either clock changed. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Avoid overflow from uint32_t to uint8_tAlex Hung2-2/+2
[WHAT & HOW] dmub_rb_cmd's ramping_boundary has size of uint8_t and it is assigned 0xFFFF. Fix it by changing it to uint8_t with value of 0xFF. This fixes 2 INTEGER_OVERFLOW issues reported by Coverity. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Do not override dml2.1 reinitDillon Varone1-3/+4
[WHY&HOW] Reinit should return after completing version 2.1 reinit instead of calling version 2 reinit after. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Fix missed targets in FAMS2+HWFQDillon Varone2-1/+2
[WHY&HOW] Add additional delay factor when considering a safe time to flip for HWFQ to be passed in by the driver. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Add null check for phantom pipes in prepare mcacheDillon Varone1-2/+8
[WHY&HOW] Sometimes this function is called with a partially deconstructed phantom stream toplolgy, and should ignore phantoms with no plane state. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Block SubVP if hardware rotation is used in DML2.1Dillon Varone1-1/+2
[WHY&HOW] SubVP is not supported when hardware rotation is in use. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Explicitly cast v_total to signed in a subtractionAlex Hung1-2/+2
[WHY & HOW] v_total is an uint32_t and subtracting an unsigned to a signed will result in an unsigned which is always >= 0. As a result, the ternary conditions are always true and thus has no effect. This is fixed by casting v_total to signed explicitly. This also avoids v_total subtraction to overflow. This fixes 1 NO_EFFECT, 2 DEADCODE and 2 INTEGER_OVERFLOW issues reported by Coverity. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Remove NO_EFFECT self-assignmentAlex Hung2-8/+0
[WHAT & HOW] The self-assignments have no effects and thus are removed. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Remove reduntant comparisons by CoverityIvan Lipski2-6/+6
[WHY] Coverity analysis of the Upstream display driver code (amd-staging-drm-next) flagged these three functions as containing 'CONSTANT_EXPRESSION_RESULT' errors, i. e. the conditionals are reduntant since their result is predetermined. fixpt31_32.c: The two flagged 'ASSERT' lines redundant since they are always true: - LONG_MAX equals to the largest 'signed long long' number - res.value is type 'signed long long', So, the condition inside the 'ASSERTS's is always link_dp_training.c: The flagged conditional statement is always false: - 'max_requested.FFE_PRESET.settings.level' is 4 bits, so its max possible value is 15 - 'DP_FFE_PRESET_MAX_LEVEL' equals to 15. So, the conditional statement is always false and the wrapped code never executes. [HOW] Removed lines flagged by Coverity analysis. Reviewed-by: Sun peng Li <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Ivan Lipski <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: populate hardware_release hook for dcn401Alvin Lee3-2/+22
[Description] hardare_release() is called when driver is removed. Add the missing hook for DCN401 Reviewed-by: Dillon Varone <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: make ODM segment width of YCbCr422 two pixel alignedWenjing Liu1-4/+11
[why] In YCbCr422 format hardware shares 1 set of chromas CbCr with 2 sets of lumas Y. Therefore each ODM segment needs to be two pixel aligned. The commit adds this missing hardwware requirement into ODM segment width decision logic. Reviewed-by: Dillon Varone <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-14drm/amd/display: Disable IPS when it is not allowed.JinZe.Xu2-0/+3
[Why&How] Add flag to disable IPS when it is not allowed. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: JinZe.Xu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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