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2019-10-30hv_netvsc: Fix error handling in netvsc_set_features()Haiyang Zhang1-1/+3
When an error is returned by rndis_filter_set_offload_params(), we should still assign the unaffected features to ndev->features. Otherwise, these features will be missing. Fixes: d6792a5a0747 ("hv_netvsc: Add handler for LRO setting change") Signed-off-by: Haiyang Zhang <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-30cxgb4: fix panic when attaching to ULD failVishal Kulkarni1-12/+16
Release resources when attaching to ULD fail. Otherwise, data mismatch is seen between LLD and ULD later on, which lead to kernel panic when accessing resources that should not even exist in the first place. Fixes: 94cdb8bb993a ("cxgb4: Add support for dynamic allocation of resources for ULD") Signed-off-by: Shahjada Abul Husain <[email protected]> Signed-off-by: Vishal Kulkarni <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-30drm/i915/uc: define GuC and HuC binaries for TGLDaniele Ceraolo Spurio1-0/+5
GuC 35.2.0 and HuC 7.0.3 are the first production releases for TGL. GuC 35.2 for Gen12 is interface-compatible with 33.0 on older Gens, because the differences are related to additional blocks/commands in the interface to support new Gen12 features. These parts of the interface will be added when the relevant features are enabled. v2: fix typos (Michal) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Anusha Srivatsa <[email protected]> Reviewed-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-30Revert "dma-buf: Add dma-buf heaps framework"Sean Paul3-279/+0
This reverts commit a69b0e855d3fd278ff6f09a23e1edf929538e304. This patchset doesn't meet the UAPI requirements set out in [1] for the DRM subsystem. Once the userspace component is reviewed and ready for merge we can try again. [1]- https://01.org/linuxgraphics/gfx-docs/drm/gpu/drm-uapi.html#open-source-userspace-requirements Fixes: a69b0e855d3f ("dma-buf: Add dma-buf heaps framework") Cc: Laura Abbott <[email protected]> Cc: Benjamin Gaignard <[email protected]> Cc: Sumit Semwal <[email protected]> Cc: Liam Mark <[email protected]> Cc: Pratik Patel <[email protected]> Cc: Brian Starkey <[email protected]> Cc: Vincent Donnefort <[email protected]> Cc: Sudipto Paul <[email protected]> Cc: Andrew F. Davis <[email protected]> Cc: Christoph Hellwig <[email protected]> Cc: Chenbo Feng <[email protected]> Cc: Alistair Strachan <[email protected]> Cc: Hridya Valsaraju <[email protected]> Cc: Hillf Danton <[email protected]> Cc: [email protected] Cc: Brian Starkey <[email protected]> Cc: John Stultz <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Rob Herring <[email protected]> Cc: Jonathan Cameron <[email protected]> Cc: "Paul E. McKenney" <[email protected]> Cc: Sean Paul <[email protected]> Cc: "Andrew F. Davis" <[email protected]> Cc: [email protected] Cc: [email protected] Acked-by: David Airlie <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-30Revert "dma-buf: heaps: Add heap helpers"Sean Paul4-326/+0
This reverts commit 7b87ea704fd9606eaafa9150116536d72f5c4b1f. This patchset doesn't meet the UAPI requirements set out in [1] for the DRM subsystem. Once the userspace component is reviewed and ready for merge we can try again. [1]- https://01.org/linuxgraphics/gfx-docs/drm/gpu/drm-uapi.html#open-source-userspace-requirements Fixes: 7b87ea704fd9 ("dma-buf: heaps: Add heap helpers") Cc: Laura Abbott <[email protected]> Cc: Benjamin Gaignard <[email protected]> Cc: Sumit Semwal <[email protected]> Cc: Liam Mark <[email protected]> Cc: Pratik Patel <[email protected]> Cc: Brian Starkey <[email protected]> Cc: Vincent Donnefort <[email protected]> Cc: Sudipto Paul <[email protected]> Cc: Andrew F. Davis <[email protected]> Cc: Christoph Hellwig <[email protected]> Cc: Chenbo Feng <[email protected]> Cc: Alistair Strachan <[email protected]> Cc: Hridya Valsaraju <[email protected]> Cc: Hillf Danton <[email protected]> Cc: [email protected] Cc: Brian Starkey <[email protected]> Cc: John Stultz <[email protected]> Cc: "Andrew F. Davis" <[email protected]> Cc: [email protected] Cc: [email protected] Acked-by: David Airlie <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-30Revert "dma-buf: heaps: Add system heap to dmabuf heaps"Sean Paul4-133/+0
This reverts commit 47a32f9c12266d450b92089148c6039591bd9909. This patchset doesn't meet the UAPI requirements set out in [1] for the DRM subsystem. Once the userspace component is reviewed and ready for merge we can try again. [1]- https://01.org/linuxgraphics/gfx-docs/drm/gpu/drm-uapi.html#open-source-userspace-requirements Fixes: 47a32f9c1226 ("dma-buf: heaps: Add system heap to dmabuf heaps") Cc: Laura Abbott <[email protected]> Cc: Benjamin Gaignard <[email protected]> Cc: Sumit Semwal <[email protected]> Cc: Liam Mark <[email protected]> Cc: Pratik Patel <[email protected]> Cc: Brian Starkey <[email protected]> Cc: Vincent Donnefort <[email protected]> Cc: Sudipto Paul <[email protected]> Cc: Andrew F. Davis <[email protected]> Cc: Christoph Hellwig <[email protected]> Cc: Chenbo Feng <[email protected]> Cc: Alistair Strachan <[email protected]> Cc: Hridya Valsaraju <[email protected]> Cc: Hillf Danton <[email protected]> Cc: [email protected] Cc: Brian Starkey <[email protected]> Cc: John Stultz <[email protected]> Cc: "Andrew F. Davis" <[email protected]> Cc: [email protected] Cc: [email protected] Acked-by: David Airlie <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-30Revert "dma-buf: heaps: Add CMA heap to dmabuf heaps"Sean Paul3-187/+0
This reverts commit 43d7238fb9ac897b29912368b3359e72bae469c4. This patchset doesn't meet the UAPI requirements set out in [1] for the DRM subsystem. Once the userspace component is reviewed and ready for merge we can try again. [1]- https://01.org/linuxgraphics/gfx-docs/drm/gpu/drm-uapi.html#open-source-userspace-requirements Fixes: 43d7238fb9ac ("dma-buf: heaps: Add CMA heap to dmabuf heaps") Cc: Laura Abbott <[email protected]> Cc: Benjamin Gaignard <[email protected]> Cc: Sumit Semwal <[email protected]> Cc: Liam Mark <[email protected]> Cc: Pratik Patel <[email protected]> Cc: Brian Starkey <[email protected]> Cc: Vincent Donnefort <[email protected]> Cc: Sudipto Paul <[email protected]> Cc: Andrew F. Davis <[email protected]> Cc: Christoph Hellwig <[email protected]> Cc: Chenbo Feng <[email protected]> Cc: Alistair Strachan <[email protected]> Cc: Hridya Valsaraju <[email protected]> Cc: Hillf Danton <[email protected]> Cc: [email protected] Cc: Brian Starkey <[email protected]> Cc: John Stultz <[email protected]> Cc: "Andrew F. Davis" <[email protected]> Cc: [email protected] Cc: [email protected] Acked-by: David Airlie <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-30mlxsw: core: Unpublish devlink parameters during reloadJiri Pirko1-2/+2
The devlink parameter "acl_region_rehash_interval" is a runtime parameter whose value is stored in a dynamically allocated memory. While reloading the driver, this memory is freed and then allocated again. A use-after-free might happen if during this time frame someone tries to retrieve its value. Since commit 070c63f20f6c ("net: devlink: allow to change namespaces during reload") the use-after-free can be reliably triggered when reloading the driver into a namespace, as after freeing the memory (via reload_down() callback) all the parameters are notified. Fix this by unpublishing and then re-publishing the parameters during reload. Fixes: 98bbf70c1c41 ("mlxsw: spectrum: add "acl_region_rehash_interval" devlink param") Fixes: 7c62cfb8c574 ("devlink: publish params only after driver init is done") Signed-off-by: Jiri Pirko <[email protected]> Signed-off-by: Ido Schimmel <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-30qed: Optimize execution time for nvm attributes configuration.Sudarsana Reddy Kalluru1-6/+21
Current implementation for nvm_attr configuration instructs the management FW to load/unload the nvm-cfg image for each user-provided attribute in the input file. This consumes lot of cycles even for few tens of attributes. This patch updates the implementation to perform load/commit of the config for every 50 attributes. After loading the nvm-image, MFW expects that config should be committed in a predefined timer value (5 sec), hence it's not possible to write large number of attributes in a single load/commit window. Hence performing the commits in chunks. Fixes: 0dabbe1bb3a4 ("qed: Add driver API for flashing the config attributes.") Signed-off-by: Sudarsana Reddy Kalluru <[email protected]> Signed-off-by: Ariel Elior <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-30vxlan: fix unexpected failure of vxlan_changelink()Taehee Yoo1-3/+6
After commit 0ce1822c2a08 ("vxlan: add adjacent link to limit depth level"), vxlan_changelink() could fail because of netdev_adjacent_change_prepare(). netdev_adjacent_change_prepare() returns -EEXIST when old lower device and new lower device are same. (old lower device is "dst->remote_dev" and new lower device is "lowerdev") So, before calling it, lowerdev should be NULL if these devices are same. Test command1: ip link add dummy0 type dummy ip link add vxlan0 type vxlan dev dummy0 dstport 4789 vni 1 ip link set vxlan0 type vxlan ttl 5 RTNETLINK answers: File exists Reported-by: Dan Carpenter <[email protected]> Fixes: 0ce1822c2a08 ("vxlan: add adjacent link to limit depth level") Signed-off-by: Taehee Yoo <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-30qed: fix spelling mistake "queuess" -> "queues"Colin Ian King1-1/+1
There is a spelling misake in a DP_NOTICE message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-30drm/i915: Stop frobbing crtc->base.modeVille Syrjälä1-9/+9
The core no longer uses drm_crtc_state::mode with atomic drivers, so let's stop frobbing it in the driver. For the user mode readout we'll just use an on stack mode. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Maarten Lankhorst <[email protected]>
2019-10-30drm/i915: Nuke 'mode' argument to intel_get_load_detect_pipe()Ville Syrjälä4-8/+4
We always pass mode==NULL to intel_get_load_detect_pipe(). Remove the pointless function argument. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2019-10-30drm/amdgpu: enable -msse2 for GCC 7.1+ usersNick Desaulniers5-15/+5
A final attempt at enabling sse2 for GCC users. Orininally attempted in: commit 10117450735c ("drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines") Reverted due to "reported instability" in: commit 193392ed9f69 ("Revert "drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines"") Re-added just for Clang in: commit 0f0727d971f6 ("drm/amd/display: readd -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines") The original report didn't have enough information to know if the GPF was due to misalignment, but I suspect that it was. (The missing information was the disassembly of the function at the bottom of the trace, to see if the instruction pointer pointed to an instruction with 16B alignment memory operand requirements. The stack trace does show the stack was only 8B but not 16B aligned though, which makes this a strong possibility). Now that the stack misalignment issue has been fixed for users of GCC 7.1+, reattempt adding -msse2. This matches Clang. It will likely never be safe to enable this for pre-GCC 7.1 AND use a 16B aligned stack in these translation units. This is only a functional change for GCC 7.1+ users, and should be boot tested. Link: https://bugs.freedesktop.org/show_bug.cgi?id=109487 Signed-off-by: Nick Desaulniers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: fix stack alignment ABI mismatch for GCC 7.1+Nick Desaulniers5-0/+45
GCC earlier than 7.1 errors when compiling code that makes use of `double`s and sets a stack alignment outside of the range of [2^4-2^12]: $ cat foo.c double foo(double x, double y) { return x + y; } $ gcc-4.9 -mpreferred-stack-boundary=3 foo.c error: -mpreferred-stack-boundary=3 is not between 4 and 12 This is likely why the AMDGPU driver was ever compiled with a different stack alignment (and thus different ABI) than the rest of the x86 kernel. The kernel uses 8B stack alignment, while the driver was using 16B stack alignment in a few places. Since GCC 7.1+ doesn't error, fix the ABI mismatch for users of newer versions of GCC. There was discussion about whether to mark the driver broken or not for users of GCC earlier than 7.1, but since the driver currently is working, don't explicitly break the driver for them here. Relying on differing stack alignment is unspecified behavior, and brittle, and may break in the future. This patch is no functional change for GCC users earlier than 7.1. It's been compile tested on GCC 4.9 and 8.3 to check the correct flags. It should be boot tested when built with GCC 7.1+. -mincoming-stack-boundary= or -mstackrealign may help keep this code building for pre-GCC 7.1 users. The version check for GCC is broken into two conditionals, both because cc-ifversion is currently GCC specific, and it simplifies a subsequent patch. Signed-off-by: Nick Desaulniers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: fix stack alignment ABI mismatch for ClangNick Desaulniers5-30/+20
The x86 kernel is compiled with an 8B stack alignment via `-mpreferred-stack-boundary=3` for GCC since 3.6-rc1 via commit d9b0cde91c60 ("x86-64, gcc: Use -mpreferred-stack-boundary=3 if supported") or `-mstack-alignment=8` for Clang. Parts of the AMDGPU driver are compiled with 16B stack alignment. Generally, the stack alignment is part of the ABI. Linking together two different translation units with differing stack alignment is dangerous, particularly when the translation unit with the smaller stack alignment makes calls into the translation unit with the larger stack alignment. While 8B aligned stacks are sometimes also 16B aligned, they are not always. Multiple users have reported General Protection Faults (GPF) when using the AMDGPU driver compiled with Clang. Clang is placing objects in stack slots assuming the stack is 16B aligned, and selecting instructions that require 16B aligned memory operands. At runtime, syscall handlers with 8B aligned stack call into code that assumes 16B stack alignment. When the stack is a multiple of 8B but not 16B, these instructions result in a GPF. Remove the code that added compatibility between the differing compiler flags, as it will result in runtime GPFs when built with Clang. Cleanups for GCC will be sent in later patches in the series. Link: https://github.com/ClangBuiltLinux/linux/issues/735 Debugged-by: Yuxuan Shui <[email protected]> Reported-by: Shirish S <[email protected]> Reported-by: Yuxuan Shui <[email protected]> Suggested-by: Andrew Cooper <[email protected]> Signed-off-by: Nick Desaulniers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/radeon: Fix EEH during kexecKyle Mahlkuch1-0/+14
During kexec some adapters hit an EEH since they are not properly shut down in the radeon_pci_shutdown() function. Adding radeon_suspend_kms() fixes this issue. Enabled only on PPC because this patch causes issues on some other boards. Signed-off-by: Kyle Mahlkuch <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu/gmc10: properly set BANK_SELECT and FRAGMENT_SIZEAlex Deucher2-0/+18
These were not aligned for optimal performance for GPUVM. Acked-by: Christian König <[email protected]> Reviewed-by: Tianci Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-10-30drm/amdgpu/powerplay/vega10: allow undervolting in p7Pelle van Gils1-3/+1
The vega10_odn_update_soc_table() function does not allow the SCLK dependent voltage to be set for power-state 7 to a value below the default in pptable. Change the for-loop condition to allow undervolting in the highest state. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205277 Signed-off-by: Pelle van Gils <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-10-30dc.c:use kzalloc without testzhongshiqi1-0/+4
dc.c:583:null check is needed after using kzalloc function Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: zhongshiqi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amd/display: setting the DIG_MODE to the correct value.Zhan liu1-0/+9
[Why] This patch is for fixing Navi14 HDMI display pink screen issue. [How] Call stream->link->link_enc->funcs->setup twice. This is setting the DIG_MODE to the correct value after having been overridden by the call to transmitter control. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amd/display: Passive DP->HDMI dongle detection fixMichael Strauss1-6/+18
[WHY] i2c_read is called to differentiate passive DP->HDMI and DP->DVI-D dongles The call is expected to fail in DVI-D case but pass in HDMI case Some HDMI dongles have a chance to fail as well, causing misdetection as DVI-D [HOW] Retry i2c_read to ensure failed result is valid Signed-off-by: Michael Strauss <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amd/display: add 50us buffer as WA for pstate switch in activeJun Lei1-1/+2
Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amd/display: Allow inverted gammaAidan Yang1-14/+8
[why] There's a use case for inverted gamma and it's been confirmed that negative slopes are ok. [how] Remove code for blocking non-monotonically increasing gamma Signed-off-by: Aidan Yang <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Leo Li <[email protected]> Acked-by: Reza Amini <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amd/display: do not synchronize "drr" displaysJun Lei1-0/+6
[why] A display that supports DRR can never really be considered "synchronized" with any other display because we can dynamically enable DRR (i.e. without modeset). this will cause their relative CRTC positions to drift and lose sync. this will disrupt features such as MCLK switching that assume and depend on their permanent alignment (that can only change with modeset) [how] check for ignore_msa in stream when considered synchronizability this ignore_msa is basically actually implemented as "supports drr" Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Yongqiang Sun <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: If amdgpu_ib_schedule fails return back the error.Andrey Grodzovsky1-1/+3
Use ERR_PTR to return back the error happened during amdgpu_ib_schedule. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/sched: Set error to s_fence if HW job submission failed.Andrey Grodzovsky1-3/+16
Problem: When run_job fails and HW fence returned is NULL we still signal the s_fence to avoid hangs but the user has no way of knowing if the actual HW job was ran and finished. Fix: Allow .run_job implementations to return ERR_PTR in the fence pointer returned and then set this error for s_fence->finished fence so whoever wait on this fence can inspect the signaled fence for an error. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu/gfx10: update gfx golden settings for navi12Tianci.Yin1-1/+1
update registers: mmCGTT_SPI_CLK_CTRL Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu/gfx10: update gfx golden settings for navi14Tianci.Yin1-1/+1
update registers: mmCGTT_SPI_CLK_CTRL Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu/gfx10: update gfx golden settingsTianci.Yin1-1/+1
update registers: mmCGTT_SPI_CLK_CTRL Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-10-30drm/amd/display: Change Navi14's DWB flag to 1Zhan liu1-1/+1
[Why] DWB (Display Writeback) flag needs to be enabled as 1, or system will throw out a few warnings when creating dcn20 resource pool. Also, Navi14's dwb setting needs to match Navi10's, which has already been set to 1. [How] Change value of num_dwb from 0 to 1. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)Pierre-Eric Pelloux-Prayer1-0/+1
This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481. v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older hw Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: Fix SDMA hang when performing VKexample testchen gong1-0/+1
VKexample test hang during Occlusion/SDMA/Varia runs. Clear XNACK_WATERMK in reg SDMA0_UTCL1_WATERMK to fix this issue. Signed-off-by: chen gong <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-10-30drm/amd/display: Add a conversion function for transmitter and phy_id enumsNathan Chancellor1-1/+37
Clang warns: ../drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:2520:42: error: implicit conversion from enumeration type 'enum transmitter' to different enumeration type 'enum physical_phy_id' [-Werror,-Wenum-conversion] psr_context->smuPhyId = link->link_enc->transmitter; ~ ~~~~~~~~~~~~~~~~^~~~~~~~~~~ 1 error generated. As the comment above this assignment states, this is intentional. To match previous warnings of this nature, add a conversion function that explicitly converts between the enums and warns when there is a mismatch. See commit 828cfa29093f ("drm/amdgpu: Fix amdgpu ras to ta enums conversion") and commit d9ec5cfd5a2e ("drm/amd/display: Use switch table for dc_to_smu_clock_type") for previous examples of this. v2: use PHYLD_UNKNOWN for the default case. Fixes: e0d08a40a63b ("drm/amd/display: Add debugfs entry for reading psr state") Link: https://github.com/ClangBuiltLinux/linux/issues/758 Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amd/display: remove redundant null pointer check before kfreezhong jiang1-3/+1
kfree has taken null pointer into account. hence it is safe to remove the unnecessary check. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: zhong jiang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu/gmc10: properly set BANK_SELECT and FRAGMENT_SIZEAlex Deucher2-0/+18
These were not aligned for optimal performance for GPUVM. Acked-by: Christian König <[email protected]> Reviewed-by: Tianci Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: fix no ACK from LDS read during stress test for ArcturusLe Ma1-0/+1
Set mmSQ_CONFIG.DISABLE_SMEM_SOFT_CLAUSE as W/R. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: fix gfx VF FLR test fail on naviHaiJun Chang1-0/+1
Cp wptr in wb buffer is outdated after VF FLR. The outdated wptr may cause cp to execute unexpected packets. Reset cp wptr in wb buffer. Signed-off-by: HaiJun Chang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: bypass some cleanup work after err_event_athub (v2)Le Ma4-11/+30
PSP lost connection when err_event_athub occurs. These cleanup work can be skipped in BACO reset. v2: squash in missing include (Alex) Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: clear UVD VCPU buffer when err_event_athub generatedLe Ma1-1/+9
The err_event_athub error will mess up the buffer and cause UVD resume hang. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu/SRIOV: SRIOV VF doesn't support BACOJiange Zhao1-1/+1
SRIOV VF doesn't support BACO. Only PF with BACO capability can do it. Signed-off-by: Jiange Zhao <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: Remove superfluous void * cast in debugfs_create_file() callGeert Uytterhoeven1-2/+2
There is no need to cast a typed pointer to a void pointer when calling a function that accepts the latter. Remove it, as the cast prevents further compiler checks. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdgpu: remove set but not used variable 'adev'YueHaibing1-9/+0
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1221:24: warning: variable adev set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:488:24: warning: variable adev set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:547:24: warning: variable adev set but not used [-Wunused-but-set-variable] It is never used, so can removed it. Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdkfd: bug fix for out of bounds mem on gpu cache filling infoAlex Sierra1-1/+1
The bitmap in cu_info structure is defined as a 4x4 size array. In Acturus, this matrix is initialized as a 4x2. Based on the 8 shaders. In the gpu cache filling initialization, the access to the bitmap matrix was done as an 8x1 instead of 4x2. Causing an out of bounds memory access error. Due to this, the number of GPU cache entries was inconsistent. Signed-off-by: Alex Sierra <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdkfd: Delete duplicated queue bit map reservationYong Zhao1-8/+0
The KIQ is on the second MEC and its reservation is covered in the latter logic, so no need to reserve its bit twice. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30drm/amdkfd: Delete unnecessary pr_fmt switchYong Zhao4-13/+0
Given amdkfd.ko has been merged into amdgpu.ko, this switch is no longer useful. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-30iwlwifi: fw api: support new API for scan config cmdAyala Beker4-10/+61
The API was reduced to include only knowledge currently needed by the FW scan logic, the rest is legacy. Support the new, reduced version. Using the old API with newer firmwares (starting from iwlwifi-*-50.ucode, which implements and requires the new API version) causes an assertion failure similar to this one: [ 2.854505] iwlwifi 0000:00:14.3: 0x20000038 | BAD_COMMAND Signed-off-by: Ayala Beker <[email protected]> Signed-off-by: Luca Coelho <[email protected]> Signed-off-by: Kalle Valo <[email protected]>
2019-10-30mt76: dma: fix buffer unmap with non-linear skbsLorenzo Bianconi2-4/+7
mt76 dma layer is supposed to unmap skb data buffers while keep txwi mapped on hw dma ring. At the moment mt76 wrongly unmap txwi or does not unmap data fragments in even positions for non-linear skbs. This issue may result in hw hangs with A-MSDU if the system relies on IOMMU or SWIOTLB. Fix this behaviour properly unmapping data fragments on non-linear skbs. Fixes: 17f1de56df05 ("mt76: add common code shared between multiple chipsets") Signed-off-by: Lorenzo Bianconi <[email protected]> Signed-off-by: Kalle Valo <[email protected]>
2019-10-30mt76: mt76x2e: disable pcie_aspm by defaultLorenzo Bianconi4-0/+51
On same device (e.g. U7612E-H1) PCIE_ASPM causes continuous mcu hangs and instability. Since mt76x2 series does not manage PCIE PS states, first we try to disable ASPM using pci_disable_link_state. If it fails, we will disable PCIE PS configuring PCI registers. This patch has been successfully tested on U7612E-H1 mini-pice card Tested-by: Oleksandr Natalenko <[email protected]> Signed-off-by: Felix Fietkau <[email protected]> Signed-off-by: Lorenzo Bianconi <[email protected]> Signed-off-by: Kalle Valo <[email protected]>
2019-10-30drm/i915: Avoid HPD poll detect triggering a new detect cycleImre Deak3-0/+19
For the HPD interrupt functionality the HW depends on power wells in the display core domain to be on. Accordingly when enabling these power wells the HPD polling logic will force an HPD detection cycle to account for hotplug events that may have happened when such a power well was off. Thus a detect cycle started by polling could start a new detect cycle if a power well in the display core domain gets enabled during detect and stays enabled after detect completes. That in turn can lead to a detection cycle runaway. To prevent re-triggering a poll-detect cycle make sure we drop all power references we acquired during detect synchronously by the end of detect. This will let the poll-detect logic continue with polling (matching the off state of the corresponding power wells) instead of scheduling a new detection cycle. Fixes: 6cfe7ec02e85 ("drm/i915: Remove the unneeded AUX power ref from intel_dp_detect()") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112125 Reported-and-tested-by: Val Kulkov <[email protected]> Reported-and-tested-by: wangqr <[email protected]> Cc: Val Kulkov <[email protected]> Cc: wangqr <[email protected]> Cc: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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