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2019-11-06drm/amdgpu: add dummy read by engines for some GCVM status registers in gfx10changzhu4-6/+64
The GRBM register interface is now capable of bursting 1 cycle per register wr->wr, wr->rd much faster than previous muticycle per transaction done interface. This has caused a problem where status registers requiring HW to update have a 1 cycle delay, due to the register update having to go through GRBM. For cp ucode, it has realized dummy read in cp firmware.It covers the use of WAIT_REG_MEM operation 1 case only.So it needs to call gfx_v10_0_wait_reg_mem in gfx10. Besides it also needs to add warning to update firmware in case firmware is too old to have function to realize dummy read in cp firmware. For sdma ucode, it hasn't realized dummy read in sdma firmware. sdma is moved to gfxhub in gfx10. So it needs to add dummy read in driver between amdgpu_ring_emit_wreg and amdgpu_ring_emit_reg_wait for sdma_v5_0. Signed-off-by: changzhu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/powerplay: fix deadlock on setting power_dpm_force_performance_levelEvan Quan1-5/+14
smu_enable_umd_pstate() will try to get the smu->mutex which was already hold by its parent API smu_force_performance_level() on the call path. Thus deadlock happens. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: perform p-state switch after the whole hive initializedEvan Quan1-12/+35
P-state switch should be performed after all devices from the hive get initialized. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Jonathan Kim <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: fix possible pstate switch race conditionEvan Quan2-2/+35
Added lock protection so that the p-state switch will be guarded to be sequential. Also update the hive pstate only all device from the hive are in the same state. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: register gpu instance before fan boost feature enablmentEvan Quan2-1/+7
Otherwise, the feature enablement will be skipped due to wrong count. Fixes: beff74bc6e0fa91 ("drm/amdgpu: fix a race in GPU reset with IB test (v2)") Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/swSMU: fix smu workload bit map errorKevin Wang2-2/+2
fix workload bit (WORKLOAD_PPLIB_COMPUTE_BIT) map error on vega20 and navi asic. fix commit: drm/amd/powerplay: add function get_workload_type_map for swsmu Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/powerplay: update Arcturus driver-smu interface headerEvan Quan2-2/+2
To fit the latest SMU firmware. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Le Ma <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: disallow direct upload save restore list from gfx driverHawking Zhang1-1/+2
Direct uploading save/restore list via mmio register writes breaks the security policy. Instead, the driver should pass s&r list to psp. For all the ASICs that use rlc v2_1 headers, the driver actually upload s&r list twice, in non-psp ucode front door loading phase and gfx pg initialization phase. The latter is not allowed. VG12 is the only exception where the driver still keeps legacy approach for S&R list uploading. In theory, this can be elimnated if we have valid srcntl ucode for VG12. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Candice Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/sched: Fix passing zero to 'PTR_ERR' warning v2Andrey Grodzovsky1-2/+5
Fix a static code checker warning. v2: Drop PTR_ERR_OR_ZERO. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Emily Deng <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu/discovery: Need to free discovery memoryEmily Deng1-3/+3
When unloading driver, need to free discovery memory. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/powerplay: print the pptable providerXiaojie Yuan1-0/+2
So we know where the tables came from. Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06Revert "drm/amd/display: setting the DIG_MODE to the correct value."Zhan Liu1-9/+0
This reverts commit 967a3b85bac91c55eff740e61bf270c2732f48b2. Reason for revert: Root cause of this issue is found. The workaround is not needed anymore. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14Zhan Liu1-0/+5
[Why] Navi10 has 6 PHY, but Navi14 only has 5 PHY, that is because there is no ENGINE_ID_DIGD in Navi14. Without this patch, many HDMI related issues (e.g. HDMI S3 resume failure, HDMI pink screen on boot) will be observed. [How] If "eng_id" is larger than ENGINE_ID_DIGD, then add "eng_id" by 1. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: Show resolution correctly in mode validation debug outputNeil Mayhew1-1/+1
Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Neil Mayhew <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu/gpuvm: add some additional comments in amdgpu_vm_update_ptesAlex Deucher1-1/+9
To better clarify what is happening in this function. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: enable VCN DPG on Raven and Raven2Alex Deucher1-2/+6
It's safe to enable dynamic VCN powergating on raven and raven2 for increased power savings. Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: add navi14 PCI IDTianci.Yin1-0/+1
Add the navi14 PCI device id. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/powerplay: support xgmi pstate setting on powerplay routine V2Evan Quan6-4/+44
Add xgmi pstate setting on powerplay routine. V2: split the change of is_support_sw_smu_xgmi into a separate patch Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/powerplay: update is_sw_smu_xgmi checkEvan Quan1-1/+1
Add check for is_sw_smu routine and drop check for amdgpu_dpm which seems non-sense. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: change pstate only after all XGMI device initializedEvan Quan1-3/+12
Pstate settings should be performed after all device of the XGMI setup get initialized. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06HID: wacom: generic: Treat serial number and related fields as unsignedJason Gerecke2-4/+21
The HID descriptors for most Wacom devices oddly declare the serial number and other related fields as signed integers. When these numbers are ingested by the HID subsystem, they are automatically sign-extended into 32-bit integers. We treat the fields as unsigned elsewhere in the kernel and userspace, however, so this sign-extension causes problems. In particular, the sign-extended tool ID sent to userspace as ABS_MISC does not properly match unsigned IDs used by xf86-input-wacom and libwacom. We introduce a function 'wacom_s32tou' that can undo the automatic sign extension performed by 'hid_snto32'. We call this function when processing the serial number and related fields to ensure that we are dealing with and reporting the unsigned form. We opt to use this method rather than adding a descriptor fixup in 'wacom_hid_usage_quirk' since it should be more robust in the face of future devices. Ref: https://github.com/linuxwacom/input-wacom/issues/134 Fixes: f85c9dc678 ("HID: wacom: generic: Support tool ID and additional tool types") CC: <[email protected]> # v4.10+ Signed-off-by: Jason Gerecke <[email protected]> Reviewed-by: Aaron Armstrong Skomra <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2019-11-06drm/amdgpu: add navi14 PCI IDTianci.Yin1-0/+1
Add the navi14 PCI device id. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06Revert "drm/amd/display: setting the DIG_MODE to the correct value."Zhan Liu1-9/+0
This reverts commit 385857adb8154563840e5b0f200254126618f464. Reason for revert: Root cause of this issue is found. The workaround is not needed anymore. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14Zhan Liu1-0/+5
[Why] Navi10 has 6 PHY, but Navi14 only has 5 PHY, that is because there is no ENGINE_ID_DIGD in Navi14. Without this patch, many HDMI related issues (e.g. HDMI S3 resume failure, HDMI pink screen on boot) will be observed. [How] If "eng_id" is larger than ENGINE_ID_DIGD, then add "eng_id" by 1. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu: dont schedule jobs while in resetShirish S1-1/+4
[Why] doing kthread_park()/unpark() from drm_sched_entity_fini while GPU reset is in progress defeats all the purpose of drm_sched_stop->kthread_park. If drm_sched_entity_fini->kthread_unpark() happens AFTER drm_sched_stop->kthread_park nothing prevents from another (third) thread to keep submitting job to HW which will be picked up by the unparked scheduler thread and try to submit to HW but fail because the HW ring is deactivated. [How] grab the reset lock before calling drm_sched_entity_fini() Signed-off-by: Shirish S <[email protected]> Suggested-by: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu/arcturus: properly set BANK_SELECT and FRAGMENT_SIZEAlex Deucher1-0/+9
These were not aligned for optimal performance for GPUVM. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/mst: Fix up u64 divisionSean Paul1-2/+2
Change rem_nsec to u32 since that's what do_div returns, this avoids the u64 divide in the drm_print args. Changes in v2: - Instead of doing do_div in drm_print, make rem_nsec u32 (Ville) Link to v1: https://patchwork.freedesktop.org/patch/msgid/[email protected] Fixes: 12a280c72868 ("drm/dp_mst: Add topology ref history tracking for debugging") Cc: Juston Li <[email protected]> Cc: Imre Deak <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Sean Paul <[email protected]> Cc: Lyude Paul <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-11-06drm/amdgpu: dont schedule jobs while in resetShirish S1-1/+4
[Why] doing kthread_park()/unpark() from drm_sched_entity_fini while GPU reset is in progress defeats all the purpose of drm_sched_stop->kthread_park. If drm_sched_entity_fini->kthread_unpark() happens AFTER drm_sched_stop->kthread_park nothing prevents from another (third) thread to keep submitting job to HW which will be picked up by the unparked scheduler thread and try to submit to HW but fail because the HW ring is deactivated. [How] grab the reset lock before calling drm_sched_entity_fini() Signed-off-by: Shirish S <[email protected]> Suggested-by: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06drm/amdgpu/arcturus: properly set BANK_SELECT and FRAGMENT_SIZEAlex Deucher1-0/+9
These were not aligned for optimal performance for GPUVM. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-11-06net: bcmgenet: reapply manual settings to the PHYDoug Berger1-1/+4
The phy_init_hw() function may reset the PHY to a configuration that does not match manual network settings stored in the phydev structure. If the phy state machine is polled rather than event driven this can create a timing hazard where the phy state machine might alter the settings stored in the phydev structure from the value read from the BMCR. This commit follows invocations of phy_init_hw() by the bcmgenet driver with invocations of the genphy_config_aneg() function to ensure that the BMCR is written to match the settings held in the phydev structure. This prevents the risk of manual settings being accidentally altered. Fixes: 1c1008c793fa ("net: bcmgenet: add main driver file") Signed-off-by: Doug Berger <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-06Revert "net: bcmgenet: soft reset 40nm EPHYs before MAC init"Doug Berger3-69/+73
This reverts commit 1f515486275a08a17a2c806b844cca18f7de5b34. This commit improved the chances of the umac resetting cleanly by ensuring that the PHY was restored to its normal operation prior to resetting the umac. However, there were still cases when the PHY might not be driving a Tx clock to the umac during this window (e.g. when the PHY detects no link). The previous commit now ensures that the unimac receives clocks from the MAC during its reset window so this commit is no longer needed. This commit also has an unintended negative impact on the MDIO performance of the UniMAC MDIO interface because it is used before the MDIO interrupts are reenabled, so it should be removed. Signed-off-by: Doug Berger <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-06net: bcmgenet: use RGMII loopback for MAC resetDoug Berger2-2/+33
As noted in commit 28c2d1a7a0bf ("net: bcmgenet: enable loopback during UniMAC sw_reset") the UniMAC must be clocked while sw_reset is asserted for its state machines to reset cleanly. The transmit and receive clocks used by the UniMAC are derived from the signals used on its PHY interface. The bcmgenet MAC can be configured to work with different PHY interfaces including MII, GMII, RGMII, and Reverse MII on internal and external interfaces. Unfortunately for the UniMAC, when configured for MII the Tx clock is always driven from the PHY which places it outside of the direct control of the MAC. The earlier commit enabled a local loopback mode within the UniMAC so that the receive clock would be derived from the transmit clock which addressed the observed issue with an external GPHY disabling it's Rx clock. However, when a Tx clock is not available this loopback is insufficient. This commit implements a workaround that leverages the fact that the MAC can reliably generate all of its necessary clocking by enterring the external GPHY RGMII interface mode with the UniMAC in local loopback during the sw_reset interval. Unfortunately, this has the undesirable side efect of the RGMII GTXCLK signal being driven during the same window. In most configurations this is a benign side effect as the signal is either not routed to a pin or is already expected to drive the pin. The one exception is when an external MII PHY is expected to drive the same pin with its TX_CLK output creating output driver contention. This commit exploits the IEEE 802.3 clause 22 standard defined isolate mode to force an external MII PHY to present a high impedance on its TX_CLK output during the window to prevent any contention at the pin. The MII interface is used internally with the 40nm internal EPHY which agressively disables its clocks for power savings leading to incomplete resets of the UniMAC and many instabilities observed over the years. The workaround of this commit is expected to put an end to those problems. Fixes: 1c1008c793fa ("net: bcmgenet: add main driver file") Signed-off-by: Doug Berger <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-06drm/atomic: fix self-refresh helpers crtc state dereferenceRob Clark2-8/+25
drm_self_refresh_helper_update_avg_times() was incorrectly accessing the new incoming state after drm_atomic_helper_commit_hw_done(). But this state might have already been superceeded by an !nonblock atomic update resulting in dereferencing an already free'd crtc_state. TODO I *think* this will more or less do the right thing.. althought I'm not 100% sure if, for example, we enter psr in a nonblock commit, and then leave psr in a !nonblock commit that overtakes the completion of the nonblock commit. Not sure if this sort of scenario can happen in practice. But not crashing is better than crashing, so I guess we should either take this patch or rever the self-refresh helpers until Sean can figure out a better solution. Fixes: d4da4e33341c ("drm: Measure Self Refresh Entry/Exit times to avoid thrashing") Cc: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]> [seanpaul fixed up some checkpatch warns] Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-11-06drm: msm: a6xx: fix debug bus register configurationSharat Masetty1-12/+12
Fix the cx debugbus related register configuration, to collect accurate bus data during gpu snapshot. This helps with complete snapshot dump and also complete proper GPU recovery. Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") Reviewed-by: Rob Clark <[email protected]> Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/339165
2019-11-06drm/mediatek: Support 180 degree rotationSean Paul1-2/+2
Now that we support both reflections, we can expose 180 degree rotation and rely on the simplify routine to convert that into REFLECT_X | REFLECT_Y Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-06drm/mediatek: Support reflect-x plane rotationSean Paul1-1/+9
Add support for REFLECT_X rotations. Cc: Fritz Koenig <[email protected]> Cc: Daniele Castagna <[email protected]> Cc: Miguel Casas <[email protected]> Cc: Mark Yacoub <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-06drm/mediatek: Support reflect-y plane rotationSean Paul1-0/+42
Expose the rotation property and handle REFLECT_Y rotations. Cc: Fritz Koenig <[email protected]> Cc: Daniele Castagna <[email protected]> Cc: Miguel Casas <[email protected]> Cc: Mark Yacoub <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-06drm/mediatek: Plumb supported rotation values from components to plane initSean Paul4-3/+27
This patch adds the ability for components to expose supported rotations which will be exposed to userspace via a plane rotation property. No functional changes in this patch. Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-06drm/mediatek: Add plumbing for layer_check hookSean Paul4-0/+30
This allows components to implement a .layer_check callback for their layers which is called during atomic_check. Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-06drm/mediatek: Add helper to get component for a planeSean Paul1-22/+34
Instead of hard-coding which components have planes, add a helper function to walk the components and map a plane index to a component layer. Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-06drm/mediatek: Refactor plane initSean Paul1-18/+59
Add a couple of functions which enumerate the number of planes for a component and initialize the planes for a component. No functional changes in this patch, but it will allow us to selectively support rotation if the component supports it. Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-06drm/mediatek: Add RGB[A] variants to published plane formatsSean Paul1-0/+6
These formats are handled in the rdma code, but for some reason they're not published as supported formats for the planes. So add them to the list. Cc: Nicolas Boichat <[email protected]> Cc: Daniele Castagna <[email protected]> Cc: Miguel Casas <[email protected]> Tested-by: Miguel Casas <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-11-05NFC: fdp: fix incorrect free objectPan Bian1-1/+1
The address of fw_vsc_cfg is on stack. Releasing it with devm_kfree() is incorrect, which may result in a system crash or other security impacts. The expected object to free is *fw_vsc_cfg. Signed-off-by: Pan Bian <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-05net: qualcomm: rmnet: Fix potential UAF when unregisteringSean Tranchetti1-2/+2
During the exit/unregistration process of the RmNet driver, the function rmnet_unregister_real_device() is called to handle freeing the driver's internal state and removing the RX handler on the underlying physical device. However, the order of operations this function performs is wrong and can lead to a use after free of the rmnet_port structure. Before calling netdev_rx_handler_unregister(), this port structure is freed with kfree(). If packets are received on any RmNet devices before synchronize_net() completes, they will attempt to use this already-freed port structure when processing the packet. As such, before cleaning up any other internal state, the RX handler must be unregistered in order to guarantee that no further packets will arrive on the device. Fixes: ceed73a2cf4a ("drivers: net: ethernet: qualcomm: rmnet: Initial implementation") Signed-off-by: Sean Tranchetti <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-05mlx4_core: fix wrong comment about the reason of subtract one from the max_cqesDotan Barak1-2/+1
The reason for the pre-allocation of one CQE is to enable resizing of the CQ. Fix comment accordingly. Signed-off-by: Dotan Barak <[email protected]> Signed-off-by: Eli Cohen <[email protected]> Signed-off-by: Vladimir Sokolovsky <[email protected]> Signed-off-by: Yuval Shaia <[email protected]> Reviewed-by: Tariq Toukan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-05net: dsa: bcm_sf2: Fix driver removalFlorian Fainelli1-2/+2
With the DSA core doing the call to dsa_port_disable() we do not need to do that within the driver itself. This could cause an use after free since past dsa_unregister_switch() we should not be accessing any dsa_switch internal structures. Fixes: 0394a63acfe2 ("net: dsa: enable and disable all ports") Signed-off-by: Florian Fainelli <[email protected]> Reviewed-by: Vivien Didelot <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-05net: hns3: Use the correct style for SPDX License IdentifierNishad Kamdar7-7/+7
This patch corrects the SPDX License Identifier style in header files related to Hisilicon network devices. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used) Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <[email protected]> Signed-off-by: Nishad Kamdar <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-05bonding: fix state transition issue in link monitoringJay Vosburgh1-22/+22
Since de77ecd4ef02 ("bonding: improve link-status update in mii-monitoring"), the bonding driver has utilized two separate variables to indicate the next link state a particular slave should transition to. Each is used to communicate to a different portion of the link state change commit logic; one to the bond_miimon_commit function itself, and another to the state transition logic. Unfortunately, the two variables can become unsynchronized, resulting in incorrect link state transitions within bonding. This can cause slaves to become stuck in an incorrect link state until a subsequent carrier state transition. The issue occurs when a special case in bond_slave_netdev_event sets slave->link directly to BOND_LINK_FAIL. On the next pass through bond_miimon_inspect after the slave goes carrier up, the BOND_LINK_FAIL case will set the proposed next state (link_new_state) to BOND_LINK_UP, but the new_link to BOND_LINK_DOWN. The setting of the final link state from new_link comes after that from link_new_state, and so the slave will end up incorrectly in _DOWN state. Resolve this by combining the two variables into one. Reported-by: Aleksei Zakharov <[email protected]> Reported-by: Sha Zhang <[email protected]> Cc: Mahesh Bandewar <[email protected]> Fixes: de77ecd4ef02 ("bonding: improve link-status update in mii-monitoring") Signed-off-by: Jay Vosburgh <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-11-06drm/i915: Don't select BROKENDaniel Vetter1-1/+0
It's broken. Reported-by: Stephen Rothwell <[email protected]> References: https://lists.freedesktop.org/archives/dri-devel/2019-November/242625.html Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-11-06drm/dp_mst: fix gcc compile errorChenwandun1-1/+1
drivers/gpu/drm/drm_dp_mst_topology.c: In function __topology_ref_save: drivers/gpu/drm/drm_dp_mst_topology.c:1424:6: error: implicit declaration of function stack_trace_save; did you mean stack_depot_save? [-Werror=implicit-function-declaration] n = stack_trace_save(stack_entries, ARRAY_SIZE(stack_entries), 1); ^~~~~~~~~~~~~~~~ stack_depot_save drivers/gpu/drm/drm_dp_mst_topology.c: In function __dump_topology_ref_history: drivers/gpu/drm/drm_dp_mst_topology.c:1513:3: error: implicit declaration of function stack_trace_snprint; did you mean acpi_trace_point? [-Werror=implicit-function-declaration] stack_trace_snprint(buf, PAGE_SIZE, entries, nr_entries, 4); ^~~~~~~~~~~~~~~~~~~ acpi_trace_point stack_trace_save and stack_trace_snprint are declared in <linux/stacktrace.h>, so there is need to include it, and <linux/stackdepot.h> is already included by practices, so just replace <linux/stackdepot.h> by <linux/stacktrace.h>. Signed-off-by: Chenwandun <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]