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2019-10-15drm/amdgpu: add new SMU 7.0.1 registers for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add new BIF 5.0 register for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add new BIF 4.1 register for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/soc15: add support for baco reset with swSMUAlex Deucher1-20/+35
Add support for vega20 when the swSMU path is used. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: remove in_baco_reset hackAlex Deucher3-6/+2
It was a vega20 specific hack. Check if we are in reset and what reset method we are using. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: simplify ATPX detectionAlex Deucher1-11/+1
Use the base class rather than the specific class and drop the second loop. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: move gpu reset out of amdgpu_device_suspendAlex Deucher2-5/+6
Move it into the caller. There are cases were we don't want it. We need it for hibernation, but we don't need it for runtime pm, so drop it for runtime pm. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: move pci_save_state into suspend pathAlex Deucher1-1/+1
for amdgpu_device_suspend. This follows the logic in the resume path. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15Revert "drm/radeon: Fix EEH during kexec"Alex Deucher1-8/+0
This reverts commit 6f7fe9a93e6c09bf988c5059403f5f88e17e21e6. This breaks some boards. Maybe just enable this on PPC for now? Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205147 Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/display: fix build error casused by CONFIG_DRM_AMD_DC_DCN2_1Hersen Wu1-3/+0
when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config, there is build error. struct dpm_clocks shoud not be guarded. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/display: hook renoir dc to pplib funcsHersen Wu2-1/+94
enable dc get dmp clock table and set dcn watermarks via pplib. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15dmr/amdgpu: Fix crash on SRIOV for ERREVENT_ATHUB_INTERRUPT interrupt.Andrey Grodzovsky1-0/+6
Ignre the ERREVENT_ATHUB_INTERRUPT for systems without RAS. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-and-tested-by: Jack Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: user pages array memory leak fixPhilip Yang1-6/+2
user_pages array should always be freed after validation regardless if user pages are changed after bo is created because with HMM change parse bo always allocate user pages array to get user pages for userptr bo. v2: remove unused local variable and amend commit v3: add back get user pages in gem_userptr_ioctl, to detect application bug where an userptr VMA is not ananymous memory and reject it. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1844962 Signed-off-by: Philip Yang <[email protected]> Tested-by: Joe Barnett <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add renoir funcs to support dcHersen Wu5-61/+141
there are two paths for renoir dc access smu. one dc access smu directly using bios smc interface: set disply, dprefclk, etc. another goes through pplib for get dpm clock table and set watermmark. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: enable Arcturus runtime VCN dpm on/offEvan Quan2-0/+37
Enable runtime VCN DPM on/off on Arcturus. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: bug fix for pcie parameters overrideKenneth Feng5-44/+98
Bug fix for pcie paramerers override on swsmu. Below is a scenario to have this problem. pptable definition on pcie dpm: 0 -> pcie gen speed:1, pcie lanes: *16 1 -> pcie gen speed:4, pcie lanes: *16 Then if we have a system only have the capbility: pcie gen speed: 3, pcie lanes: *8, we will override dpm 1 to pcie gen speed 3, pcie lanes *8. But the code skips the dpm 0 configuration. So the real pcie dpm parameters are: 0 -> pcie gen speed:1, pcie lanes: *16 1 -> pcie gen speed:3, pcie lanes: *8 Then the wrong pcie lanes will be toggled. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: Fix tdr3 could hang with slow compute issueEmily Deng2-3/+8
When index is 1, need to set compute ring timeout for sriov and passthrough. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: fix potential VM faultsChristian König1-1/+2
When we allocate new page tables under memory pressure we should not evict old ones. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: fix error handling in amdgpu_bo_list_createChristian König1-1/+6
We need to drop normal and userptr BOs separately. Signed-off-by: Christian König <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add RAS support for VML2 and ATCL2Dennis Li1-0/+167
v1: Add codes to query the EDC count of VML2 & ATCL2 v2: Rename VML2/ATCL2 registers and drop their mask define v3: Add back the ECC mask for VML2 registers Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/include: add register define for VML2 and ATCL2Dennis Li2-4/+32
Add VML2 and ATCL2 ECC registers to support VEGA20 RAS Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: change to query the actual EDC counterDennis Li2-325/+498
For the potential request in the future, change to query the actual EDC counter. Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: add BACO platformCaps for VEGA20Le Ma1-0/+3
BACO reset is needed for RAS recovery. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: send EnterBaco msg with argument as RAS recovery flagLe Ma1-3/+8
1 indicates RAS recovery flag in SMU FW. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: avoid disabling ECC if RAS is enabled for VEGA20Le Ma1-5/+7
Program THM_BACO_CNTL.SOC_DOMAIN_IDLE=1 will tell VBIOS to disable ECC when BACO exit. This can save BACO exit time by PSP on none-ECC SKU. Drop the setting for ECC supported SKU. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/soc15: disable doorbell interrupt as part of BACO entry sequenceLe Ma3-0/+19
Workaround to make RAS recovery work in BACO reset. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: Bail earlier when amdgpu.cik_/si_support is not set to 1Hans de Goede2-35/+35
Bail from the pci_driver probe function instead of from the drm_driver load function. This avoid /dev/dri/card0 temporarily getting registered and then unregistered again, sending unwanted add / remove udev events to userspace. Specifically this avoids triggering the (userspace) bug fixed by this plymouth merge-request: https://gitlab.freedesktop.org/plymouth/plymouth/merge_requests/59 Note that despite that being a userspace bug, not sending unnecessary udev events is a good idea in general. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1490490 Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/display: clean up dcn2*_pp_smu functionsAlex Deucher3-6/+7
Use the dcn21 functions in dcn21_resource.c and make the dcn20 functions static since they are only used in dcn20_resource now. Cc: [email protected] Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: re-enable FW_DSTATE feature bitXiaojie Yuan1-4/+1
SMU firmware has fix the bug, so remove this workaround. Signed-off-by: Xiaojie Yuan <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/discovery: reserve discovery data at the top of VRAMXiaojie Yuan5-3/+22
IP Discovery data is TMR fenced by the latest PSP BL, so we need to reserve this region. Tested on navi10/12/14 with VBIOS integrated with latest PSP BL. v2: use DISCOVERY_TMR_SIZE macro as bo size use amdgpu_bo_create_kernel_at() to allocate bo Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/swSMU: custom UMD pstate peak clock for navi14Kevin Wang2-14/+45
add navi14 umd pstate peak clock support. NAVI14_UMD_PSTATE_PEAK_XT_GFXCLK 1670 MHz NAVI14_UMD_PSTATE_PEAK_XTM_GFXCLK 1448 MHz NAVI14_UMD_PSTATE_PEAK_XLM_GFXCLK 1181 MHz NAVI14_UMD_PSTATE_PEAK_XTX_GFXCLK 1717 MHz NAVI14_UMD_PSTATE_PEAK_XL_GFXCLK 1448 MHz Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: enable df cstate control on swSMU routineEvan Quan4-1/+51
Currently this is only supported on Vega20 with 40.50 and later SMC firmware. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: enable df cstate control on powerplay routineEvan Quan5-1/+46
Currently this is only supported on Vega20 with 40.50 and later SMC firmware. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15Merge tag 'scsi-fixes' of ↵Linus Torvalds4-6/+18
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI fixes from James Bottomley: "Five changes, two in drivers (qla2xxx, zfcp), one to MAINTAINERS (qla2xxx) and two in the core. The last two are mostly about removing incorrect messages from the kernel log: the resid message is definitely wrong and the sync cache on protected drive problem is arguably wrong" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: MAINTAINERS: Update qla2xxx driver scsi: zfcp: fix reaction on bit error threshold notification scsi: core: save/restore command resid for error handling scsi: qla2xxx: Remove WARN_ON_ONCE in qla2x00_status_cont_entry() scsi: sd: Ignore a failure to sync cache due to lack of authorization
2019-10-15net: ethernet: broadcom: have drivers select DIMLIB as neededRandy Dunlap1-1/+3
NET_VENDOR_BROADCOM is intended to control a kconfig menu only. It should not have anything to do with code generation. As such, it should not select DIMLIB for all drivers under NET_VENDOR_BROADCOM. Instead each driver that needs DIMLIB should select it (being the symbols SYSTEMPORT, BNXT, and BCMGENET). Link: https://lkml.kernel.org/r/[email protected]/ Fixes: 4f75da3666c0 ("linux/dim: Move implementation to .c files") Reported-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Randy Dunlap <[email protected]> Cc: Uwe Kleine-König <[email protected]> Cc: Tal Gilboa <[email protected]> Cc: Saeed Mahameed <[email protected]> Cc: [email protected] Cc: [email protected] Cc: "David S. Miller" <[email protected]> Cc: Jakub Kicinski <[email protected]> Cc: Doug Ledford <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Leon Romanovsky <[email protected]> Cc: Or Gerlitz <[email protected]> Cc: Sagi Grimberg <[email protected]> Acked-by: Florian Fainelli <[email protected]> Reviewed-by: Leon Romanovsky <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-15net: bcmgenet: Set phydev->dev_flags only for internal PHYsFlorian Fainelli1-2/+3
phydev->dev_flags is entirely dependent on the PHY device driver which is going to be used, setting the internal GENET PHY revision in those bits only makes sense when drivers/net/phy/bcm7xxx.c is the PHY driver being used. Fixes: 487320c54143 ("net: bcmgenet: communicate integrated PHY revision to PHY driver") Signed-off-by: Florian Fainelli <[email protected]> Acked-by: Doug Berger <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-10-15drm/i915/tgl: Wa_1607138340Mika Kuoppala1-0/+4
Avoid possible cs hang with semaphores by disabling lite restore. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Wa_1607030317, Wa_1607186500, Wa_1607297627Mika Kuoppala2-0/+9
Disable semaphore idle messages and wait for event power downs. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Wa_1607138336Mika Kuoppala2-0/+7
Avoid possible deadlock on context switch. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Wa_1409600907Mika Kuoppala1-0/+4
To avoid possible hang, we need to add depth stall if we flush the depth cache. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Wa_1409170338Mika Kuoppala1-0/+6
Avoid possible hang in tsg,vfe units by keeping l3 clocks runnings. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Wa_1409420604Mika Kuoppala2-0/+8
Avoid possible hang in CPSS unit. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Keep FF dop clock enabled for A0Mika Kuoppala2-1/+9
To ensure correct state data for compute workloads, we need to keep the ff dop clock enabled. References: HSDES#1606700617 Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Add extra hdc flush workaroundMika Kuoppala1-0/+20
In order to ensure constant caches are invalidated properly with a0, we need extra hdc flush after invalidation. v2: use IS_TGL_REVID (Chris) References: HSDES#1604544889 Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Add HDC Pipeline FlushMika Kuoppala2-1/+4
Add hdc pipeline flush to ensure memory state is coherent in L3 when we are done. v2: Flush also in breadcrumbs (Chris) Cc: Chris Wilson <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Include ro parts of l3 to invalidateMika Kuoppala2-0/+2
Aim for completeness and invalidate also the ro parts in l3 cache. This might allow to get rid of the preparser disable/enable workaround on invalidation path. Cc: Chris Wilson <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/tgl: Add IS_TGL_REVIDMika Kuoppala1-0/+5
We are going to need this macro on limiting the workaround scope. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15drm/i915/icl: Wa_1607087056Mika Kuoppala2-0/+7
Avoid possible hang in tsg,vfe units by keeping l3 clocks runnings. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-15Merge tag 'wireless-drivers-for-davem-2019-10-15' of ↵David S. Miller11-189/+239
git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers Kalle Valo says: ==================== wireless-drivers fixes for 5.4 Second set of fixes for 5.4. ath10k regression and iwlwifi BAD_COMMAND bug are the ones getting most reports at the moment. ath10k * fix throughput regression on QCA98XX iwlwifi * fix initialization of 3168 devices (the infamous BAD_COMMAND bug) * other smaller fixes rt2x00 * don't include input-polldev.h header * fix hw reset to work during first 5 minutes of system run ==================== Signed-off-by: David S. Miller <[email protected]>
2019-10-15drm/panfrost: Handle resetting on timeout betterSteven Price1-5/+11
Panfrost uses multiple schedulers (one for each slot, so 2 in reality), and on a timeout has to stop all the schedulers to safely perform a reset. However more than one scheduler can trigger a timeout at the same time. This race condition results in jobs being freed while they are still in use. When stopping other slots use cancel_delayed_work_sync() to ensure that any timeout started for that slot has completed. Also use mutex_trylock() to obtain reset_lock. This means that only one thread attempts the reset, the other threads will simply complete without doing anything (the first thread will wait for this in the call to cancel_delayed_work_sync()). While we're here and since the function is already dependent on sched_job not being NULL, let's remove the unnecessary checks. Fixes: aa20236784ab ("drm/panfrost: Prevent concurrent resets") Tested-by: Neil Armstrong <[email protected]> Signed-off-by: Steven Price <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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