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AgeCommit message (Expand)AuthorFilesLines
2012-04-20drm: replace open-coded ARRAY_SIZE with macroJim Cromie1-4/+3
2012-04-20drm/edid: add missing NULL checks.Takashi Iwai1-0/+6
2012-04-20drm/edid: Generate modes from extra_modes for range descriptorsAdam Jackson1-0/+73
2012-04-20drm/edid: Add extra_modesAdam Jackson1-0/+11
2012-04-20drm/edid: Give the est3 mode struct a real nameAdam Jackson1-2/+4
2012-04-20drm/edid: Do drm_dmt_modes_for_range() for all range descriptor typesAdam Jackson1-5/+6
2012-04-20drm/edid: Fix some comment typos in the DMT mode listAdam Jackson1-5/+5
2012-04-20drm/edid: Add the reduced blanking DMT modes to the DMT listAdam Jackson1-1/+93
2012-04-20drm/edid: s/drm_gtf_modes_for_range/drm_dmt_modes_for_range/Adam Jackson1-2/+2
2012-04-20drm/edid: Remove a misleading commentAdam Jackson1-4/+0
2012-04-20drm/edid: Allow drm_mode_find_dmt to hunt for reduced-blanking modesAdam Jackson2-14/+25
2012-04-20drm/edid: Rewrite drm_mode_find_dmt search loopAdam Jackson1-9/+10
2012-04-20drm/edid: Document drm_mode_find_dmtAdam Jackson1-0/+10
2012-04-20drm: add DRM_MODE_FLAG_DBLCLK to CEA modes requiring itPaulo Zanoni1-16/+22
2012-04-20drm: add the VIC number to the CEA EDID modesPaulo Zanoni1-64/+64
2012-04-20drm: Parse color format information in CEA blocksLars-Peter Clausen1-10/+21
2012-04-20drm: Fix EDID color format parsingLars-Peter Clausen1-4/+4
2012-04-20drm: Add sanity checks to framebuffer creationVille Syrjälä1-4/+43
2012-04-20drm: Add drm_format_{horz, vert}_chroma_subsampling() utility functionsVille Syrjälä1-0/+60
2012-04-20drm: Add drm_format_plane_cpp() utility functionVille Syrjälä1-0/+45
2012-04-20drm: Move drm_format_num_planes() to drm_crtc.cVille Syrjälä2-33/+32
2012-04-20drm/i915: invalidate render cache on gen2Daniel Vetter1-1/+1
2012-04-18drm/i915: Silence the change of LVDS sync polarityChris Wilson1-30/+7
2012-04-18drm/i915: add generic power management initializationEugeni Dodonov3-202/+180
2012-04-18drm/i915: move clock gating functionality into intel_pm moduleEugeni Dodonov3-354/+370
2012-04-18drm/i915: move emon functionality into intel_pm moduleEugeni Dodonov2-86/+86
2012-04-18drm/i915: move drps, rps and rc6-related functions to intel_pmEugeni Dodonov3-513/+514
2012-04-18drm/i915: fix line breaks in intel_pmEugeni Dodonov1-3/+7
2012-04-18drm/i915: move watermarks settings into intel_pm moduleEugeni Dodonov3-1476/+1496
2012-04-18drm/i915: move fbc-related functionality into intel_pm moduleEugeni Dodonov4-484/+537
2012-04-18drm/i915: Refactor get_fence() to use the common fence writing routineChris Wilson1-43/+27
2012-04-18drm/i915: Refactor fence clearing to use the common fence writing routineChris Wilson1-53/+9
2012-04-18drm/i915: Refactor put_fence() to use the common fence writing routineChris Wilson1-11/+51
2012-04-18drm/i915: Prepare to consolidate fence writingChris Wilson1-103/+108
2012-04-18drm/i915: Remove the unsightly "optimisation" from flush_fence()Chris Wilson1-13/+5
2012-04-18drm/i915: Simplify fence findingChris Wilson1-13/+3
2012-04-18drm/i915: Discard the unused obj->last_fenced_ringChris Wilson2-14/+7
2012-04-18drm/i915: Remove unused ring->setup_seqnoChris Wilson2-18/+0
2012-04-18drm/i915: Remove fence pipeliningChris Wilson1-119/+36
2012-04-18drm/i915: Remove the pipelined parameter from get_fence()Chris Wilson4-8/+6
2012-04-18drm/i915: Wait for all pending operations to the fb before disabling the pipeChris Wilson1-23/+4
2012-04-18drm/i915: Don't set a MBZ bit in gen2/3 MI_FLUSHChris Wilson1-16/+39
2012-04-18drm/i915: intel_update_fbc() requires struct_mutex, so no longer atomicChris Wilson1-9/+6
2012-04-18drm/i915: Unpin the flip target if we fail to queue the flipChris Wilson1-15/+35
2012-04-18drm/i915: [GEN7] Use HW scheduler for fixed function shadersBen Widawsky2-0/+29
2012-04-18drm/i915: Replace open coded MI_BATCH_GTTChris Wilson2-2/+4
2012-04-18drm/i915: Always flush tiling changes before accessing through the GTTChris Wilson1-1/+5
2012-04-18drm/i915: [sparse] don't use variable size arraysBen Widawsky1-6/+18
2012-04-18drm/i915: [sparse] trivial sparse fixesBen Widawsky9-7/+15
2012-04-18drm/i915: IBX+ doesn't have separate vsync/hsync controls on the VGA DACJesse Barnes1-11/+43
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