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Aldebaran has 48-bit physical address support
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Harish Kasiviswanathan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use IP version and refactor reset logic to apply to a list of devices.
Signed-off-by: Lijo Lazar <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Le Ma <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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drm/amd/display: 3.2.175
This version brings along following fixes:
- Remove invalid RDPCS Programming in DAL
- Make functional resource functions non-static
- Reset VIC if HDMI_VIC is present
- Add frame alternate 3D & restrict HW packed on dongles
- Reg to turn on/off PSR Power seq in FSM
- Modify plane removal sequence to avoid hangs
- Pass HostVM enable flag into DCN3.1 DML
- DC Validation failures
- Program OPP before ODM
- Refactor fixed VS w/a for PHY tests
- Pass deep sleep disabled allow info to dmub fw
- Refine the EDID override
- [FW Promotion] Release 0.0.106.0
- Add verify_link_cap back for hdmi
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
hdmi specific: add verify link cap after retrive link cap.
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Charlene Liu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Acked-by: Alan Liu <[email protected]>
Signed-off-by: Anthony Koo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
We already get the SBIOS EDID via ACPI on KMD,
but after that, we just use the monitor EDID to set it HDR caps
[How]
Make the SBIOS EDID override to read_edid()
That can change the read EDID caps from the right EDID
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: jinzh <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
The deep sleep mode need to be disabled in some PSR scenario.
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Robin Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why/How]
Refactor original w/a to unify naming and
simplify logic. This also re-enables the code
that was previously skipped due to the
disabling of the previous workaround logic.
Reviewed-by: Wenjing Liu <[email protected]>
Reviewed-by: Nevenko Stupar <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY]
HW expects OPP to be configured before ODM is enabled.
Failure to do so can cause errors.
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Wesley Chalmers <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY]
Calculations differ with HostVM enabled/disabled, causing underflow in
configs with high refresh displays + scaling due to lower available BW
[HOW]
Check riommu_active in order to pass correct HostVM enablement to DML
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Michael Strauss <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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In the downstream kernels for exynos4 and exynos5 devices, there is an
undocumented register that controls the order of the RGB output. It can
be set to either normal order or reversed, which enables BGR support for
those SoCs.
This patch enables the BGR support for all the SoCs that were found to
have at least one device with this logic in the corresponding downstream
kernels.
Signed-off-by: Martin Jücker <[email protected]>
Signed-off-by: Inki Dae <[email protected]>
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TE-gpio, if defined, is placed in the panel's node, not the parent DSI
node. Change the devm_gpiod_get_optional() to gpiod_get_optional() and
pass proper device node to it. The code already has a proper cleanup
path, so it looks that the devm_* variant has been applied accidentally
during the conversion to gpiod API.
Fixes: ee6c8b5afa62 ("drm/exynos: Replace legacy gpio interface for gpiod interface")
Signed-off-by: Marek Szyprowski <[email protected]>
Fixed a typo.
Signed-off-by: Inki Dae <[email protected]>
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TE-gpio is optional and if it is not found then gpiod_get_optional()
returns NULL. In such case the code will continue and try to convert NULL
gpiod to irq what in turn fails. The failure is then propagated and driver
is not registered.
Fix this by returning early from exynos_dsi_register_te_irq() if no
TE-gpio is found.
Fixes: ee6c8b5afa62 ("drm/exynos: Replace legacy gpio interface for gpiod interface")
Signed-off-by: Marek Szyprowski <[email protected]>
Signed-off-by: Inki Dae <[email protected]>
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platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.
In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Inki Dae <[email protected]>
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platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.
In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Inki Dae <[email protected]>
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platform_get_resource_byname(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.
In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq_byname().
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Inki Dae <[email protected]>
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platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.
In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Inki Dae <[email protected]>
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platform_get_resource_byname(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.
In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq_byname().
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Inki Dae <[email protected]>
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https://gitlab.freedesktop.org/drm/msm into drm-next
We're experimenting a bit with the process this time, with Dmitry
collecting display patches and merging them into msm-next with me
handling the gpu/etc side of things. Summary of interesting new bits
and pieces
* dpu + dp support for sc8180x
* dp support for sm8350
* dpu + dsi support for qcm2290
* 10nm dsi phy tuning support
* bridge support for dp encoder
* gpu support for additional 7c3 SKUs
* assorted cleanups and fixes
Signed-off-by: Dave Airlie <[email protected]>
From: Rob Clark <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGu=Jdrw6DqYOYPTMks7=zatrsvdR=o6DpjqZ=TQQhFZuw@mail.gmail.com
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git://anongit.freedesktop.org/drm/drm-intel into drm-next
Cross-subsystem Changes:
- drm-next backmerge for buddy allocator changes
Driver Changes:
- Skip i915_perf init for DG2 as it is not yet enabled (Ram)
- Add missing workarounds for DG2 (Clint)
- Add 64K page/align support for platforms like DG2 that require it (Matt A, Ram, Bob)
- Add accelerated migration support for DG2 (Matt A)
- Add flat CCS support for XeHP SDV (Abdiel, Ram)
- Add Compute Command Streamer (CCS) engine support for XeHP SDV (Michel,
Daniele, Aravind, Matt R)
- Don't support parallel submission on compute / render (Matt B, Matt R)
- Disable i915 build on PREEMPT_RT until RT behaviour fixed (Sebastian)
- Remove RPS interrupt support for TGL+ (Jose)
- Fix S/R with PM_EARLY for non-GTT mappable objects on DG2 (Matt, Lucas)
- Skip stolen memory init if it is fully reserved (Jose)
- Use iosys_map for GuC data structures that may be in LMEM BAR or SMEM (Lucas)
- Do not complain about stale GuC reset notifications for banned contexts (John)
- Move context descriptor fields to intel_lrc.h
- Start adding support for small BAR (Matt A)
- Clarify vma lifetime (Thomas)
- Simplify subplatform detection on TGL (Jose)
- Correct the param count for unset GuC SLPC param (Vinay, Umesh)
- Read RP_STATE_CAP correctly on Gen12 with GuC SLPC (Vinay)
- Initialize GuC submission locks and queues early (Daniele)
- Fix GuC flag query helper function to not modify state (John)
- Drop fake lmem support now we have real hardware available (Lucas)
- Move misplaced W/A to their correct locations (Srinivasan)
- Use get_reset_domain() helper (Tejas)
- Move context descriptor fields to intel_lrc.h (Matt R)
- Selftest improvements (Matt A)
Signed-off-by: Dave Airlie <[email protected]>
From: Joonas Lahtinen <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v5.18:
UAPI Changes:
Cross-subsystem Changes:
- Improve performance of some fbdev ops, in some cases up to 6x faster.
Core Changes:
- Some small DP fixes.
- Find panels in subnodes of OF devices, and add of_get_drm_panel_display_mode
to retrieve mode.
- Add drm_object_property_get_default_value and use it for resetting
zpos in plane state reset, removing the need for individual drivers
to do it.
- Same for color encoding and color range props.
- Update panic handling todo doc.
- Add todo that format conversion helpers should be sped up similarly to fbdev ops.
Driver Changes:
- Add panel orientation property to simpledrm for quirked panels.
- Assorted small fixes to tiny/repaper, nouveau, stm, omap, ssd130x.
- Add crc support to stm/ltdc.
- Add MIPI DBI compatible SPI driver
- Assorted small fixes to tiny panels and bridge drivers.
- Add AST2600 support to aspeed.
Signed-off-by: Dave Airlie <[email protected]>
From: Maarten Lankhorst <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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- R-Car LVDS support for M3-W+ (R8A77961) SoC
- R-Car DU misc fixes and cleanups
Signed-off-by: Dave Airlie <[email protected]>
From: Laurent Pinchart <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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https://gitlab.freedesktop.org/drm/tegra into drm-next
drm/tegra: Changes for v5.18-rc1
This contains a couple more minor fixes that didn't seem urgent enough
for v5.17. On top of that this improves YUV format support on older
chips.
Signed-off-by: Dave Airlie <[email protected]>
From: Thierry Reding <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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On Gen3 hardware enabling a VSP plane doesn't change any register that
requires DRES to take effect. Avoid a group restart in that case.
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Kieran Bingham <[email protected]>
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The VSP1 sink selection through register DEFR8 is only available on Gen2
hardware. Skip it on Gen3.
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Kieran Bingham <[email protected]>
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The rcar-du driver goes to great lengths to preserve device tree
backward compatibility for the LVDS encoders by patching old device
trees at runtime.
The last R-Car Gen2 platform was converted to the new bindings commit
edb0c3affe5214a2 ("ARM: dts: r8a7793: Convert to new LVDS DT bindings"),
in v4.17, and the last RZ/G1 platform converted in commit
6a6a797625b5fe85 ("ARM: dts: r8a7743: Convert to new LVDS DT bindings"),
in v5.0. Both are older than commit 58256143cff7c2e0 ("clk: renesas:
Remove R-Car Gen2 legacy DT clock support"), in v5.5, which removes
support for legacy bindings for clocks. The LVDS compatibility code is
thus not needed anymore. Drop it.
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Kieran Bingham <[email protected]>
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The M3-W+ SoC has the same LVDS encoder as other R-Car Gen3 chips.
Add support for M3-W+ (R8A77961) SoC to the LVDS encoder driver.
Signed-off-by: Nikita Yushchenko <[email protected]>
Reviewed-by: Laurent Pinchart <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
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Pointer mode is being assigned a value that is never read, it is
being re-assigned later with a new value. The initialization is
redundant and can be removed.
Cleans up clang scan build warning:
drivers/gpu/drm/solomon/ssd130x.c:582:27: warning: Value stored
to 'mode' during its initialization is never read [deadcode.DeadStores]
Signed-off-by: Colin Ian King <[email protected]>
Acked-by: Javier Martinez Canillas <[email protected]>
Signed-off-by: Javier Martinez Canillas <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Remove the redundant null check since the caller ensures
that 'ctx' is never NULL.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Weiguo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Leftover from bring up. Not used anymore.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Leftover from bring up. Not used anymore.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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These were leftover from bring up and are no longer
necessary. The information is available via
the IP discovery table.
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Rather than checking the asic_type.
Reviewed-by: Guchun Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Dillon Varone <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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structure changed in smc_fw_version >= 0x3A4900,
"uint16_t VcnActivityPercentage" replaced with
"uint16_t VcnUsagePercentage0" and "uint16_t VcnUsagePercentage1"
Signed-off-by: Danijel Slivka <[email protected]>
Acked-by: Evan Quan <[email protected]>
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Enable gfxoff routine for GC 10.3.7.
Signed-off-by: Prike Liang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Enable gfx power gating for GC 10.3.7.
Signed-off-by: Prike Liang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This will enable the following block clock gating.
- MC
- SDMA
- HDP
- ATHUB
- IH
- VCN/JPEG
Signed-off-by: Prike Liang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Enable gfx cg gate/ungate control for GC 10.3.7.
Signed-off-by: Prike Liang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Regression has been reported that suspend/resume may hang with
the previous vm ready check commit.
So bring back the evicted list check as a temp fix.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1922
Fixes: c1a66c3bc425 ("drm/amdgpu: check vm ready by amdgpu_vm->evicting flag")
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Qiang Yu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
As PSP needs to verify the signature, CAP firmware must be loaded first when PSP loads firmwares.
Otherwise, when DFC feature is enabled, CP firmwares would be loaded failed.
[ 1149.160480] [drm] MM table gpu addr = 0x800022f000, cpu addr = 00000000a62afcea.
[ 1149.209874] [drm] failed to load ucode CP_CE(0x8)
[ 1149.209878] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.215914] [drm] failed to load ucode CP_PFP(0x9)
[ 1149.215917] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.221941] [drm] failed to load ucode CP_ME(0xA)
[ 1149.221944] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.228082] [drm] failed to load ucode CP_MEC1(0xB)
[ 1149.228085] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.234209] [drm] failed to load ucode CP_MEC2(0xD)
[ 1149.234212] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.242379] [drm] failed to load ucode VCN(0x1C)
[ 1149.242382] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[How]
Move CAP UCODE ID to the beginning of AMDGPU_UCODE_ID enum list.
Signed-off-by: Yifan Zha <[email protected]>
Reviewed-by: Bokun Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This will allow to enable the tests only after latest fix
after which the tests passed on my system.
I tested on NV21 standalone and Vega 10 and Polaris as
pair with DRI_PRIME.
It's possible there might be still issues on ASICs i don't
have at my posession but that that the point of enbling
the tests finally - if other people during testing will
encounter errors they will report and I will be able to fix.
The releated merge request for enabling libdrm tests suite is in
https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/227
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Protect with drm_dev_enter/exit
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use IP version rather than codename for noretry set.
Acked-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Yifan Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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otherwise adev->ip_versions is still empty when amdgpu_gmc_noretry_set
is called.
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Yifan Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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1. Define amdgpu_ras_block_late_fini_default in amdgpu_ras.c as
.ras_fini common function, which is called when
.ras_fini of ras block isn't initialized.
2. Remove the code of using amdgpu_ras_block_late_fini to
initialize .ras_fini in ras blocks.
Signed-off-by: yipechai <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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block
Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block.
Signed-off-by: yipechai <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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block
Remove redundant calls of amdgpu_ras_block_late_fini in sdma ras block.
Signed-off-by: yipechai <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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block
Remove redundant calls of amdgpu_ras_block_late_fini in hdp ras block.
Signed-off-by: yipechai <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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block
Remove redundant calls of amdgpu_ras_block_late_fini in xgmi ras block.
Signed-off-by: yipechai <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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