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2024-04-08drm/i915/psr: Disable PSR when bigjoiner is usedVille Syrjälä1-0/+11
Bigjoiner seem to be causing all kinds of grief to the PSR code currently. I don't believe there is any hardware issue but the code simply not handling this correctly. For now just disable PSR when bigjoiner is needed. Cc: [email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Arun R Murthy <[email protected]> Acked-by: Jouni Högander <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
2024-04-08drm/xe/display: clean up compat i915_vgpu.hJani Nikula1-26/+0
There's a bunch of unnecessary stuff not needed by display code. Remove. Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e583679c00aae8fec78f988fa857cfc724a9fa2d.1712345787.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-04-08drm/xe/display: remove compat i915_gem.hJani Nikula2-10/+0
It's only there for GEM_BUG_ON(), but the display code no longer uses it. Good riddance. Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/8de7815d9c80125b86e0b85a1af80d4f8686eef6.1712345787.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-04-08drm/xe/display: clean up a lot of cruft from compat i915_drv.hJani Nikula1-32/+0
There's a bunch of unused cruft. Just throw away. Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/d773f26cced0b376a30a6cb1e38c9581b469d8cf.1712345787.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-04-08drm/i915: move i915_fixed.h to display/intel_fixed.hJani Nikula3-7/+1
All the users are in display, move the fixed point header under display. We could also consider making these more general purpose things, but that takes a bunch more effort. This allows the immediate cleanup of xe compat i915_fixed.h. Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/320c451e116c7807e544a50c67ba79b087a4f218.1712345787.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-04-08drm/i915/dmc: define firmware URL locallyJani Nikula3-13/+3
Avoid the dependency on intel_uc_fw.h, and allow removal of xe compat intel_uc_fw.h. If there needs to be duplication of the URL, at least have the duplication in a sensible way. Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/15935837a0c15f861bb2a688cc53514f47153ef3.1712345787.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-04-08drm/i915: use IS_JASPERLAKE()/IS_ELKHARTLAKE() instead of IS_PLATFORM()Jani Nikula1-2/+2
Avoid direct IS_PLATFORM() usage when we have the platform helpers. Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/7ca5fabac6a6f5ac8e102b84d1e28502e79296f0.1712345787.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-04-08drm/i915/psr: Panel replay has to be enabled before link trainingJouni Högander4-3/+23
Panel replay has to be enabled on sink side before link training. Take this into account in fastset check and in initial fastset check. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-08drm/i915/psr: Unify panel replay enable/disable sinkJouni Högander3-23/+50
Unify enabling and disabling of psr/panel replay for a sink. Modify intel_psr_enable_sink accordingly and use it for both cases. v3: - move psr2_su_region_et_valid to be check for PSR2 only v2: - enable panel replay for sink before link training - write ALPM_CONFIG only for PSR - add DP_PSR_CRC_VERIFICATION only for PSR - take care of disable sink as well Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-08drm/i915/psr: Do not write registers/bits not applicable for panel replayJouni Högander1-25/+45
Bspec is saying this mask register: Only PSR_MASK[Mask FBC modify] and PSR_MASK[Mask Hotplug] are used in panel replay mode. Status register: Only SRD_STATUS[SRD state] field is used in panel replay mode. Due to this stop writing and reading registers and bits not used by panel replay if panel replay is used. Bspec: 53370, 68920 v2: - use intel_dp_is_edp with PSR_MASK register - handle LunarLake as well - hanle ALPM configuration as well Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-08drm/i915/psr: Check possible errors for panel replay as wellJouni Högander1-5/+16
On HPD interrupt we want to check if the reason for HPD was some panel replay error detected by monitor/panel. This is already done for PSR. We want to do this for panel replay as well. Modify intel_psr_short_pulse to support panel replay as well. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-08drm/i915/psr: Do not update phy power state in case of non-eDP panel replayJouni Högander1-4/+8
Currently panel replay is supporting only main link on mode -> Do not update phy power state for non-eDP panel replay. Bspec: 53370 v2: use intel_dp_is_edp to differentiate Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-08drm/i915/psr: Intel_psr_pause/resume needs to support panel replayJouni Högander1-2/+2
Currently intel_psr_pause and intel_psr_resume do nothing in case of panel replay. Change them to perform pause and return also in case of panel replay. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-08drm/i915/psr: Set intel_crtc_state->has_psr on panel replay as wellJouni Högander1-5/+6
Current code is setting only intel_crtc_state->has_panel_replay in panel replay case. There are lots of stuff behind intel_crtc_state->has_psr that is needed for panel replay as well. Instead of converting each check to has_psr || has_panel_replay set has_psr in case of panel replay as well. Code can then differentiate between psr and panel replay by using intel_crtc_state->has_panel_replay. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-08drm/i915/psr: Add some documentation of variables used in psr codeJouni Högander1-0/+16
We are adding more boolean variable into intel_psr and intel_crtc_state structs. Add some documentation about these for sake of clarity. v2: Modify has_psr + has_panel_replay to mean panel replay Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-06drm/i915: Fix i915_display_info output when connectors are not activeVille Syrjälä1-11/+3
Currently intel_connector_info(), which prints the per-connector output for i915_display_info, just bails out early if the connector doesn't have a current encoder. That leads to very confusing output where some of your connected (and properly detected) outputs appear to have no enumerated modes. Get rid of the encoder stuff and just rely on the connector itself so that the output is always consistent. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Suraj Kandpal <[email protected]>
2024-04-05drm/i915/hdcp: Fix get remote hdcp capability functionSuraj Kandpal1-1/+4
HDCP 1.x capability needs to be checked even if setup is not HDCP 2.x capable. --v2 -Assign hdcp_capable and hdcp2_capable to false [Chaitanya] --v3 -Fix variable assignment [Chaitanya] Fixes: 813cca96e4ac ("drm/i915/hdcp: Add new remote capability check shim function") Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Chaitanya Kumar Borah <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-05drm/i915/display: Initialize capability variablesSuraj Kandpal1-1/+1
Initialize HDCP capability variables to false to avoid UBSAN warning in boolean value as some functions invoking this could return without filling the two capability values. --v2 -Fix Typo [Chaitanya] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Chaitanya Kumar Borah <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Optimize out redundant dbuf slice updatesVille Syrjälä1-9/+18
if the new dbuf slices are a superset of the old dbuf slices then we don't have to do anything in intel_dbuf_post_plane_update(). Restructure the code to skip such redundant dbuf slice updates. The main benefit is slightly less confusing logs. Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Use a plain old int for the cdclk/mdclk ratioVille Syrjälä4-9/+13
No point in throwing around u8 when we're dealing with just an integer. Use a plain old boring 'int'. Reviewed-by: Uma Shankar <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Implement vblank synchronized MBUS join changesStanislav Lisovskiy3-38/+92
Currently we can't change MBUS join status without doing a modeset, because we are lacking mechanism to synchronize those with vblank. However then this means that we can't do a fastset, if there is a need to change MBUS join state. Fix that by implementing such change. We already call correspondent check and update at pre_plane dbuf update, so the only thing left is to have a non-modeset version of that. If active pipes stay the same then fastset is possible and only MBUS join state/ddb allocation updates would be committed. The full mbus/cdclk sequence will look as follows: 1. disable pipes 2. increase cdclk if necessary 2.1 reprogram cdclk 2.2 update dbuf tracker value 3. enable mbus joining if necessary 3.1 update mbus_ctl 3.2 update dbuf tracker value 4. reallocate dbuf for planes on active pipes 5. disable mbus joining if necessary 5.1 update dbuf tracker value 5.2 update mbus_ctl 6. enable pipes 7. decrease cdclk if necessary 7.1 update dbuf tracker value 7.2 reprogram cdclk And in order to keep things in sync we need: Step 2: - mbus_join == old - mdclk/cdclk ratio == new Step 3: - mbus_join == new - mdclk/cdclk ratio == old when cdclk is changing in step 7 - mdclk/cdclk ratio == new when cdclk is changing in step 2 Step 5: - mbus_join == new - mdclk/cdclk ratio == old when cdclk is changing in step 7 - mdclk/cdclk ratio == new when cdclk is changing in step 2 Step 7: - mbus_join == new - mdclk/cdclk ratio == new v2: - Removed redundant parentheses(Ville Syrjälä) - Constified new_crtc_state in intel_mbus_joined_pipe(Ville Syrjälä) - Removed pipe_select variable(Ville Syrjälä) [v3: vsyrjala: Correctly sequence vs. cdclk updates, properly describe the full sequence, shuffle code around to make the diff more legible, streamline a few things] [v4: vsyrjala: Move the intel_cdclk_is_decreasing_later() stuff to a separate patch] Cc: Gustavo Sousa <[email protected]> Reviewed-by: Uma Shankar <[email protected]> #v3 Signed-off-by: Stanislav Lisovskiy <[email protected]> Co-developed-by: Ville Syrjälä <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Use the correct mdclk/cdclk ratio in MBUS updatesVille Syrjälä3-11/+20
The current cdclk/mbus programming sequence is as follows: 1. intel_set_cdclk_pre_plane_update() 2. update_mbus_pre_enable() 3. intel_set_cdclk_post_plane_update() when the actual mdclk/cdclk programming is postponed to intel_set_cdclk_post_plane_update() we must keep using the old mdclk/cdclk ratio during update_mbus_pre_enable(). This guarantees the programmed ratio matches the rest of the hardware state (mdlk/cdclk/mbus joining). v2: Extracted from the vblank synchronized mbus programming patch Cc: Gustavo Sousa <[email protected]> Reviewed-by: Uma Shankar <[email protected]> #v1 Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Use old mbus_join value when increasing CDCLKStanislav Lisovskiy1-0/+6
In order to make sure we are not breaking the proper sequence let's do updates step by step and don't change MBUS join value during MDCLK/CDCLK programming stage. MBUS join programming would be taken care by pre/post ddb hooks. v2: - Reworded comment about using old mbus_join value in intel_set_cdclk(Ville Syrjälä) Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Stanislav Lisovskiy <[email protected]> [v3: vsyrjala: rebase on top of cdclk changes, reword a bit more] Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Add debugs for mbus joining and dbuf ratio programmingVille Syrjälä1-0/+9
Add some debugs so that we can actually observe what is actually happening during the mbus/dbuf programming steps. We can just shove them into fairly low level functions as none of them are called during any critical sections/etc. Reviewed-by: Uma Shankar <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Extract intel_dbuf_mdclk_min_tracker_update()Ville Syrjälä1-18/+25
Extract the stuff that writes the dbuf/mbus ratio stuff into its own function. Will help with correctly sequencing the operations done during mbus programming. Reviewed-by: Uma Shankar <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Extract intel_dbuf_mbus_join_update()Ville Syrjälä1-11/+24
Extact the stuff that writes the joining bits in MBUS_CTL into its own function. Will help with correctly sequencing the operations done during mbus programming. Reviewed-by: Uma Shankar <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Relocate intel_mbus_dbox_update()Ville Syrjälä1-83/+83
intel_mbus_dbox_update() will become static soon. Relocate it into a place that avoids having to add a forward declaration for it. Reviewed-by: Uma Shankar <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915: Loop over all active pipes in intel_mbus_dbox_updateStanislav Lisovskiy1-6/+1
We need to loop through all active pipes, not just the ones, that are in current state, because disabling and enabling even a particular pipe affects credits in another one. Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Stanislav Lisovskiy <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/cdclk: Indicate whether CDCLK change happens during pre or post ↵Ville Syrjälä1-13/+6
plane update Currently we just get a plain "Changing CDCLK to ..." in the logs. It would actually be interesting to see whether we're doing the programming during the pre or post plane phase of the commit. Include that information in the debug message. Reviewed-by: Uma Shankar <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/cdclk: Drop tgl/dg2 cdclk bump hacksVille Syrjälä1-19/+0
No one ever figured out why bumping the cdclk helped with whatever issue we were having at the time. Remove the hacks and start from scratch so that we can actually see if any problems still remain. Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/cdclk: Fix voltage_level programming edge caseVille Syrjälä1-10/+27
Currently we only consider the relationship of the old and new CDCLK frequencies when determining whether to do the repgramming from intel_set_cdclk_pre_plane_update() or intel_set_cdclk_post_plane_update(). It is technically possible to have a situation where the CDCLK frequency is decreasing, but the voltage_level is increasing due a DDI port. In this case we should bump the voltage level already in intel_set_cdclk_pre_plane_update() (so that the voltage_level will have been increased by the time the port gets enabled), while leaving the CDCLK frequency unchanged (as active planes/etc. may still depend on it). We can then reduce the CDCLK frequency to its final value from intel_set_cdclk_post_plane_update(). In order to handle that correctly we shall construct a suitable amalgam of the old and new cdclk states in intel_set_cdclk_pre_plane_update(). And we can simply call intel_set_cdclk() unconditionally in both places as it will not do anything if nothing actually changes vs. the current hw state. v2: Handle cdclk_state->disable_pipes v3: Only synchronize the cd2x update against the pipe's vblank when the cdclk frequency is changing during the current commit phase (Gustavo) Cc: [email protected] Cc: Gustavo Sousa <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/cdclk: Fix CDCLK programming order when pipes are activeVille Syrjälä2-2/+8
Currently we always reprogram CDCLK from the intel_set_cdclk_pre_plane_update() when using squash/crawl. The code only works correctly for the cd2x update or full modeset cases, and it was simply never updated to deal with squash/crawl. If the CDCLK frequency is increasing we must reprogram it before we do anything else that might depend on the new higher frequency, and conversely we must not decrease the frequency until everything that might still depend on the old higher frequency has been dealt with. Since cdclk_state->pipe is only relevant when doing a cd2x update we can't use it to determine the correct sequence during squash/crawl. To that end introduce cdclk_state->disable_pipes which simply indicates that we must perform the update while the pipes are disable (ie. during intel_set_cdclk_pre_plane_update()). Otherwise we use the same old vs. new CDCLK frequency comparsiong as for cd2x updates. The only remaining problem case is when the voltage_level needs to increase due to a DDI port, but the CDCLK frequency is decreasing (and not all pipes are being disabled). The current approach will not bump the voltage level up until after the port has already been enabled, which is too late. But we'll take care of that case separately. v2: Don't break the "must disable pipes case" v3: Keep the on stack 'pipe' for future use Cc: [email protected] Fixes: d62686ba3b54 ("drm/i915/adl_p: CDCLK crawl support for ADL") Reviewed-by: Uma Shankar <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/display: Read/Write Adaptive Sync SDPMitul Golani2-0/+2
Add read/write calls for Adaptive Sync SDP. Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/display: Compute vrr_vsync paramsMitul Golani4-2/+41
Compute vrr_vsync_start/end, which sets the position for hardware to send the Vsync at a fixed position relative to the end of the Vblank. --v2: - Updated VSYNC_START/END macros to VRR_VSYNC_START/END. (Ankit) - Updated bit fields of VRR_VSYNC_START/END. (Ankit) --v3: - Add PIPE_CONF_CHECK_I(vrr.vsync_start/end). - Read/write vrr_vsync params only when we intend to send adaptive_sync sdp. --v4: - Use VRR_SYNC_START/END macros correctly. --v5: - Send AS SDP only when VRR is enabled. --v6: - Add TRANS_VRR_VSYNC before enabling VRR as per bspec. (Ankit) Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Arun R Murthy <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/display: Add state checker for Adaptive Sync SDPMitul Golani1-0/+46
Enable infoframe and add state checker for Adaptive Sync SDP enablement. --v1: - crtc_state->infoframes.enable, to add on correct place holder. Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/display: Compute AS SDP parametersMitul Golani1-0/+24
Add necessary function definitions to compute AS SDP data. The new intel_dp_compute_as_sdp function computes AS SDP values based on the display configuration, ensuring proper handling of Variable Refresh Rate (VRR). --v2: - Added DP_SDP_ADAPTIVE_SYNC to infoframe_type_to_idx(). [Ankit] - Separated patch for intel_read/write_dp_sdp. [Ankit] - _HSW_VIDEO_DIP_ASYNC_DATA_A should be from ADL onward. [Ankit] - Fixed indentation issues. [Ankit] --v3: - Added VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes. --v4: - Added HAS_VRR check before writing AS SDP. --v5: Added missed HAS_VRR check before reading AS SDP. --v6: - Used Adaptive Sync sink status as a check for read/write SDP. (Ankit) --v7: - Remove as_sdp_enable from crtc_state. - Add a comment mentioning current support of DP_AS_SDP_AVT_FIXED_VTOTAL. - Add state checker for AS_SDP infoframe enable. --v8: - Drop conn_state from intel_dp_compute_as_sdp, as not used. - Remove fullstop in subject line. --v9: - Add vrr.enable instead of is_in_vrr_range. --v10: - remove vrefresh and connector, as they are no longer required. Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/dp: Add wrapper function to check AS SDPMitul Golani2-0/+9
Add a wrapper function to check if both the source and sink support Adaptive Sync SDP. --v1: Just use drm/i915/dp in subject line. Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/dp: Add Read/Write support for Adaptive Sync SDPMitul Golani4-1/+114
Add the necessary structures and functions to handle reading and unpacking Adaptive Sync Secondary Data Packets. Also add support to write and pack AS SDP. --v2: - Correct use of REG_BIT and REG_GENMASK. [Jani] - Use as_sdp instead of async. [Jani] - Remove unrelated comments and changes. [Jani] - Correct code indent. [Jani] --v3: - Update definition names for AS SDP which are starting from HSW, as these defines are applicable for ADLP+.(Ankit) --v4: - Remove as_sdp_mode from crtc_state. - Drop metadata keyword. - For consistency, update ADL_ prefix or post fix as required. --v5: - Check if AS_SDP bit is set in crtc_state->infoframes.enable. If not return. - Check for HAS_AS_SDP() before setting VIDEO_DIP_ENABLE_AS_ADL mask. --v6: - Rename intel_read_dp_infoframe_as_sdp to intel_read_dp_as_sdp. --v7: - Add read back for length and vtotal correction. --v8: - Use as_sdp->target_rr & 0xFF. - Shift by 8 instead of 32, and drop casting to u64. - Remove changes which are does not belong to this patch. Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/i915/display: Add crtc state dump for Adaptive Sync SDPMitul Golani2-0/+4
Add crtc state dump for Adaptive Sync SDP to know which crtc specifically caused the failure. --v1: - Rebase Patches to latest. Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/dp: Add Adaptive Sync SDP loggingMitul Golani1-0/+12
Add structure representing Adaptive Sync Secondary Data Packet (AS SDP). Also, add Adaptive Sync SDP logging in drm_dp_helper.c to facilitate debugging. --v2: - Update logging. [Jani, Ankit] - Use 'as_sdp' instead of 'async' [Ankit] - Correct define placeholders to where they are actually used. [Jani] - Update members in 'as_sdp' structure to make it uniform. [Jani] --v3: - Added changes to dri-devel mailing list. No code changes. --v4: - Instead of directly using operation mode, use an enum to accommodate all operation modes (Ankit). --v5: Nit-pick changes to commit message. --v6: - Add correct place holder and name change for AS_SDP_OP_MODE. - Separate i915 changes from drm changes. - Remove extra lines. --v7: - Add drm/dp in subject line (Ankit) Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-04drm/dp: Add support to indicate if sink supports AS SDPMitul Golani1-0/+25
Add an API that indicates support for Adaptive Sync SDP in the sink, which can be utilized by the rest of the DP programming. --v1: - Format commit message properly. Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03drm/i915: Use debugfs_create_bool() for "i915_bigjoiner_force_enable"Ville Syrjälä1-42/+2
There is no reason to make this debugfs file for a simple boolean so complicated. Just use debugfs_create_bool(). Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03drm/i915/mst: Reject FEC+MST on ICLVille Syrjälä1-1/+2
ICL supposedly doesn't support FEC on MST. Reject it. Cc: [email protected] Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03drm/i915/mst: Limit MST+DSC to TGL+Ville Syrjälä2-1/+2
The MST code currently assumes that glk+ already supports MST+DSC, which is incorrect. We need to check for TGL+ actually. ICL does support SST+DSC, but supposedly it can't do MST+FEC which will also rule out MST+DSC. Note that a straight TGL+ check doesn't work here because DSC support can get fused out, so we do need to also check 'has_dsc'. Cc: [email protected] Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03drm/i915: Extract glk_need_scaler_clock_gating_wa()Ville Syrjälä1-6/+10
Simplify our life by extracting the "do we need the glk scaler clock gating w/a?" check into a small helper. Reviewed-by: Vandita Kulkarni <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03drm/i915: Clean up glk_pipe_scaler_clock_gating_wa()Ville Syrjälä1-12/+7
glk_pipe_scaler_clock_gating_wa() is messy. Clean it up via intel_de_rmw(), and also just pass in the whole crtc so the caller doesn't have to dance around so much. Reviewed-by: Vandita Kulkarni <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03drm/i915: Shuffle DP .mode_valid() checksVille Syrjälä2-14/+13
Move some of the more trivial checks in the DP .mode_valid() hooks upwards to lessen the noise amongst the more complex checks. Reviewed-by: Vandita Kulkarni <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03drm/i915: Remove DRM_MODE_FLAG_DBLSCAN checks from .mode_valid() hooksVille Syrjälä7-23/+0
We never set connector->doublescan_allowed, so the probe helper already filters out all doublescan modes for us. Sadly we still need to keep the explicit doublescan checks in .compute_config as outlined in commit e4dd27aadd20 ("drm/i915: Allow DBLSCAN user modes with eDP/LVDS/DSI") Reviewed-by: Vandita Kulkarni <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-04-03Revert "drm/i915/display: move dmc_firmware_path to display params"Jani Nikula6-8/+11
This reverts commit 0d82a0d6f5561af8dea7011d1b7cae510021723e. The commit failed to take into account that the parameter duplication and debugfs for char * parameters were subtly different between i915 core and display, and caused the DMC and PM to be disabled. Moreover, the patch was pushed with failing CI results. Revert, and get back to the drawing board. Acked-by: Rodrigo Vivi <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2024-04-02Merge drm/drm-next into drm-intel-nextRodrigo Vivi4252-77448/+349936
Catching up on 6.9-rc2 Signed-off-by: Rodrigo Vivi <[email protected]>
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