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2021-04-09drm/radeon: Fix a missing check bug in radeon_dp_mst_detect()Yingjie Wang1-0/+3
In radeon_dp_mst_detect(), We should check whether or not @connector has been unregistered from userspace. If the connector is unregistered, we should return disconnected status. Fixes: 9843ead08f18 ("drm/radeon: add DisplayPort MST support (v2)") Signed-off-by: Yingjie Wang <wangyingjie55@126.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Fix the Wunused-function warningShaokun Zhang1-1/+1
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:941:13: warning: ‘dm_dmub_trace_high_irq’ defined but not used [-Wunused-function] 941 | static void dm_dmub_trace_high_irq(void *interrupt_params) | ^~~~~~~~~~~~~~~~~~~~~~ Fixes: a08f16cfe8dc ("drm/amd/display: Log DMCUB trace buffer events") Cc: Leo (Hanghong) Ma <hanghong.ma@amd.com> Cc: Daniel Wheeler <daniel.wheeler@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Solomon Chiu <solomon.chiu@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/radeon/r600: Fix variables that are not used after assignmentTian Tao1-0/+2
err was not used after being assigned -EINVAL and was given a new value, so here add goto to handle the error case. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu/smu7: fix CAC setting on TOPAZAlex Deucher1-1/+2
We need to enable MC CAC for mclk switching to work. Fixes: d765129a719f ("drm/amd/pm: correct sclk/mclk dpm enablement") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1561 Tested-by: Konstantin Kharlamov <Hi-Angel@yandex.ru> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Update DCN302 SR Exit LatencyJoshua Aberback1-1/+1
[Why&How] Update SR Exit Latency to fix screen flickering caused due to OTG underflow. This is the recommended value given by the hardware IP team. Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: enable ras eeprom on aldebaranJohn Clements1-1/+7
enable ras eeprom loading by default on aldebaran Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: RAS harvest on driver loadJohn Clements1-0/+29
In event of RAS UE + warm reset, error counters shall be harvested and cleared on driver load Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: add ras aldebaran ras eeprom driverJohn Clements1-0/+229
added host to smu cmd to access i2c eeprom Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/pm: increase time out value when sending msg to SMUcharles sun1-1/+1
when do S3 stress, low rate that PowerUpVcn message will get response more than 1s, so here increase the timeout to 2s Signed-off-by: charles sun <charles.sun@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flagJude Shih2-0/+3
[Why & How] We use outbox interrupt that allows us to do the AUX via DMUB Therefore, we need to add some irq source related definition in the header files; Signed-off-by: Jude Shih <shenshih@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/pm: add the callback to get vbios bootup values for vangoghXiaojian Du2-0/+2
This patch is to add the callback to get vbios bootup values for vangogh, it will get the bootup values of gfxclk, mclk, socclk and so on. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/radeon: Fix size overflowxinhui pan1-2/+2
ttm->num_pages is uint32. Hit overflow when << PAGE_SHIFT directly Fixes: 230c079fdcf4 ("drm/ttm: make num_pages uint32_t") Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: Fix size overflowxinhui pan1-1/+1
ttm->num_pages is uint32. Hit overflow when << PAGE_SHIFT directly Fixes: 230c079fdcf4 ("drm/ttm: make num_pages uint32_t") Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: move mmhub ras_func init to ip specific fileHawking Zhang2-19/+19
mmhub ras is always owned by gpu driver. ras_funcs initialization shall be done at ip level, instead of putting it in common gmc interface file Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: Remove unused function amdgpu_bo_fbdev_mmap()Thomas Zimmermann2-21/+0
Remove an unused function. Mapping the fbdev framebuffer is apparently not supported. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09Revert "drm/amdgpu: Ensure that the modifier requested is supported by plane."Qingqing Zhuo2-28/+3
This reverts commit f4a9be998c8ee39a30a68cb775c91928fe10a384. The original commit was found to cause the following two issues on sienna cichlid: 1. Refresh rate locked during vrrdemo 2. Display sticks on flipped landscape mode after changing orientation, and cannot be changed back to regular landscape Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: 3.2.130Aric Cyr1-1/+1
DC version 3.2.130 brings improvements in multiple areas. In summary, we highlight: - Firmware release 0.0.59 - Fixes on display experiences for 4k TVs, register mask missing, etc. - Enhancements on MST, code cleaning and debug messages. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: [FW Promotion] Release 0.0.59Anthony Koo1-2/+15
[How&Why] add params to send FEC status to firmware Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Cleanup DML DSC input bpc validationNicholas Kazlauskas4-5/+11
[Why & How] Pipe input DSC bpc has a type mismatch with maximum DSC input bpc - align the maximum with the pipe input type, unsigned integer. When checking the type we shoudl also check for an implicit value of 0 and align with what the spreadsheet does - default to max. Rename output_bpc to dsc_input_bpc to reflect what the field is actually used for. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Fixed corruption on 4K tvsHarry VanZyllDeJong1-2/+2
[WHY] When on the desktop freesync is not enabled, doing a frame stretch causes the TV to display undesired output. [HOW] By changing the logic so that when ever fresync is supported the TV is notified we are in fressync instead on a non fresync state. Signed-off-by: Harry VanZyllDeJong <hvanzyll@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Determine synchronization edge based on master's vsyncMikita Lipski1-3/+18
[Why&How] The driver always wants to synchronize streams to the first edge of master's vsync pulse. In order to determine that we can read timing flags that are used to program vsync. Master stream's vsync polarity - Multi Display Stream Synchronization edge: Negative - Falling Edge Positive - Rising Edge Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Add MST capability to trigger_hotplug interfaceMikita Lipski1-1/+70
[Why] Need to be able to trigger software hotplug for MST connectors [How] For unplug the driver calls to disable topologies manager that connector is attached to. For plugging in it does the whole rediscovery of all connectors in drm device and enbles their topologies if attached. The interface for MST connectors works in the following way: 1. To disconnect all MST topologies currently connected: echo 0 > /sys/kernel/debug/dri/0/amdgpu_dm_trigger_hpd_mst 2. To reconnect/rediscover all topologies that are physically connected to the card: echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_trigger_hpd_mst A related fix which has been merged with this patch Leo Ma(Hanghong Ma)'s work: Set power states before disable MST topology [Why] When we try to disable MST topology from the debugfs entry, some receiver will hang. [How] Set DPCD 600h power states to 2(power down mode)before disable MST topology. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Directly retrain link from debugfsMikita Lipski1-2/+2
[why/how] Skip logic that sets preffered link settings and just retrain with new link_settings from Debugfs Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Add missing mask for DCN3Qingqing Zhuo1-0/+1
[Why] DCN3 is not reusing DCN1 mask_sh_list, causing SURFACE_FLIP_INT_MASK missing in the mapping. [How] Add the corresponding entry to DCN3 list. Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Tweak the kernel doc for crc_rd_wrkWayne Lin1-1/+1
[Why] Commit 1c85f3db778ffbeba91d71e9d6c8aa299f9b4efd ("drm/amd/display: Add kernel doc to crc_rd_wrk field") adds kernel doc for crc_rd_wrk field in amdgpu_dm.h but it's incorrectly formatted. Make htmldocs warns: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h:398: warning: Incorrect use of kernel-doc format: * @crc_rd_wrk [How] Tweak the kernel doc for crc_rd_wrk. Fixes: 1c85f3db778ffb ("drm/amd/display: Add kernel doc to crc_rd_wrk field") Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Set initial value to a dividerMikita Lipski1-2/+2
[why/how] Due to compiler optimization the values would be passed to the division function uninitialized causing a div by zero. Initialize the numerator and denominator to 0 and 1 to prevent division by zero. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Add function and debugfs to dump DCC_EN bitVictor Lu9-5/+96
[why] Currently to view the DCC_EN bit the entire DTN log must be dumped. A compact method to view the DCC_EN bit is desirable. [how] Introduce new debugfs interface that only dumps the DCC_EN bit. Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dcc_en Signed-off-by: Victor Lu <victorchengchi.lu@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Add dc_debug flag to disable min fclkHarry Wentland3-3/+4
[Why&How] Add debug flag for an option to disable min fclk. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Add debug prints for SMU messagesHarry Wentland1-4/+25
[Why&How] Add debug prints for SMU messages with regard to versions, clocks, and more. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Robin Singh <Robin.Singh@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Added dc_edp_id_count to dc_contextJake Wang2-7/+4
[Why] We need to keep track of the number of eDP links to properly enumerate edp panel control instance. [How] Added dc_edp_id_count to dc_context to keep track of number of eDP links. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Add debugfs entry for LTTPR register statusAurabindo Pillai1-0/+66
[Why] Functionality of LTTPR is reporter through the DPCD register [How] Expose a interface in debugfs to read the current status of LTTPR as reported from the device's DPCD register Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Move vupdate keepout programming from DCN20 to DCN10Leo Li4-19/+19
[Why] The OTG_VUPDATE_KEEPOUT register and fields is available on DCN10, and named the same in DCN20. [How] Move register definition and programming function to dcn10 optc. There is no functional change. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: add NULL check to avoid kernel crash in DC.Robin Singh1-0/+3
[why] There is case when the userspace like IGT test updates the custom timings, i.e. the number of active lines CRTC property value, and without committing the change, followed by resetting the display, creating FB and plane to the pipe and committing. The NULL pointer of pipe_ctx->plane_state occurs and result in kernel crash. We need to avoid that. [how] add pointer check for the dc_plane_state of the pipe context in the call of committing planes for stream in DC component. Signed-off-by: Robin Singh <robin.singh@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: use MST downstream AUX to dump DPRX CRCsDavid (Dingchen) Zhang1-1/+1
[why] In MST setup, we'd use MST downstream AUX to dump the DPRX CRCs from sink device. [how] Assign the mst_port->aux to read DPCD registers. Signed-off-by: David (Dingchen) Zhang <dingchen.zhang@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Add delay in dmub_srv_send_gpint_commandWyatt Wood1-0/+2
[Why] Today a parameter is passed to dmub_srv_send_gpint_command which specifies the max amount of time to wait for the command to be acked. This parameter instead specifies the number of times to check if the command was acked. We wish to add a lower bound to the timeout, which can be accomplished by using a delay or a timestamp. It has been decided to use udelay instead of a timestamp simply because we don't want to expose a high precision counter if it doesn't yield large benefits. [How] Add udelay(1) between each for loop iteration. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amd/display: Retry getting PSR state if command times outWyatt Wood2-12/+20
[Why] GPINT command to get PSR state from FW times out. [How] Add retry to get valid PSR state. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: split gfx callbacks into ras and non-ras onesHawking Zhang8-87/+92
gfx ras is only available in cerntain ip generations. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: split mmhub callbacks into ras and non-ras onesHawking Zhang13-29/+74
mmhub ras is only avaiable in cerntain mmhub ip generation. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: do not register df_mca interrupt in certain configHawking Zhang1-2/+4
df/mca ras is not managed by gpu driver when gpu is connected to cpu through xgmi. gpu driver should register x86 mca notifier for umc ras error notification Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: split umc callbacks to ras and non-ras onesHawking Zhang12-32/+51
umc ras is not managed by gpu driver when gpu is connected to cpu through xgmi. split umc callbacks into ras and non-ras ones so gpu driver only initializes umc ras callbacks when it manages umc ras. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: move xgmi ras functions to xgmi_ras_funcsHawking Zhang6-17/+42
xgmi ras is not managed by gpu driver when gpu is connected to cpu through xgmi. move all xgmi ras functions to xgmi_ras_funcs so gpu driver only initializes xgmi ras functions when it manages xgmi ras. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: split nbio callbacks into ras and non-ras onesHawking Zhang6-30/+63
nbio ras is not managed by gpu driver when gpu is connected to cpu through xgmi. split nbio callbacks into ras and non-ras ones so gpu driver only initializes nbio ras callbacks when it manages nbio ras. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: implement query_ras_error_address callbackHawking Zhang1-0/+90
query_ras_error_address will be invoked to query bad page address when there is poison data in HBM consumed by GPU engines. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: implement umc query error count callbackHawking Zhang2-0/+92
umc query_ras_error_count will be invoked to query umc correctable and uncorrectable error. It will reset the umc ras error counter after the query. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: add helper funtion to query umc ras errorHawking Zhang2-0/+77
Add helper functions to query correctable and uncorrectable umc ras error. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: create umc_v6_7_funcs for aldebaranHawking Zhang3-1/+58
umc_v6_7_funcs are callbacks to support umc ras functionalities in aldebaran Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: initialze ras caps per paltform configHawking Zhang1-12/+23
Driver only manages GFX/SDMA/MMHUB RAS in platforms that gpu node is connected to cpu through XGMI, other than that, it queries VBIOS for RAS capabilities. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdkfd: Avoid null pointer in SMI eventAmber Lin1-1/+1
Power Management IP is initialized/enabled before KFD init. When a thermal throttling happens before kfd_smi_init is done, calling the KFD SMI update function causes a stack dump by referring a NULL pointer ( smi_clients list). Check if kfd_init is completed before calling the function. Signed-off-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Mukul Joshi <mukul.joshi@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09amd: display: modules: Remove repeated struct declarationWan Jiabing1-2/+0
struct mod_hdcp is declared twice. One is declared at 33rd line. The blew one is not needed. Remove the duplicate. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-09drm/amdgpu: drop some unused atombios functionsAlex Deucher2-163/+0
These were leftover from the old CI dpm code which was retired a while ago. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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