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2020-10-12drm/amdgpu: enable vcn3.0 for dimgrey_cavefishJames Zhu1-0/+1
Enable vcn3.0 ip block for dimgrey_cavefish. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu/swsmu: update driver if version for dimgrey_cavefishTao Zhou1-1/+1
Update driver if version from 0x4 to 0x5 for dimgrey_cavefish, per PMFW 59.02.0. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: enable athub/mmhub PG for dimgrey_cavefishTao Zhou1-1/+3
Set athub/mmhub PG flag for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: enable mc CG and LS for dimgrey_cavefishTao Zhou1-1/+3
Set mc CG and LS flag for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: enable GFX clock gating for dimgrey_cavefishTao Zhou1-1/+4
Enable GFX MGCG, CGCG and 3DCG for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu/swsmu: update driver if version for dimgrey_cavefishTao Zhou1-1/+1
Update driver if version according to PMFW with version 0x003B0100. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: support athub cg setting for dimgrey_cavefishTao Zhou1-0/+1
Same as navy_flounder, the athub ip of dimgrey_cavefish is v2.1. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: enable front door loading for dimgrey_cavefishTao Zhou1-2/+1
Support both back and front door loading for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: enable jpeg3.0 PG and CG for dimgrey_cavefishJames Zhu1-2/+4
Enable JPEG3.0 PG and CG for dimgrey_cavefish. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: enable VCN3.0 PG and CG for dimgrey_cavefishJames Zhu1-2/+3
Enable VCN3.0 PG and CG for dimgrey_cavefish Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdkfd: Add kfd2kgd_funcs for dimgrey_cavefish kfd supportChengming Gui1-0/+1
Add KFD support. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdkfd: Support dimgrey_cavefish KFD (v2)Chengming Gui6-0/+25
Add KFD support for dimgrey cavefish. v2: rebase (Alex) Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add gc golden setting for dimgrey_cavefishTao Zhou1-0/+42
Add gc golden setting for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Tested-by: Chengming Gui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: support cp_fw_write_wait for dimgrey_cavefishTao Zhou1-0/+1
Same as sienna_cichlid, dimgrey_cavefish supports WAIT_REG_MEM packet. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: skip reroute ih for some ASICsTao Zhou1-2/+2
Add check before reroute ih setting, it's not supported by some ASICs. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add psp support for dimgrey_cavefish(v2)Tao Zhou2-2/+16
General psp support for dimgrey_cavefish. v2: remove the checks for asd load and reroute ih. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: increase size of psp fw_name string(v2)Tao Zhou3-3/+4
Increase fw_name string size so longer chip name can be stored. v2: define macro for the length of psp fw name. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu/swsmu: add smu support for dimgrey_cavefish(v2)Tao Zhou3-3/+16
Reuse sienna_cichlid pp table for dimgrey_cavefish. v2: update related comment. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu/swsmu: increase size for smu fw_name stringTao Zhou2-1/+2
A longer chip name needs more space. v2: define macro for the length of smu fw name Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add gmc cg support for dimgrey_cavefishTao Zhou2-4/+5
The athub version for dimgrey_cavefish is v2.1. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu/vcn: enable VCN DPG mode for dimgrey_cavefishJames Zhu1-1/+1
Enable VCN DPG mode for dimgrey_cavefish. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu/vcn: add firmware support for dimgrey_cavefishJames Zhu1-0/+5
Add firmware support for dimgrey_cavefish. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: force pa_sc_tile_steering_override to 0 for dimgrey_cavefishTao Zhou1-0/+1
pa_sc_tile_steering_override is only programmable for gfx10.0/10.1/10.2, the same as sienna_cichlid. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add virtual display support for dimgrey_cavefishTao Zhou1-0/+2
Add virtual ip block for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: configure dimgrey_cavefish gfx according to gfx 10.3's definitionTao Zhou1-0/+9
The gfx version of dimgrey_cavefish is 10.3, identical to sienna_cichlid, follow the way of sienna_cichlid. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add sdma ip block for dimgrey_cavefishTao Zhou2-2/+10
Enable sdma block for dimgrey_cavefish, same as sienna_cichlid. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add gfx ip block for dimgrey_cavefishTao Zhou2-0/+5
Enable gfx block for dimgrey_cavefish, same as navy_flounder. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add ih ip block for dimgrey_cavefishTao Zhou2-0/+2
Enable ih block for dimgrey_cavefish, same as navy_flounder. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add gmc ip block for dimgrey_cavefishTao Zhou2-0/+2
Enable gmc block for dimgrey_cavefish, same as sienna_cichlid. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add common ip block for dimgrey_cavefishTao Zhou1-0/+3
Same as navy_flounder. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add mmhub support for dimgrey_cavefishTao Zhou1-0/+5
Same as navy_flounder. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: initialize IP offset for dimgrey_cavefishTao Zhou5-1/+1108
Add ip offset definition for dimgrey_cavefish and initialize it. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add common support for dimgrey_cavefishTao Zhou1-0/+6
Add external id and set clock gating for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add gfx clock gating support for dimgrey_cavefishTao Zhou1-0/+1
Set gfx clock gating for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add gmc support for dimgrey_cavefishTao Zhou1-0/+3
Same as navy_flounder. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add support for dimgrey_cavefish firmwareTao Zhou1-0/+10
Add support for dimgrey_cavefish cp/rlc firmware. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: set asic family and ip blocks for dimgrey_cavefishTao Zhou1-0/+1
Same as navi series. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: set fw load type for dimgrey_cavefishTao Zhou1-0/+2
Use direct load for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add dimgrey_cavefish gpu info firmwareTao Zhou1-0/+4
Load gpu info firmware for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amdgpu: add dimgrey_cavefish asic typeTao Zhou1-0/+1
Add chip type for dimgrey_cavefish. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amd/display: Fix module load hangs when connected to an eDPRodrigo Siqueira1-5/+5
It was recently introduced a change that enables driver to disable streams if pixel clock changes. Consequently, the code path executed in the disable vbios function expanded to an encoder verification part. The encoder loop is nested inside the pipe count loop, and both loops share the 'i' variable in control of their flow. This situation may lead to an infinite loop because the encoder loop constantly updates the `i` variable, making the first loop always positive. As a result, we can see a soft hang during the module load (modprobe amdgpu) and a series of dmesg log that looks like this: kernel:[ 124.538727] watchdog: BUG: soft lockup - CPU#2 stuck for 22s! [modprobe:1000] RSP: 0018:ffffabbf419bf0e8 EFLAGS: 00000282 RAX: ffffffffc0809de0 RBX: ffff93b35ccc0000 RCX: ffff93b366c21800 RDX: 0000000000000000 RSI: 0000000000000141 RDI: ffff93b35ccc0000 RBP: ffffabbf419bf108 R08: ffffabbf419bf164 R09: 0000000000000001 R10: 0000000000000003 R11: 0000000000000003 R12: 0000000008677d40 R13: 0000000000000141 R14: ffff93b35cfc0000 R15: ffff93b35abc0000 FS: 00007f1400717540(0000) GS:ffff93b37f680000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00005649b66b0968 CR3: 00000003e0fec000 CR4: 0000000000350ee0 Call Trace: amdgpu_device_rreg+0x17/0x20 [amdgpu] amdgpu_cgs_read_register+0x14/0x20 [amdgpu] dm_read_reg_func+0x3a/0xb0 [amdgpu] get_pixel_clk_frequency_100hz+0x30/0x50 [amdgpu] dc_commit_state+0x8f1/0xae0 [amdgpu] ? drm_calc_timestamping_constants+0x101/0x160 [drm] amdgpu_dm_atomic_commit_tail+0x39d/0x21a0 [amdgpu] ? dcn21_validate_bandwidth+0xe5/0x290 [amdgpu] ? kfree+0xc3/0x390 ? dcn21_validate_bandwidth+0xe5/0x290 [amdgpu] ... RSP: 002b:00007fff26009bd8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 RAX: ffffffffffffffda RBX: 000055a8025bea50 RCX: 00007f140085c89d RDX: 0000000000000000 RSI: 000055a8025b8290 RDI: 000000000000000c RBP: 0000000000040000 R08: 0000000000000000 R09: 0000000000000000 R10: 000000000000000c R11: 0000000000000246 R12: 000055a8025b8290 R13: 0000000000000000 R14: 000055a8025bead0 R15: 000055a8025bea50 This issue was fixed by introducing a second variable for the internal loop. Fixes: 8353d30e747f4e ("drm/amd/display: disable stream if pixel clock changed with link active") Reviewed-by: Roman Li <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-12drm/amd/display: Add missing function pointers for dcn3Bhawanpreet Lakha1-0/+2
These function pointers are missing from dcn30_init .calc_vupdate_position : Used to help avoid cursor stuttering .set_pipe : Needed for setting ABM So add them Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09drm/amdgpu: Fix inconsistent of format with argument type in amdgpu_xgmi.cYe Bin1-1/+1
Fix follow warning: [drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c:249]: (warning) %d in format string (no. 1) requires 'int' but the argument type is 'unsigned int'. Reported-by: Hulk Robot <[email protected]> Signed-off-by: Ye Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09drm/amdgpu: Fix invalid number of character '{' in amdgpu_acpi_initYe Bin1-1/+1
Fix follow warning: Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: ''. Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: CONFIG_ACPI... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: 'CONFIG_ACPI'. ...... Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: CONFIG_X86... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: 'CONFIG_X86'. Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: _X86_... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: '_X86_'. Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: __linux__... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: '__linux__'. Fixes: 97d798b276e9 ("drm/amdgpu: simplify ATIF backlight handling") Reported-by: Hulk Robot <[email protected]> Signed-off-by: Ye Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09drm/amdgpu/swsmu: clean up a bunch of stale interfacesAlex Deucher5-276/+4
These were leftover from the initial implementation, but never used. Drop them. Reviewed-by: Evan Quan <[email protected]> Noticed-by: Ryan Taylor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09drm/amd/pm: setup APU dpm clock table in SMU HW initializationEvan Quan1-11/+11
As the dpm clock table is needed during DC HW initialization. And that (DC HW initialization) comes before smu_late_init() where current APU dpm clock table setup is performed. So, NULL pointer dereference will be triggered. By moving APU dpm clock table setup to smu_hw_init(), this can be avoided. Fixes: 02cf91c113ea ("drm/amd/powerplay: postpone operations not required for hw setup to late_init") Signed-off-by: Evan Quan <[email protected]> Reported-by: Dirk Gouders <[email protected]> Acked-by: Nirmoy Das <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09drm/amdgpu: modify cp_flags to pg_flags in gfx_v10_cntl_power_gatingChangfeng1-1/+1
It needs to use adev->pg_flags other than adev->cg_glags in gfx_v10_cntl_power_gating Signed-off-by: Changfeng <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09drm/amdgpu: Remove warning for virtual_displayEmily.Deng1-1/+3
Remove the virtual_display warning in drm_crtc_vblank_off when dev->num_crtcs is null. Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Emily.Deng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09drm/amdgpu: kfd_initialized can be statickernel test robot1-1/+1
Fixes: c7651b73586600 ("drm/amdgpu: Fix handling of KFD initialization failures") Signed-off-by: kernel test robot <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-10-09amd/amdgpu_ctx: Use struct_size() helper and kmalloc() (v2)Gustavo A. R. Silva1-1/+1
Make use of the new struct_size() helper instead of the offsetof() idiom. Also, use kmalloc() instead of kcalloc(). v2: squash in kzalloc fix Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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