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path: root/drivers/usb/dwc2
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2021-04-22usb: dwc2: Update exit hibernation when port reset is assertedArtur Petrosyan1-6/+11
No need to check for "DWC2_POWER_DOWN_PARAM_HIBERNATION" param as "hsotg->hibernated" flag is already enough for exiting from hibernation mode. - Removes checking of "DWC2_POWER_DOWN_PARAM_HIBERNATION" param. - For code readability Hibernation exit code moved after debug message print. - Added "dwc2_exit_hibernation()" function error checking. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-22usb: dwc2: Enable RPi in ACPI modeJeremy Linton3-1/+20
The dwc2 driver has everything we need to run in ACPI mode except for the ACPI module device table boilerplate. With that added and identified as "BCM2848", an id in use by other OSs for this device, the dw2 controller on the BCM2711 will work. Signed-off-by: Jeremy Linton <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add exit clock gating before removing driverArtur Petrosyan1-0/+9
When dwc2 core is in clock gating mode loading driver again causes driver fail. Because in that mode registers are not accessible. Added a flow of exiting clock gating mode to avoid the driver reload failure. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add clock gating exiting flow by system resumeArtur Petrosyan1-0/+22
If not hibernation nor partial power down are supported, port resume is done using the clock gating programming flow. Adds a new flow of exiting clock gating when PC is resumed. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add clock gating entering flow by system suspendArtur Petrosyan1-0/+9
If not hibernation nor partial power down are supported, clock gating is used to save power. Adds a new flow of entering clock gating when PC is suspended. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Allow exit clock gating in urb enqueueArtur Petrosyan1-0/+8
When core is in clock gating state and an external hub is connected, upper layer sends URB enqueue request, which results in port reset issue. Added exit from clock gating state to avoid port reset issue and process upper layer request properly. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Update exit clock gating when port is resumedArtur Petrosyan1-25/+4
Updates the implementation of exiting clock gating mode when core receives port resume. Instead of setting the required bit fields of the registers inline, called the "dwc2_host_exit_clock_gating()" function. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Update enter clock gating when port is suspendedArtur Petrosyan1-15/+4
Updates the implementation of entering clock gating mode when core receives port suspend. Instead of setting the required bit fields of the registers inline, called the "dwc2_host_enter_clock_gating()" function. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add exit clock gating when port reset is assertedArtur Petrosyan1-0/+4
Adds clock gating exit flow when set port feature reset is received in suspended state. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add exit clock gating from session request interruptArtur Petrosyan1-6/+13
Added clock gating exit flow from session request interrupt handler according programming guide. Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add exit clock gating from wakeup interruptArtur Petrosyan1-11/+22
Added exit from clock gating mode when wakeup interrupt is detected. To exit from the clock gating in device mode "dwc2_gadget_exit_clock_gating()" function is used with rem_wakeup parameter 0. To exit clock gating in host mode "dwc2_host_exit_clock_gating()" with rem_wakeup parameter 1. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Allow entering clock gating from USB_SUSPEND interruptArtur Petrosyan1-3/+7
If core doesn't support hibernation or partial power down power saving options, power can still be saved using clock gating on all the clocks. - Added entering clock gating state from USB_SUSPEND interrupt. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add host clock gating support functionsArtur Petrosyan2-0/+91
Added host clock gating support functions according programming guide. Added function names: dwc2_host_enter_clock_gating() dwc2_host_exit_clock_gating() Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-13usb: dwc2: Add device clock gating support functionsArtur Petrosyan2-2/+79
Added device clock gating support functions according programming guide. Moved "bus_suspended" flag to "dwc2_hsotg" struct because we need to set that flag while entering to clock gating in case when the driver is built in peripheral mode. Added function names: dwc2_gadget_enter_clock_gating() dwc2_gadget_exit_clock_gating() Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add exit partial power down before removing driverArtur Petrosyan1-1/+10
When dwc2 core is in partial power down mode loading driver again causes driver fail. Because in that mode registers are not accessible. Added a flow of exiting the partial power down mode to avoid the driver reload failure. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Fix partial power down exiting by system resumeArtur Petrosyan1-44/+46
Fixes the implementation of exiting from partial power down power saving mode when PC is resumed. Added port connection status checking which prevents exiting from Partial Power Down mode from _dwc2_hcd_resume() if not in Partial Power Down mode. Rearranged the implementation to get rid of many "if" statements. NOTE: Switch case statement is used for hibernation partial power down and clock gating mode determination. In this patch only Partial Power Down is implemented the Hibernation and clock gating implementations are planned to be added. Fixes: 6f6d70597c15 ("usb: dwc2: bus suspend/resume for hosts with DWC2_POWER_DOWN_PARAM_NONE") Cc: <[email protected]> Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Update partial power down entering by system suspendArtur Petrosyan1-35/+18
With current implementation the port power is being disabled, which is not required by the programming guide. Also, if there is a system which works only in "DWC2_POWER_DOWN_PARAM_NONE" (clock gating) mode the current implementation does not set Gate hclk bit in pcgctl register. Rearranges and updates the implementation of entering to partial power down power saving mode when PC is suspended to get rid of many "if" statements and removes disabling of port power. NOTE: Switch case statement is used for hibernation partial power down and clock gating mode determination. In this patch only Partial Power Down is implemented the Hibernation and clock gating implementations are planned to be added. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Fix session request interrupt handlerArtur Petrosyan1-0/+8
According to programming guide in host mode, port power must be turned on in session request interrupt handlers. Fixes: 21795c826a45 ("usb: dwc2: exit hibernation on session request") Cc: <[email protected]> Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Allow exit partial power down in urb enqueueArtur Petrosyan1-0/+7
When core is in partial power down state and an external hub is connected, upper layer sends URB enqueue request, which results in port reset issue. Added exit from partial power down state to avoid port reset issue and process upper layer request correctly. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add part. power down exit from dwc2_conn_id_status_change().Artur Petrosyan1-0/+9
Before changing to connector B exiting from Partial Power Down is required. - Added exiting from Partial Power Down mode when connector ID status changes to "connId B". Because if connector ID status changed to B connector while core was in partial power down mode, HANG would accrue from a soft reset. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add exit partial power down when port reset is assertedArtur Petrosyan1-0/+9
Adds Partial Power Down exiting flow when set port feature reset is received in suspended state. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add exit partial power down when port is resumedArtur Petrosyan2-24/+42
Added flow of exiting Partial Power Down in "dwc2_port_resume()" function when core receives resume. NOTE: Switch case statement is used for hibernation partial power down and clock gating mode determination. In this patch only Partial Power Down is implemented the Hibernation and clock gating implementations are planned to be added. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add enter partial power down when port is suspendedArtur Petrosyan2-19/+34
Adds flow of entering Partial Power Down in "dwc2_port_suspend()" function when core receives suspend. NOTE: Switch case statement is used for hibernation partial power down and clock gating mode determination. In this patch only Partial Power Down is implemented the Hibernation and clock gating implementations are planned to be added. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Update port suspend/resume function definitions.Artur Petrosyan2-6/+23
Earlier "dwc2_port_suspend()" and "dwc2_port_resume()" functions were implemented without proper description and host or device mode difference. - Added "dwc2_port_suspend" and "dwc2_port_resume" functions to "core.h" header file. - Updated function description in documentation. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add partial power down exit flow in wakeup intr.Artur Petrosyan1-9/+8
According to programming guide added host partial power down exit flow in wakeup detected interrupt handler. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Update enter and exit partial power down functionsArtur Petrosyan6-115/+45
These are wrapper functions which are calling device or host enter/exit partial power down functions. This change is done because we need to separate device and host partial power down functions as the programming flow has a lot of difference between host and device. With this update during partial power down exit driver relies on backup value of "GOTGCTL_CURMODE_HOST" to determine the mode of core before entering to PPD. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add host partial power down functionsArtur Petrosyan2-0/+168
For host mode Partial Power Down entering and exiting separate functions are needed to implement the logic. Earlier the logic was implemented in one function. Which was confusing the readability. Also both host and device implementations were in the same function. - Added host partial power down functions which must be called by dwc2_enter_partial_power_down()/dwc2_exit_partial_power_down() functions. Added function names: dwc2_host_enter_partial_power_down() dwc2_host_exit_partial_power_down() NOTE: There is a checkpatch "CHECK" warning on "udelay(100)". The delay is needed to properly exit gadget Partial Power Down A delay less than 100 doesn't work. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-09usb: dwc2: Add device partial power down functionsArtur Petrosyan2-0/+138
For device mode Partial Power Down entering and exiting separate functions are needed to implement the logic. Earlier the logic was implemented in one function. Which was confusing the readability. Also both host and device implementations were in the same function. - Added device partial power down functions which must be called by dwc2_enter_partial_power_down()/dwc2_exit_partial_power_down() functions. - Added "in_ppd" flag in "dwc2_hsotg" struct to indicate the core state after entering into partial power down mode. Added function names: dwc2_gadget_enter_partial_power_down() dwc2_gadget_exit_partial_power_down() NOTE: There is a checkpatch "CHECK" warning on "udelay(100)". The delay is needed to properly exit gadget Partial Power Down A delay less than 100 doesn't work. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-05Merge 5.12-rc6 into usb-nextGreg Kroah-Hartman1-2/+3
We want the USB fixes in here as well and it resolves a merge issue with xhci-mtk.c Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-02usb: dwc2: delete duplicate word in the commentTian Tao1-1/+1
Delete the duplicate word "from" in comment. Signed-off-by: Tian Tao <[email protected]> Signed-off-by: Zeng Tao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-04-02usb: dwc2: add parenthess and space around *Tian Tao1-1/+1
Just fix the following checkpatch error: ERROR: Macros with complex values should be enclosed in parentheses. Signed-off-by: Tian Tao <[email protected]> Signed-off-by: Zeng Tao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-26usb: dwc2: Prevent core suspend when port connection flag is 0Artur Petrosyan1-1/+2
In host mode port connection status flag is "0" when loading the driver. After loading the driver system asserts suspend which is handled by "_dwc2_hcd_suspend()" function. Before the system suspend the port connection status is "0". As result need to check the "port_connect_status" if it is "0", then skipping entering to suspend. Cc: <[email protected]> # 5.2 Fixes: 6f6d70597c15 ("usb: dwc2: bus suspend/resume for hosts with DWC2_POWER_DOWN_PARAM_NONE") Signed-off-by: Artur Petrosyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-26usb: dwc2: Fix HPRT0.PrtSusp bit setting for HiKey 960 board.Artur Petrosyan1-1/+1
Increased the waiting timeout for HPRT0.PrtSusp register field to be set, because on HiKey 960 board HPRT0.PrtSusp wasn't generated with the existing timeout. Cc: <[email protected]> # 4.18 Fixes: 22bb5cfdf13a ("usb: dwc2: Fix host exit from hibernation flow.") Signed-off-by: Artur Petrosyan <[email protected]> Acked-by: Minas Harutyunyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10usb: dwc2: Add STM32 related debugfs entriesMartin Devera1-0/+2
These are entries related to STM32MP1 PHY control. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Martin Devera <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-02-08Merge 5.11-rc7 into usb-nextGreg Kroah-Hartman1-7/+1
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-02-05usb: dwc2: Fix endpoint direction check in ep_from_windexHeiko Stuebner1-7/+1
dwc2_hsotg_process_req_status uses ep_from_windex() to retrieve the endpoint for the index provided in the wIndex request param. In a test-case with a rndis gadget running and sending a malformed packet to it like: dev.ctrl_transfer( 0x82, # bmRequestType 0x00, # bRequest 0x0000, # wValue 0x0001, # wIndex 0x00 # wLength ) it is possible to cause a crash: [ 217.533022] dwc2 ff300000.usb: dwc2_hsotg_process_req_status: USB_REQ_GET_STATUS [ 217.559003] Unable to handle kernel read from unreadable memory at virtual address 0000000000000088 ... [ 218.313189] Call trace: [ 218.330217] ep_from_windex+0x3c/0x54 [ 218.348565] usb_gadget_giveback_request+0x10/0x20 [ 218.368056] dwc2_hsotg_complete_request+0x144/0x184 This happens because ep_from_windex wants to compare the endpoint direction even if index_to_ep() didn't return an endpoint due to the direction not matching. The fix is easy insofar that the actual direction check is already happening when calling index_to_ep() which will return NULL if there is no endpoint for the targeted direction, so the offending check can go away completely. Fixes: c6f5c050e2a7 ("usb: dwc2: gadget: add bi-directional endpoint support") Cc: [email protected] Reported-by: Gerhard Klostermeier <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-02-04usb: dwc2: pci: Drop the empty quirk functionHeikki Krogerus1-18/+0
The function dwc2_pci_quirks() does nothing. Removing. Signed-off-by: Heikki Krogerus <[email protected]> Cc: Minas Harutyunyan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-01-26usb: dwc2: Make "trimming xfer length" a debug messageGuenter Roeck1-1/+1
With some USB network adapters, such as DM96xx, the following message is seen for each maximum size receive packet. dwc2 ff540000.usb: dwc2_update_urb_state(): trimming xfer length This happens because the packet size requested by the driver is 1522 bytes, wMaxPacketSize is 64, the dwc2 driver configures the chip to receive 24*64 = 1536 bytes, and the chip does indeed send more than 1522 bytes of data. Since the event does not indicate an error condition, the message is just noise. Demote it to debug level. Fixes: 7359d482eb4d3 ("staging: HCD files for the DWC2 driver") Tested-by: Nicolas Saenz Julienne <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Guenter Roeck <[email protected]> Signed-off-by: Nicolas Saenz Julienne <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-01-26usb: dwc2: Abort transaction after errors with unknown reasonGuenter Roeck1-0/+12
In some situations, the following error messages are reported. dwc2 ff540000.usb: dwc2_hc_chhltd_intr_dma: Channel 1 - ChHltd set, but reason is unknown dwc2 ff540000.usb: hcint 0x00000002, intsts 0x04000021 This is sometimes followed by: dwc2 ff540000.usb: dwc2_update_urb_state_abn(): trimming xfer length and then: WARNING: CPU: 0 PID: 0 at kernel/v4.19/drivers/usb/dwc2/hcd.c:2913 dwc2_assign_and_init_hc+0x98c/0x990 The warning suggests that an odd buffer address is to be used for DMA. After an error is observed, the receive buffer may be full (urb->actual_length >= urb->length). However, the urb is still left in the queue unless three errors were observed in a row. When it is queued again, the dwc2 hcd code translates this into a 1-block transfer. If urb->actual_length (ie the total expected receive length) is not DMA-aligned, the buffer pointer programmed into the chip will be unaligned. This results in the observed warning. To solve the problem, abort input transactions after an error with unknown cause if the entire packet was already received. This may be a bit drastic, but we don't really know why the transfer was aborted even though the entire packet was received. Aborting the transfer in this situation is less risky than accepting a potentially corrupted packet. With this patch in place, the 'ChHltd set' and 'trimming xfer length' messages are still observed, but there are no more transfer attempts with odd buffer addresses. Fixes: 151d0cbdbe860 ("usb: dwc2: make the scheduler handle excessive NAKs better") Cc: Boris ARZUR <[email protected]> Cc: Douglas Anderson <[email protected]> Tested-by: Nicolas Saenz Julienne <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Guenter Roeck <[email protected]> Signed-off-by: Nicolas Saenz Julienne <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-01-26usb: dwc2: Do not update data length if it is 0 on inbound transfersGuenter Roeck1-7/+8
The DWC2 documentation states that transfers with zero data length should set the number of packets to 1 and the transfer length to 0. This is not currently the case for inbound transfers: the transfer length is set to the maximum packet length. This can have adverse effects if the chip actually does transfer data as it is programmed to do. Follow chip documentation and keep the transfer length set to 0 in that situation. Fixes: 56f5b1cff22a1 ("staging: Core files for the DWC2 driver") Tested-by: Nicolas Saenz Julienne <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Guenter Roeck <[email protected]> Signed-off-by: Nicolas Saenz Julienne <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-01-12usb: dwc2: disable Link Power Management on STM32MP15 HS OTGAmelie Delaunay1-0/+4
Link Power Management (LPM) on STM32MP15 OTG HS encounters instabilities with some Host controllers. OTG core fails to exit L1 state in 200us: "dwc2 49000000.usb-otg: Failed to exit L1 sleep state in 200us." Then the device is still not enumerated. To avoid this issue, disable Link Power Management on STM32MP15 HS OTG. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Amelie Delaunay <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-01-12usb: dwc2: enable FS/LS PHY clock select on STM32MP15 FS OTGAmelie Delaunay1-0/+2
When the core is in FS host mode, using the FS transceiver, and a Low-Speed device is connected, transceiver clock is 6Mhz. So, to support Low-Speed devices, enable support of FS/LS Low Power mode, so that the PHY supplies a 6 MHz clock during Low-Speed mode. Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Amelie Delaunay <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-01-12usb: dwc2: set ahbcfg parameter for STM32MP15 OTG HS and FSAmelie Delaunay1-0/+2
STM32MP15 ahbcfg register default value sets Burst length/type (HBSTLEN) to Single (32-bit accesses on AHB), which is not recommended, according to STM32MP157 Reference manual [1]. This patch sets Burst length/type (HBSTLEN) so that bus transactions target 16x32 bit accesses. This improves OTG controller performance. [1] https://www.st.com/resource/en/reference_manual/dm00327659.pdf, p.3149 Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Amelie Delaunay <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-27usb: dwc2: Avoid leaving the error_debugfs label unusedMartin Blumenstingl1-0/+3
The error_debugfs label is only used when either CONFIG_USB_DWC2_PERIPHERAL or CONFIG_USB_DWC2_DUAL_ROLE is enabled. Add the same #if to the error_debugfs label itself as the code which uses this label already has. This avoids the following compiler warning: warning: label ‘error_debugfs’ defined but not used [-Wunused-label] Fixes: e1c08cf23172ed ("usb: dwc2: Add missing cleanups when usb_add_gadget_udc() fails") Acked-by: Minas Harutyunyan <[email protected]> Reported-by: kernel test robot <[email protected]> Reported-by: Jens Axboe <[email protected]> Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2020-10-02usb: dwc2: Fix INTR OUT transfers in DDMA mode.Minas Harutyunyan1-7/+33
In DDMA mode if INTR OUT transfers mps not multiple of 4 then single packet corresponds to single descriptor. Descriptor limit set to mps and desc chain limit set to mps * MAX_DMA_DESC_NUM_GENERIC. On that descriptors complete, to calculate transfer size should be considered correction value for each descriptor. In start request function, if "continue" is true then dma buffer address should be incremmented by offset for all type of transfers, not only for Control DATA_OUT transfers. Fixes: cf77b5fb9b394 ("usb: dwc2: gadget: Transfer length limit checking for DDMA") Fixes: e02f9aa6119e0 ("usb: dwc2: gadget: EP 0 specific DDMA programming") Fixes: aa3e8bc81311e ("usb: dwc2: gadget: DDMA transfer start and complete") Signed-off-by: Minas Harutyunyan <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2020-10-02usb: dwc2: don't use ID/Vbus detection if usb-role-switch on STM32MP15 SoCsAmelie Delaunay1-1/+1
If usb-role-switch is present in the device tree, it means that ID and Vbus signals are not connected to the OTG controller but to an external component (GPIOs, Type-C controller). In this configuration, usb role switch is used to force valid sessions on STM32MP15 SoCs. Acked-by: Minas Harutyunyan <[email protected]> Acked-by: Martin Blumenstingl <[email protected]> Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2020-10-02usb: dwc2: override PHY input signals with usb role switch supportAmelie Delaunay6-4/+210
This patch adds support for usb role switch to dwc2, by using overriding control of the PHY voltage valid and ID input signals. iddig signal (ID) can be overridden: - when setting GUSBCFG_FORCEHOSTMODE, iddig input pin is overridden with 1; - when setting GUSBCFG_FORCEDEVMODE, iddig input pin is overridden with 0. avalid/bvalid/vbusvalid signals can be overridden respectively with: - GOTGCTL_AVALOEN + GOTGCTL_AVALOVAL - GOTGCTL_BVALOEN + GOTGCTL_BVALOVAL - GOTGCTL_VBVALEN + GOTGCTL_VBVALOVAL It is possible to determine valid sessions thanks to usb role switch: - if USB_ROLE_NONE then !avalid && !bvalid && !vbusvalid - if USB_ROLE_DEVICE then !avalid && bvalid && vbusvalid - if USB_ROLE_HOST then avalid && !bvalid && vbusvalid Acked-by: Minas Harutyunyan <[email protected]> Acked-by: Martin Blumenstingl <[email protected]> Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2020-10-02usb: dwc2: Always disable regulators on driver teardownMarc Zyngier1-4/+13
If the dwc2 driver fails to probe after having enabled the regulators, it ends up being unregistered with regulators enabled, something the core regulator code is legitimately upset about: dwc2 ff400000.usb: supply vusb_d not found, using dummy regulator dwc2 ff400000.usb: supply vusb_a not found, using dummy regulator dwc2 ff400000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE WARNING: CPU: 2 PID: 112 at drivers/regulator/core.c:2074 _regulator_put.part.0+0x16c/0x174 Modules linked in: dwc2(E+) dwc3(E) udc_core(E) rtc_hym8563(E) dwmac_generic(E) ulpi(E) usbcore(E) dwc3_meson_g12a(E) roles(E) meson_gx_mmc(E+) i2c_meson(E) mdio_mux_meson_g12a(E) mdio_mux(E) dwmac_meson8b(E) stmmac_platform(E) stmmac(E) mdio_xpcs(E) phylink(E) of_mdio(E) fixed_phy(E) libphy(E) pwm_regulator(E) fixed(E) CPU: 2 PID: 112 Comm: systemd-udevd Tainted: G E 5.9.0-rc4-00102-g423583bc8cf9 #1840 Hardware name: amlogic w400/w400, BIOS 2020.04 05/22/2020 pstate: 80400009 (Nzcv daif +PAN -UAO BTYPE=--) pc : _regulator_put.part.0+0x16c/0x174 lr : regulator_bulk_free+0x6c/0x9c sp : ffffffc012353820 x29: ffffffc012353820 x28: ffffff805a4b7000 x27: ffffff8059c2eac0 x26: ffffff8059c2e810 x25: ffffff805a4b7d00 x24: ffffffc008cf3028 x23: ffffffc011729ef8 x22: ffffff807e2761d8 x21: ffffffc01171df78 x20: ffffff805a4b7700 x19: ffffff805a4b7700 x18: 0000000000000030 x17: 0000000000000000 x16: 0000000000000000 x15: ffffff807ea8d178 x14: 3935312820435455 x13: 2038323a36313a37 x12: ffffffffffffffff x11: 0000000000000040 x10: 0000000000000007 x9 : ffffffc0106f77d0 x8 : ffffffffffffffe0 x7 : ffffffffffffffff x6 : 0000000000017702 x5 : ffffff805a4b7400 x4 : 0000000000000000 x3 : ffffffc01171df78 x2 : ffffff807ea8cc40 x1 : 0000000000000000 x0 : 0000000000000001 Call trace: _regulator_put.part.0+0x16c/0x174 regulator_bulk_free+0x6c/0x9c devm_regulator_bulk_release+0x28/0x3c release_nodes+0x1c8/0x2c0 devres_release_all+0x44/0x6c really_probe+0x1ec/0x504 driver_probe_device+0x100/0x170 device_driver_attach+0xcc/0xd4 __driver_attach+0xb0/0x17c bus_for_each_dev+0x7c/0xd4 driver_attach+0x30/0x3c bus_add_driver+0x154/0x250 driver_register+0x84/0x140 __platform_driver_register+0x54/0x60 dwc2_platform_driver_init+0x2c/0x1000 [dwc2] do_one_initcall+0x54/0x2d0 do_init_module+0x68/0x29c In order to fix this, tie the regulator disabling to the teardown process by registering a devm action callback. This makes sure that the regulators are disabled at the right time (just before they are released). Cc: Minas Harutyunyan <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2020-10-02usb: dwc2: add support for APM82181 USB OTGChristian Lamparter1-0/+1
adds the specific compatible string for the DWC2 IP found in the APM82181 SoCs. The IP is setup correctly through the auto detection... With the exception of the AHB Burst Size. The default of GAHBCFG_HBSTLEN_INCR4 of the "snps,dwc2" can cause a system hang when the USB and SATA is used concurrently. Because the predecessor (PPC460EX (Canyonlands)) already had the same problem, this SoC can make use of the existing dwc2_set_amcc_params() function. Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2020-09-24usb: dwc2: Add missing cleanups when usb_add_gadget_udc() failsMartin Blumenstingl1-1/+5
Call dwc2_debugfs_exit() and dwc2_hcd_remove() (if the HCD was enabled earlier) when usb_add_gadget_udc() has failed. This ensures that the debugfs entries created by dwc2_debugfs_init() as well as the HCD are cleaned up in the error path. Fixes: 207324a321a866 ("usb: dwc2: Postponed gadget registration to the udc class driver") Acked-by: Minas Harutyunyan <[email protected]> Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
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