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path: root/drivers/usb/dwc2
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2016-02-17usb: dwc2: USB_DWC2 should depend on HAS_DMAGeert Uytterhoeven1-0/+1
If NO_DMA=y: ERROR: "usb_gadget_map_request" [drivers/usb/dwc2/dwc2.ko] undefined! ERROR: "usb_gadget_unmap_request" [drivers/usb/dwc2/dwc2.ko] undefined! ERROR: "bad_dma_ops" [drivers/usb/dwc2/dwc2.ko] undefined! Add a dependency on HAS_DMA to fix this. Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-02-17usb: dwc2: host: fix the data toggle error in full speed descriptor dmaTang, Jianqiang2-1/+9
There will be data toggle error happen for full speed buld-out transfer. The data toggle bit is saved in qh for non-control transfers, it is wrong to check the qtd for that case. Also fix one static analysis tool issue after fix the data toggle error. John Youn: * Added WARN() to warn on improper usage of the dwc2_hcd_save_data_toggle() function. Signed-off-by: Dyson Lee <[email protected]> Signed-off-by: Tang, Jianqiang <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-02-17usb: dwc2: host: fix logical omissions in dwc2_process_non_isoc_descVardan Mikayelyan1-11/+10
Fixes memory manipulation issues and makes Host DDMA bulk transfers work. dwc2_process_non_isoc_desc() must return non zero value ONLY when failure happens in one of the queued descriptors. After receiving non zero value the caller must stop processing of remaining QTDs and their descriptors from chain. Commit 26a19ea699060fde ("usb: dwc2: host: fix use of qtd after free in desc dma mode") breaks non_isoc transaction completion logic in Host DDMA mode. There were bugs before that, but after this patch dwc2_process_non_isoc_desc() returns fail status even if descriptor was processed normally. This causes break from loop which is processing remaining descriptors assigned to QTD, which is not correct for QTDs containing more than one descriptor. Current dwc2 driver gathers queued BULK URBs until receiving URB without URB_NO_INTERRUPT flag. Once getting it, SW creates descriptor chain, stores it in qh structure and passes start address to HW. Multiple URB data is contained in that chain. Hence on getting error on descriptor after its processing by HW, SW should go out of both loops(qh->qtd, qtd->descs) and report the failure. Fixes: 26a19ea699060fde ("usb: dwc2: host: fix use of qtd after free in desc dma mode") Cc: Gregory Herrero <[email protected]> Signed-off-by: Vardan Mikayelyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-02-17usb: dwc2: Add extra delay when forcing dr_modeJohn Youn1-0/+6
Fixes an issue found on rockchip rk3036 and rk3188 SOC platforms. For some reason, the existing msleep(25) is not enough after the force mode. The following patch was reported to fix the issue. This does increase the probe delay again slightly, but not up to the level it was before the original series of patches that this fixes. It does not cause any other issues when tested on Synopsys HAPS and Altera socfpga platforms. Need to revisit this series next release to see if we can address these issues without having an unconditional delay. Fixes: 09c96980dc72 ("usb: dwc2: Add functions to set and clear force mode") Reported-by: Caesar Wang <[email protected]> Reported-by: Michael Niewoehner <[email protected]> Tested-by: Heiko Stuebner <[email protected]> Tested-by: Caesar Wang <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-02-14usb: add HAS_IOMEM dependency to USB_DWC2Vegard Nossum1-0/+1
drivers/built-in.o: In function `dwc2_driver_probe': /home/vegard/linux/drivers/usb/dwc2/platform.c:491: undefined reference to `devm_ioremap_resource' Signed-off-by: Vegard Nossum <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2016-02-03usb: dwc2: Fix probe problem on bcm2835John Youn1-6/+0
Fixes an issue found on Raspberry PI platform that prevents probe. Don't skip setting the force mode if it's already set. Fixes: 09c96980dc72 ("usb: dwc2: Add functions to set and clear force mode") Tested-by: Heiko Stuebner <[email protected]> Tested-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Reported-by: Stefan Wahren <[email protected]> Reported-by: Remi Pommarel <[email protected]> Tested-by: Stefan Wahren <[email protected]> Tested-by: Remi Pommarel <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-02-03Revert "usb: dwc2: Move reset into dwc2_get_hwparams()"John Youn2-9/+7
This reverts commit 263b7fb557f7 ("usb: dwc2: Move reset into dwc2_get_hwparams()") due to regression found on bcm2835 platform. USB ethernet fails, due to being unable to pick up proper parameters when performing a plain reset before reading hw params. Below shows the results of the gnptxfsiz and hptxfsiz with and before and after reverting this (from Stefan Wahren): So here is the probe result before Patch 1 is applied: [ 1.283148] dwc2 20980000.usb: Configuration mismatch. dr_mode forced to host [ 1.313894] dwc2 20980000.usb: gnptxfsiz=00201000 [ 1.314104] dwc2 20980000.usb: hptxfsiz=00000000 [ 1.353908] dwc2 20980000.usb: 256 invalid for host_nperio_tx_fifo_size. Check HW configuration. [ 1.354262] dwc2 20980000.usb: 512 invalid for host_perio_tx_fifo_size. Check HW configuration. [ 1.394249] dwc2 20980000.usb: DWC OTG Controller [ 1.394561] dwc2 20980000.usb: new USB bus registered, assigned bus number 1 [ 1.394917] dwc2 20980000.usb: irq 33, io mem 0x00000000 And here is the probe result after Patch 1 is applied: [ 1.280107] dwc2 20980000.usb: Configuration mismatch. dr_mode forced to host [ 1.353949] dwc2 20980000.usb: gnptxfsiz=01001000 [ 1.354166] dwc2 20980000.usb: hptxfsiz=02002000 [ 1.434301] dwc2 20980000.usb: DWC OTG Controller [ 1.434616] dwc2 20980000.usb: new USB bus registered, assigned bus number 1 [ 1.434973] dwc2 20980000.usb: irq 33, io mem 0x00000000 Tested-by: Heiko Stuebner <[email protected]> Tested-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Reported-by: Stefan Wahren <[email protected]> Reported-by: Remi Pommarel <[email protected]> Tested-by: Stefan Wahren <[email protected]> Tested-by: Remi Pommarel <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: add shutdown callback to platform variantHeiko Stübner1-8/+27
In specific conditions (involving usb hubs) dwc2 devices can create a lot of interrupts, even to the point of overwhelming devices running at low frequencies. Some devices need to do special clock handling at shutdown-time which may bring the system clock below the threshold of being able to handle the dwc2 interrupts. Disabling dwc2-irqs in a shutdown callbacks prevents reboots/poweroffs from getting stuck in such cases. The hsotg struct already contains an unused irq element, so we can just use it to store the irq number for the shutdown callback. Reviewed-by: Douglas Anderson <[email protected]> Acked-by: John Youn <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: gadget: Repair DSTS register decodingMarek Vasut1-1/+1
The "enumspd" field is located in register DSTS[2:1], but the code which checks the bitfield does not shift the value accordingly. This in turn causes incorrect detection of gadget link partner speed in dwc2_hsotg_irq_enumdone() . Shift the value accordingly to fix the problem with speed detection. Acked-by: John Youn <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Cc: Felipe Balbi <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: gadget: Remove call to dwc2_hsotg_init()John Youn1-2/+0
Remove call to dwc2_hsotg_init() from dwc2_gadget_init(). The gadget_init function should not access any device registers because the mode isn't guaranteed here. Also, this is already called elsewhere before anything starts on the gadget so it is not necessary here. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Remove redundant reset in probeJohn Youn1-1/+1
Reset already happens before this so just force the dr_mode. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Reduce delay when forcing mode in resetJohn Youn1-1/+1
The delay for force mode is only 25ms according to the databook. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: gadget: Replace dwc2_hsotg_corereset()John Youn1-49/+1
The dwc2_core_reset() function exists in the core so use that one instead. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: gadget: Use hw params from coreJohn Youn1-25/+16
Use the previously cached hw params in the gadget. This saves a reset and force mode in the gadget initialization during probe and makes getting the hardware parameters consistent between gadget and host. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Improve handling of host and device hwparamsJohn Youn2-21/+70
Adds separate functions to get the host and device specific hardware parameters. The functions check whether the parameters need to be read at all, depending on dr_mode, and forces the mode only if necessary. This saves some delays during probe. This also adds two device mode parameters that will be used by the gadget. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Add functions to set and clear force modeJohn Youn2-24/+127
Added functions to set force mode for host and device. These functions will check the current mode and only force if needed thus avoiding unnecessary force mode delays. However clearing the mode is currently done unconditionally and with the delay in place. This is needed during the connector ID status change interrupt in order to ensure that the mode has changed properly. This preserves the old behavior only for this case. The warning comment about this is moved into the clear mode condition. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Move reset into dwc2_get_hwparams()John Youn2-7/+11
The reset is required to get reset values of the hardware parameters but the force mode is not. Move the base reset into dwc2_get_hwparams() and do the reset and force mode afterwards. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Move mode querying functions into core.hJohn Youn2-12/+12
These functions should go in core.h where they can be called from core, device, or host. Signed-off-by: John Youn <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Tested-by: Douglas Anderson <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Fix dr_mode validationJohn Youn1-13/+69
The dr_mode parameter was being checked against how the dwc2 module was being configured at compile time. But it wasn't checked against the hardware capabilities, nor were the hardware capabilities checked against the compilation parameters. This commit adds those checks and adjusts dr_mode to an appropriate value, if needed. If the hardware capabilities and module compilation do not match then we fail as it wouldn't be possible to run properly. The hardware, module, and dr_mode, can each be set to host, device, or otg. Check that all these values are compatible and adjust the value of dr_mode if possible. The following table summarizes the behavior: actual HW MOD dr_mode dr_mode ------------------------------ HST HST any : HST HST DEV any : --- HST OTG any : HST DEV HST any : --- DEV DEV any : DEV DEV OTG any : DEV OTG HST any : HST OTG DEV any : DEV OTG OTG any : dr_mode Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Add functions to check the HW OTG configJohn Youn2-0/+50
Added functions to query the GHWCFG2.OTG_MODE. This tells us whether the controller hardware is configured for OTG, device-only, or host-only. Signed-off-by: John Youn <[email protected]> Tested-by: Douglas Anderson <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Add dwc2_core_reset()John Youn2-2/+21
dwc2_core_reset() was previously renamed to dwc2_core_reset_and_dr_force_mode(). Now add back dwc2_core_reset() which performs only a basic core reset without forcing the mode. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Rename dwc2_core_reset()John Youn3-6/+6
Renamed dwc2_core_reset() to dwc2_core_reset_and_force_dr_mode(). This describes what it is doing more accurately. This is in preparation of introducing a plain dwc2_core_reset() function that only performs the reset and doesn't force the mode. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Reorder AHBIDLE and CSFTRST in dwc2_core_reset()John Youn1-8/+9
According to the databook, the core soft reset should be done before checking for AHBIDLE. The gadget version of core reset had it correct but the hcd version did not. This fixes the hcd version. Signed-off-by: John Youn <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Tested-by: Douglas Anderson <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Avoid more calls to dwc2_core_reset()Douglas Anderson1-17/+23
Calls to dwc2_core_reset() are currently very slow, taking at least 150ms (possibly more). It behooves us to take as many of these calls out as possible. It turns out that the calls in dwc2_fs_phy_init() and dwc2_hs_phy_init() should (as documented in the code) only be needed if we need to do a PHY SELECT. That means that if we see that we can avoid the PHY SELECT then we can avoid the reset. This patch appears to successfully bypass two resets (one per USB device) on rk3288-based ARM Chromebooks. Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: reduce dwc2 driver probe timeYunzhi Li1-5/+5
I found that the probe function of dwc2 driver takes much time when kernel boot up. There are many long delays in the probe function these take almost 1 second. This patch trying to reduce unnecessary delay time. In dwc2_core_reset() I see it use two at least 20ms delays to wait AHB idle and core soft reset, but dwc2 data book said that dwc2 core soft reset and AHB idle just need a few clocks (I think it refers to AHB clock, and AHB clock run at 150MHz in my RK3288 board), so 20ms is too long, delay 1us for wait AHB idle and soft reset is enough. And in dwc2_get_hwparams() it takes 150ms to wait ForceHostMode and ForceDeviceMode valid but in data book it said software must wait at least 25ms before the change to take effect, so I reduce this time to 25ms~50ms. By the way, is there any state bit show that the force mode take effect ? Could we poll curmod bit for figuring out if the change take effect ? It seems that usleep_range() at boot time will pick the longest value in the range. In dwc2_core_reset() there is a very long delay takes 200ms, and this function run twice when probe, could any one tell me is this delay time resonable ? I have tried this patch in my RK3288-evb board. It works well. Signed-off-by: Yunzhi Li <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Speed dwc2_get_hwparams() on some host-only portsDouglas Anderson1-4/+4
On some host-only DWC2 ports (like the one in rk3288) when we set GUSBCFG_FORCEHOSTMODE in GUSBCFG and then read back, we don't see the bit set. Presumably that's because the port is always forced to HOST mode so there's no reason to implement these status bits. Since we know dwc2_core_reset() is always called before dwc2_get_hwparams() and we know dwc2_core_reset() should have set GUSBCFG_FORCEHOSTMODE whenever hsotg->dr_mode == USB_DR_MODE_HOST, we can just check hsotg->dr_mode to decide that we can skip the delays in dwc2_get_hwparams(). Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Avoid double-reset at boot timeDouglas Anderson3-15/+22
In (usb: dwc2: reset dwc2 core before dwc2_get_hwparams()) we added an extra reset to the probe path for the dwc2 USB controllers. This allowed proper detection of parameters even if the firmware had already used the USB part. Unfortunately, this extra reset is quite slow and is affecting boot speed. We can avoid the double-reset by skipping the extra reset that would happen just after the one we added. Logic that explains why this is safe: * As of the CL mentioned above, we now always call dwc2_core_reset() in dwc2_driver_probe() before dwc2_hcd_init(). * The only caller of dwc2_hcd_init() is dwc2_driver_probe(), so we're guaranteed that dwc2_core_reset() was called before dwc2_hdc_init(). * dwc2_hdc_init() is the only caller that passes an irq other than -1 to dwc2_core_init(). Thus if dwc2_core_init() is called with an irq other than -1 we're guaranteed that dwc2_core_reset was called before dwc2_core_init(). ...this allows us to remove the dwc2_core_reset() in dwc2_core_init() if irq is not < 0. Note that since "irq" wasn't used in the function dwc2_core_init() anyway and since select_phy was always set at exactly the same times we could avoid the reset, we remove "irq" and rename "select_phy" to "initial_setup" and adjust the callers accordingly. Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: reset dwc2 core before dwc2_get_hwparams()Yunzhi Li3-1/+8
We initiate dwc2 usb controller in BIOS, dwc2_core_reset() should be called before dwc2_get_hwparams() to reset core registers to default value. Without this the FIFO setting might be incorrect because calculating FIFO size need power-on value of GRXFSIZ/GNPTXFSIZ/HPTXFSIZ registers. This patch could avoid warnning massage like in rk3288 platform: [ 2.074764] dwc2 ff580000.usb: 256 invalid for host_perio_tx_fifo_size. Check HW configuration. Signed-off-by: Yunzhi Li <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: Restore GUSBCFG in dwc2_get_hwparams()Douglas Anderson1-7/+9
Previously dwc2_get_hwparams() was changing GUSBCFG and not putting it back the way it was (specifically it set and cleared FORCEHOSTMODE). Since we want to move dwc2_core_reset() _before_ dwc2_get_hwparams() we should make sure dwc2_get_hwparams() isn't messing with things in a permanent way. Since we're now looking at GUSBCFG, it's obvious that we shouldn't need all the extra delays if FORCEHOSTMODE was already set. This will avoid some delays for any ports that have forced host mode. Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: gadget: don't overwrite DCTL register on NAKEFF interruptsGregory Herrero1-2/+2
When receiving GINTSTS_GINNAKEFF or GINTSTS_GOUTNAKEFF interrupt, DCTL will be overwritten with DCTL_CGOUTNAK or DCTL_CGNPINNAK values. Instead of overwriting it, write only needed bits. It could cause an issue if GINTSTS_GINNAKEFF or GINTSTS_GOUTNAKEFF interrupt is received after dwc2 disabled pullup by writing DCTL_SFTDISCON bit. Pullup will then be re-enabled whereas it should not. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-22usb: dwc2: fix transfer stop programming for out endpointDu, Changbin1-5/+5
To stop an out endpoint, software should set sets the Global OUT NAK, but not the Global Non-periodic IN NAK. This driver bug leads the out-ep failed be in disabled state with below error. dwc2_hsotg_ep_stop_xfr: timeout DOEPCTL.EPDisable Acked-by: John Youn <[email protected]> Signed-off-by: Du, Changbin <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: Clear interrupts before handling themDouglas Anderson2-35/+32
In general it is wise to clear interrupts before processing them. If you don't do that, you can get: 1. Interrupt happens 2. You look at system state and process interrupt 3. A new interrupt happens 4. You clear interrupt without processing it. This patch was actually a first attempt to fix missing device insertions as described in (usb: dwc2: host: Fix missing device insertions) and it did solve some of the signal bouncing problems but not all of them (which is why I submitted the other patch). Specifically, this patch itself would sometimes change: 1. hardware sees connect 2. hardware sees disconnect 3. hardware sees connect 4. dwc2_port_intr() - clears connect interrupt 5. dwc2_handle_common_intr() - calls dwc2_hcd_disconnect() ...to: 1. hardware sees connect 2. hardware sees disconnect 3. dwc2_port_intr() - clears connect interrupt 4. hardware sees connect 5. dwc2_handle_common_intr() - calls dwc2_hcd_disconnect() ...but with different timing then sometimes we'd still miss cable insertions. In any case, though this patch doesn't fix any (known) problems, it still seems wise as a general policy to clear interrupt before handling them. Note that for dwc2_handle_usb_port_intr(), instead of moving the clear of PRTINT to the beginning of the function we remove it completely. The only way to clear PRTINT is to clear the sources that set it in the first place. Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: Add missing spinlock in dwc2_hcd_reset_func()Douglas Anderson1-0/+6
The dwc2_hcd_reset_func() function is only ever called directly by a delayed work function. As such no locks are already held when the function is called. Doing a read-modify-write of CPU registers and setting fields in the main hsotg data structure is a bad idea without locks. Let's add locks. The bug was found by code inspection only. It turns out that the dwc2_hcd_reset_func() is only ever called today if the "host_support_fs_ls_low_power" parameter is enabled and no code in mainline enables that parameter. Thus no known issues in mainline are fixed by this patch, but it's still probably wise to fix the function. Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: Support immediate retries for split transactionsDouglas Anderson1-2/+12
In some cases, like when you've got a "Microsoft Wireless Keyboard 2000" connected to dwc2 with a hub, expected that we'll get some transfer errors sometimes. The controller is expected to try at least 3 times before giving up. See figure "Figure A-67. Normal HS CSPLIT 3 Strikes Smash" in the USB spec. The dwc2 controller has a way to support this by using the "EC_MC" field. The Raspberry Pi driver has logic for setting this right. See fiq_fsm_queue_split_transaction() in their "dwc_otg_hcd.c". Let's use the same logic. After making this change, we no longer get dropped characters from the above mentioned keyboard. Other devices on the same bus as the keyboard also behave more properly. Thanks for Julius Werner for the expert analysis and suggestions. Acked-by: John Youn <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: Fix missing device insertionsDouglas Anderson4-11/+45
If you've got your interrupt signals bouncing a bit as you insert your USB device, you might end up in a state when the device is connected but the driver doesn't know it. Specifically, the observed order is: 1. hardware sees connect 2. hardware sees disconnect 3. hardware sees connect 4. dwc2_port_intr() - clears connect interrupt 5. dwc2_handle_common_intr() - calls dwc2_hcd_disconnect() Now you'll be stuck with the cable plugged in and no further interrupts coming in but the driver will think we're disconnected. We'll fix this by checking for the missing connect interrupt and re-connecting after the disconnect is posted. We don't skip the disconnect because if there is a transitory disconnect we really want to de-enumerate and re-enumerate. Notes: 1. As part of this change we add a "force" parameter to dwc2_hcd_disconnect() so that when we're unloading the module we avoid the new behavior. The need for this was pointed out by John Youn. 2. The bit of code needed at the end of dwc2_hcd_disconnect() is exactly the same bit of code from dwc2_port_intr(). To avoid duplication, we refactor that code out into a new function dwc2_hcd_connect(). Signed-off-by: Douglas Anderson <[email protected]> Acked-by: John Youn <[email protected]> Tested-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: add support of hi6220Zhangfei Gao1-0/+33
Support hisilicon,hi6220-usb for HiKey board Acked-by: Rob Herring <[email protected]> Acked-by: John Youn <[email protected]> Signed-off-by: Zhangfei Gao <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: use kmem cache to allocate descriptorsGregory Herrero3-3/+71
Kmem caches help to get correct boundary for descriptor buffers which need to be 512 bytes aligned for dwc2 controller. Two kmem caches are needed for generic descriptors and for hs isochronous descriptors which doesn't have same size. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: fix descriptor list address maskingMian Yousaf Kaukab2-11/+3
Masks for HCDMA.CTD and HCDMA.DMAAddr are incorrect. As we always start from first descriptor, no need to mask the address anyway. Acked-by: John Youn <[email protected]> Signed-off-by: Mian Yousaf Kaukab <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: avoid usage of dma_alloc_coherent with irqs disabledGregory Herrero5-25/+94
Use Streaming DMA mappings to handle cache coherency of frame list and descriptor list. Cache are always flushed before controller access it or before cpu access it. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: enable descriptor dma for fs devicesMian Yousaf Kaukab6-3/+84
As descriptor dma mode does not support split transfers, it can't be enabled for high speed devices. Add a core parameter to enable it for full speed devices. Ensure frame list and descriptor list are correctly freed during disconnect. Acked-by: John Youn <[email protected]> Signed-off-by: Mian Yousaf Kaukab <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: process all completed urbsGregory Herrero1-2/+36
Process all completed urbs, if more urbs are complete by the time driver processes completion interrupt. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: always increment available host channel during releaseGregory Herrero1-0/+1
When releasing a channel, increment hsotg->available_host_channels even in case a periodic channel is released. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: program descriptor for next frameGregory Herrero2-2/+32
Isochronous descriptor is currently programmed for the frame after the last descriptor was programmed. If the last descriptor frame underrun, then current descriptor must take this into account and must be programmed on the current frame + 1. This overrun usually happens when system is loaded and dwc2 can't init descriptor list in time. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: add function to compare frame indexGregory Herrero1-0/+13
This function allow comparing frame index used for descriptor list which has 64 entries. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: spinlock release channelGregory Herrero1-0/+4
Prevent dwc2 driver from accessing channel while it frees it. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: fix use of qtd after free in desc dma modeGregory Herrero1-1/+4
When completing non isoc xfer, dwc2_complete_non_isoc_xfer_ddma() is relying on qtd->n_desc to process the corresponding number of descriptors. During the processing of these descriptors, qtd could be unlinked and freed if xfer is done and urb is no more in progress. In this case, dwc2_complete_non_isoc_xfer_ddma() will read again qtd->n_desc whereas qtd has been freed. This will lead to unpredictable results since qtd->n_desc is no more valid value. To avoid this error, return a result != 0 in dwc2_process_non_isoc_desc(), so that dwc2_complete_non_isoc_xfer_ddma() stops desc processing. This has been seen with Slub debug enabled. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: rework isochronous halt pathGregory Herrero1-1/+21
When a channel is halted because of urb dequeue during transfer completion, no other qtds must be scheduled until halt is done. Moreover, all in progress qtds must be given back. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: set active bit in isochronous descriptorsGregory Herrero1-8/+3
Active bit must be enabled in all scheduled descriptors. Else transfer never start. Remove previous code which was not correctly configuring descriptors. Active bit was set before calling dwc2_fill_host_isoc_dma_desc() which is erasing dma_desc->status. Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-12-15usb: dwc2: host: ensure filling of isoc desc is correctly doneGregory Herrero1-2/+3
Increment qtd->isoc_frame_index_last before testing it, else below check will never be true and IOC (Interrupt On Complete) bit for last frame will never be set in descriptor status. /* Set IOC for each descriptor corresponding to last frame of URB */ if (qtd->isoc_frame_index_last == qtd->urb->packet_count) dma_desc->status |= HOST_DMA_IOC; Acked-by: John Youn <[email protected]> Signed-off-by: Gregory Herrero <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-11-20usb: dwc2: fix kernel oops during driver probeStefan Wahren1-14/+14
This patch make sure that all necessary members of dwc2_hsotg are initialized before the irq handler is requested. So the kernel oops triggered by dwc2_handle_common_intr has been fixed. dwc2 20980000.usb: Configuration mismatch. Forcing host mode dwc2 20980000.usb: no platform data or transceiver defined Unable to handle kernel paging request at virtual address cc860040 pgd = c0004000 [cc860040] *pgd=0b41e811, *pte=00000000, *ppte=00000000 Internal error: Oops: 7 [#1] ARM CPU: 0 PID: 1 Comm: swapper Not tainted 4.3.0-rc3+ #19 Hardware name: BCM2835 task: cb494000 ti: cb4d0000 task.ti: cb4d0000 PC is at dwc2_is_controller_alive+0x18/0x34 LR is at dwc2_handle_common_intr+0x24/0xb60 Acked-by: John Youn <[email protected]> Tested-by: Marek Szyprowski <[email protected]> Signed-off-by: Stefan Wahren <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>