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path: root/drivers/usb/chipidea
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2015-08-14usb: chipidea: imx: properly check for usbmiscTomeu Vizoso1-1/+1
If usbmisc hasn't probed yet, defer the probe. It's not enough to check if the platform device for the OF node of the usbmisc has been registered, but it also needs to have been probed already before we can call imx_usbmisc_init(). This can happen if the order in which devices are probed change due to async probing or on-demand probing of dependencies. Signed-off-by: Tomeu Vizoso <[email protected]>
2015-08-14usb: chipidea: debug: add runtime pm for register accessLi Jun1-0/+6
Add runtime pm operations for registers access to avoid system hang. Signed-off-by: Li Jun <[email protected]>
2015-08-14usb:chipidea:Make the function hw_alloc_repmap have a return type of voidNicholas Krause1-2/+1
This makes the function hw_alloc_repmap be declared to have a return type of void now due to this particular function never returning a error code to its caller due to this function always running successfully to completion nor it's caller putting the return value into a variable in order to check if a error code is passed from the function hw_alloc_repmap when calling this function. Signed-off-by: Nicholas Krause <[email protected]>
2015-08-14usb: chipidea: host: delete the redundancy ci_hdrc structPeter Chen1-3/+1
The struct ci_hdrc is the drvdata for hcd device, so we don't need to introduce extra ci_hdrc structure for ehci. Signed-off-by: Peter Chen <[email protected]>
2015-08-14usb: chipidea: introduce ITC tuning interfacePeter Chen1-0/+16
ITC (Interrupt Threshold Control) is used to set the maximum rate at which the host/device controller will issue interrupts. The default value is 8 (1ms) for it. EHCI core will modify it to 1, but device mode keeps it as default value. In some use cases like Android ADB, it only has one usb request for each direction, and maximum payload data is only 4KB, so the speed is 4MB/s at most, it needs controller to trigger interrupt as fast as possible to increase the speed. The USB performance will be better if the interrupt can be triggered faster. Reduce ITC value is benefit for USB performance, but the interrupt number is increased at the same time, it may increase cpu utilization too. Most of use case cares about performance, but some may care about cpu utilization, so, we leave a platform interface for user. We set ITC as 1 (1 micro-frame) as default value which is aligned with ehci core default value. Signed-off-by: Peter Chen <[email protected]>
2015-08-14usb: chipidea: introduce ci_platform_configurePeter Chen3-18/+27
It is used to configure controller parameters according to platform data, like speed, stream mode, etc, both host and device's initialization need it, most of code are the same for both roles, with this new interface, it can reduce the duplicated code and be easy to maintain in future. Signed-off-by: Peter Chen <[email protected]>
2015-08-14usb: chipidea: otg_fsm: delete the duplicated reset controller operationPeter Chen1-1/+0
At host_stop, it will call usb_remove_hcd, and reset controller later. Signed-off-by: Peter Chen <[email protected]>
2015-08-14usb: chipidea: udc: add USB_DEVICE_A_HNP_SUPPORT request supportPeter Chen1-0/+7
We can support USB OTG 1.3 USB_DEVICE_A_HNP_SUPPORT request when the driver supports OTG FSM mode. Signed-off-by: Peter Chen <[email protected]>
2015-08-14usb: chipidea: imx: enable CI_HDRC_SET_NON_ZERO_TTHAPeter Chen1-1/+2
For i.mx platform, set ttctrl.ttha with non-zero value only affects sitd, and ehci core makes sure the schedule is not full when accepts new request, so it will not occur the transaction which will acorss the SoF. Signed-off-by: Peter Chen <[email protected]>
2015-08-14usb: chipidea: add ttctrl.ttha control interfacePeter Chen4-0/+11
The register of ttctrl.ttha describes like below: - Internal TT Hub Address Representation - RW - Default = 0000000b This field is used to match against the Hub Address field in QH & siTD to determine if the packet is routed to the internal TT for directly attached FS/LS devices. If the Hub Address in the QH or siTD does not match this address then the packet will be broadcast on the High Speed ports destined for a downstream High Speed hub with the address in the QH/siTD. In silicon RTL, this entry only affects QH and siTD, and the hub.addr at both QH and siTD are 0 in ehci core for chipidea (with hcd->has_tt = 1). So, for QH, if the "usage_tt" flag at RTL is 0, set CI_HDRC_SET_NON_ZERO_TTHA will not affect QH (with non-hs device); for siTD, set this flag will change remaining space requirement for the last transaction from 1023 bytes to 188 bytes, it can increase the number of transactions within one frame, ehci periodic schedule code will not queue the packet if the frame space is full, so it is safe to set this flag for siTD. With this flag, it can fix the problem Alan Stern reported below: http://www.spinics.net/lists/linux-usb/msg123125.html And may fix Michael Tessier's problem too. http://www.spinics.net/lists/linux-usb/msg118679.html CC: [email protected] CC: [email protected] Signed-off-by: Peter Chen <[email protected]>
2015-08-04usb: chipidea: udc: add ep capabilities supportRobert Baldyga1-0/+14
Convert endpoint configuration to new capabilities model. Signed-off-by: Robert Baldyga <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-08-03usb: chipidea: add ci->is_otg condition for otg judgementLi Jun1-2/+2
Since some chipidea based controller is not otg capable, add ci->is_otg condition when setting is_otg flag for gadget. Signed-off-by: Li Jun <[email protected]> Reviewed-by: Roger Quadros <[email protected]> Acked-by: Peter Chen <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-07-29usb: chipidea: update ci_otg_is_fsm_mode conditionsLi Jun2-1/+5
After introduce usb otg properties, update ci_otg_is_fsm_mode conditions to be depending on both usb hardware properties and usb driver config, also resolve a compile issue in debug.c after the API change. Acked-by: Peter Chen <[email protected]> Signed-off-by: Li Jun <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-07-29usb: chipidea: set usb otg capabilitiesLi Jun2-1/+21
Init and update otg capabilities by DT, set gadget's otg capabilities accordingly. Acked-by: Peter Chen <[email protected]> Reviewed-by: Roger Quadros <[email protected]> Signed-off-by: Li Jun <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-07-22usb: chipidea: ehci_init_driver is intended to call one timePeter Chen3-3/+23
The ehci_init_driver is used to initialize hcd APIs for each ehci controller driver, it is designed to be called only one time and before driver register is called. The current design will cause ehci_init_driver is called multiple times at probe process, it will cause hc_driver's initialization affect current running hcd. We run out NULL pointer dereference problem when one hcd is started by module_init, and the other is started by otg thread at SMP platform. The reason for this problem is ehci_init_driver will do memory copy for current uniform hc_driver, and this memory copy will do memset (as 0) first, so when the first hcd is running usb_add_hcd, and the second hcd may clear the uniform hc_driver's space (at ehci_init_driver), then the first hcd will meet NULL pointer at the same time. See below two logs: LOG_1: ci_hdrc ci_hdrc.0: EHCI Host Controller ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1 ci_hdrc ci_hdrc.1: doesn't support gadget Unable to handle kernel NULL pointer dereference at virtual address 00000014 pgd = 80004000 [00000014] *pgd=00000000 Internal error: Oops: 805 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 108 Comm: kworker/u8:2 Not tainted 3.14.38-222193-g24b2734-dirty #25 Workqueue: ci_otg ci_otg_work task: d839ec00 ti: d8400000 task.ti: d8400000 PC is at ehci_run+0x4c/0x284 LR is at _raw_spin_unlock_irqrestore+0x28/0x54 pc : [<8041f9a0>] lr : [<8070ea84>] psr: 60000113 sp : d8401e30 ip : 00000000 fp : d8004400 r10: 00000001 r9 : 00000001 r8 : 00000000 r7 : 00000000 r6 : d8419940 r5 : 80dd24c0 r4 : d8419800 r3 : 8001d060 r2 : 00000000 r1 : 00000001 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: 1000404a DAC: 00000015 Process kworker/u8:2 (pid: 108, stack limit = 0xd8400238) Stack: (0xd8401e30 to 0xd8402000) 1e20: d87523c0 d8401e48 66667562 d8419800 1e40: 00000000 00000000 d8419800 00000000 00000000 00000000 d84198b0 8040fcdc 1e60: 00000000 80dd320c d8477610 d8419c00 d803d010 d8419800 00000000 00000000 1e80: d8004400 00000000 d8400008 80431494 80431374 d803d100 d803d010 d803d1ac 1ea0: 00000000 80432428 804323d4 d803d100 00000001 80435eb8 80e0d0bc d803d100 1ec0: 00000006 80436458 00000000 d803d100 80e92ec8 80436f44 d803d010 d803d100 1ee0: d83fde00 8043292c d8752710 d803d1f4 d803d010 8042ddfc 8042ddb8 d83f3b00 1f00: d803d1f4 80042b60 00000000 00000003 00000001 00000001 80054598 d83f3b00 1f20: d8004400 d83f3b18 d8004414 d8400000 80e3957b 00000089 d8004400 80043814 1f40: d839ec00 00000000 d83fcd80 d83f3b00 800436e4 00000000 00000000 00000000 1f60: 00000000 80048f34 00000000 00000000 00000000 d83f3b00 00000000 00000000 1f80: d8401f80 d8401f80 00000000 00000000 d8401f90 d8401f90 d8401fac d83fcd80 1fa0: 80048e68 00000000 00000000 8000e538 00000000 00000000 00000000 00000000 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [<8041f9a0>] (ehci_run) from [<8040fcdc>] (usb_add_hcd+0x248/0x6e8) [<8040fcdc>] (usb_add_hcd) from [<80431494>] (host_start+0x120/0x2e4) [<80431494>] (host_start) from [<80432428>] (ci_otg_start_host+0x54/0xbc) [<80432428>] (ci_otg_start_host) from [<80435eb8>] (otg_set_protocol+0xa4/0xd0) [<80435eb8>] (otg_set_protocol) from [<80436458>] (otg_set_state+0x574/0xc58) [<80436458>] (otg_set_state) from [<80436f44>] (otg_statemachine+0x408/0x46c) [<80436f44>] (otg_statemachine) from [<8043292c>] (ci_otg_fsm_work+0x3c/0x190) [<8043292c>] (ci_otg_fsm_work) from [<8042ddfc>] (ci_otg_work+0x44/0x1c4) [<8042ddfc>] (ci_otg_work) from [<80042b60>] (process_one_work+0xf4/0x35c) [<80042b60>] (process_one_work) from [<80043814>] (worker_thread+0x130/0x3bc) [<80043814>] (worker_thread) from [<80048f34>] (kthread+0xcc/0xe4) [<80048f34>] (kthread) from [<8000e538>] (ret_from_fork+0x14/0x3c) Code: e5953018 e3530000 0a000000 e12fff33 (e5878014) LOG_2: ci_hdrc ci_hdrc.0: EHCI Host Controller ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1 ci_hdrc ci_hdrc.1: doesn't support gadget Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = 80004000 [00000000] *pgd=00000000 In Online 00:00ternal e Offline rror: Oops: 80000005 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 108 Comm: kworker/u8:2 Not tainted 3.14.38-02007-g24b2734-dirty #127 Workque Online 00:00ue: ci_o Offline tg ci_otg_work Online 00:00task: d8 Offline 39ec00 ti: d83ea000 task.ti: d83ea000 PC is at 0x0 LR is at usb_add_hcd+0x248/0x6e8 pc : [<00000000>] lr : [<8040f644>] psr: 60000113 sp : d83ebe60 ip : 00000000 fp : d8004400 r10: 00000001 r9 : 00000001 r8 : d85fd4b0 r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : d85fd400 r3 : 00000000 r2 : d85fd4f4 r1 : 80410178 r0 : d85fd400 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: 1000404a DAC: 00000015 Process kworker/u8:2 (pid: 108, stack limit = 0xd83ea238) Stack: (0xd83ebe60 to 0xd83ec000) be60: 00000000 80dd920c d8654e10 d85fd800 d803e010 d85fd400 00000000 00000000 be80: d8004400 00000000 d83ea008 80430e34 80430d14 d803e100 d803e010 d803e1ac bea0: 00000000 80431dc8 80431d74 d803e100 00000001 80435858 80e130bc d803e100 bec0: 00000006 80435df8 00000000 d803e100 80e98ec8 804368e4 d803e010 d803e100 bee0: d86e8100 804322cc d86cf050 d803e1f4 d803e010 8042d79c 8042d758 d83cf900 bf00: d803e1f4 80042b78 00000000 00000003 00000001 00000001 800545e8 d83cf900 bf20: d8004400 d83cf918 d8004414 d83ea000 80e3f57b 00000089 d8004400 8004382c bf40: d839ec00 00000000 d8393780 d83cf900 800436fc 00000000 00000000 00000000 bf60: 00000000 80048f50 80e019f4 00000000 0000264c d83cf900 00000000 00000000 bf80: d83ebf80 d83ebf80 00000000 00000000 d83ebf90 d83ebf90 d83ebfac d8393780 bfa0: 80048e84 00000000 00000000 8000e538 00000000 00000000 00000000 00000000 bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 ee66e85d 133ebd03 [<804 Online 00:000f644>] Offline (usb_add_hcd) from [<80430e34>] (host_start+0x120/0x2e4) [<80430e34>] (host_start) from [<80431dc8>] (ci_otg_start_host+0x54/0xbc) [<80431dc8>] (ci_otg_start_host) from [<80435858>] (otg_set_protocol+0xa4/0xd0) [<80435858>] (otg_set_protocol) from [<80435df8>] (otg_set_state+0x574/0xc58) [<80435df8>] (otg_set_state) from [<804368e4>] (otg_statemachine+0x408/0x46c) [<804368e4>] (otg_statemachine) from [<804322cc>] (ci_otg_fsm_work+0x3c/0x190) [<804322cc>] (ci_otg_fsm_work) from [<8042d79c>] (ci_otg_work+0x44/0x1c4) [<8042d79c>] (ci_otg_work) from [<80042b78>] (process_one_work+0xf4/0x35c) [<80042b78>] (process_one_work) from [<8004382c>] (worker_thread+0x130/0x3bc) [<8004382c>] (worker_thread) from [<80048f50>] (kthread+0xcc/0xe4) [<80048f50>] (kthread) from [<8000e538>] (ret_from_fork+0x14/0x3c) Code: bad PC value Cc: Jun Li <[email protected]> Cc: <[email protected]> Cc: Alan Stern <[email protected]> Acked-by: Alan Stern <[email protected]> Signed-off-by: Peter Chen <[email protected]>
2015-06-10Merge tag 'usb-ci-v4.2-rc1' of ↵Greg Kroah-Hartman1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb into usb-work Peter writes: USB Chipidea update for v4.2-rc1 Just a minor change for code style
2015-06-09usb: chipidea: add work-around for Marvell HSIC PHY startupRob Herring1-0/+12
The Marvell 28nm HSIC PHY requires the port to be forced to HS mode after the port power is applied. This is done using the test mode in the PORTSC register. As HSIC is always HS, this work-around should be safe to do with all HSIC PHYs and has been tested on i.MX6S. Signed-off-by: Rob Herring <[email protected]> Tested-by: Peter Chen <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: [email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-06-09usb: chipidea: allow multiple instances to use default ci_default_pdataRob Herring1-3/+5
Currently, ci_default_pdata is common to all instances of the driver and gets modified by the core driver code. This is bad if there are multiple instances of the device with different settings such as the phy type. Fix this by making a copy of the default platform_data. Signed-off-by: Rob Herring <[email protected]> Cc: Peter Chen <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: [email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-06-08usb: chipidea: usbmisc_imx: Remove unneeded semicolonFabio Estevam1-1/+1
Remove unneeded semicolon. The semantic patch that makes this change is available in scripts/coccinelle/misc/semicolon.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Peter Chen <[email protected]>
2015-05-06usb: chipidea: debug: avoid out of bound readHeinrich Schuchardt1-1/+5
A string written by the user may not be zero terminated. sscanf may read memory beyond the buffer if no zero byte is found. For testing build with CONFIG_USB_CHIPIDEA=y, CONFIG_USB_CHIPIDEA_DEBUG=y. Signed-off-by: Heinrich Schuchardt <[email protected]> Signed-off-by: Peter Chen <[email protected]>
2015-04-28usb: chipidea: otg: remove mutex unlock and lock while stop and start roleLi Jun1-4/+0
Wrongly release mutex lock during otg_statemachine may result in re-enter otg_statemachine, which is not allowed, we should do next state transtition after previous one completed. Fixes: 826cfe751f3e ("usb: chipidea: add OTG fsm operation functions implementation") Cc: <[email protected]> # v3.16+ Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-04-08usb: chipidea: debug: add low power mode check before print registersLi Jun1-2/+2
Since the required clock to access registers is gated off in low power mode, add ci->in_lpm check before try to dump registers value. Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]>
2015-04-08usb: chipidea: udc: bypass pullup DP when gadget connect in OTG fsm modeLi Jun1-0/+4
By pass pullup DP in OTG fsm mode when do gadget connect, to let it handled by OTG state machine. This patch can fix the problem you found with my HNP polling patchset after below 3 patches introduced: 467a78c usb: chipidea: udc: apply new usb_udc_vbus_handler interface 628ef0d usb: udc: add usb_udc_vbus_handler dfea9c9 usb: udc: store usb_udc pointer in struct usb_gadget Problem: - Connect USB cable and MicroAB cable between two boards - Boot up two boards - load g_mass_storage at B-device side, the enumeration will success, and A will see a usb mass-storage device - load g_mass_storage at A-device side, the problem has occurred, the connection will be lost at the beginning, then connect again. This patch is based on commit eff933c1d3a2e046492b3dfc86db813856553a29 (chipidea: pci: make it depends on NOP_USB_XCEIV) on branch peter-usb-dev of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]>
2015-03-26chipidea: pci: make it depends on NOP_USB_XCEIVAndy Shevchenko1-0/+1
After commit ba1aff67f99a (chipidea: pci: register nop PHY) the PCI glue driver requires nop-PHY to be selected. Thus, make it an explicit dependency. Reported-by: kbuild test robot <[email protected]> Fixes: ba1aff67f99a (chipidea: pci: register nop PHY) Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-26chipidea: introduce specific Kconfig options for glue driversAndy Shevchenko2-7/+12
This patch introduces USB_CHIPIDEA_PCI and USB_CHIPIDEA_OF Kconfig options, one per each specific glue driver. This is needed to provide different dependencies they have. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-26usb: chipidea: use hrtimer for otg fsm timersLi Jun3-197/+190
Current otg fsm timers are using controller 1ms irq and count it, this patch is to replace it with hrtimer solution, use one hrtimer for all otg timers. Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-26usb: otg-fsm: move 2 otg fsm timers definition to otg_fsm_timerLi Jun2-16/+5
B_DATA_PLS(data-line pulse time) and B_SSEND_SRP(session end to SRP init) are also from OTG&EH 2.0 Specification and they are not chipidea specific. Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-26usb: chipidea: otg: remove unnecessary B_SESS_VLD timerLi Jun2-33/+1
Since BSV irq is enabled for B-device all the time, so B_SESS_VLD timer is not required, and also no need to check BSV status when B_ASE0_BRST timer timeout. Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-26usb: chipidea: usbmisc_imx: fix returnvar.cocci warningskbuild test robot1-2/+1
drivers/usb/chipidea/usbmisc_imx.c:277:5-8: Unneeded variable: "ret". Return "0" on line 297 Removes unneeded variable used to store return value. Generated by: scripts/coccinelle/misc/returnvar.cocci Cc: Julia Lawall <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Fengguang Wu <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-24Merge tag 'usb-for-v4.1' of ↵Greg Kroah-Hartman1-5/+5
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: usb: patches for v4.1 merge window As usual, a big pile of commits. This time a total of 111 non-merge commits. Other than the usual set of cleanups and non-critical fixes, we have some interesting work for AM335x's MUSB babble recovery. Now that takes a lot less time and we don't have to Reset MUSB all the time. The printer gadget has been converted to configfs interface and the atmel udc has learned suspend/resume with wakeup. Signed-off-by: Felipe Balbi <[email protected]>
2015-03-23Merge 4.0-rc5 into usb-nextGreg Kroah-Hartman1-0/+11
We want the USB fixes in here as well to resolve merge conflicts. Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-19usb: chipidea: udc: apply new usb_udc_vbus_handler interfacePeter Chen1-5/+5
It can move all pullup/pulldown operation control to udc-core through usb_gadget_connect/usb_gadget_disconnect according to vbus status. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2015-03-18usb: chipidea: support runtime power management for otg fsm modeLi Jun3-7/+59
This patch adds runtime power management support for otg fsm mode, since A-device in a_idle state cannot detect data pulse irq after suspended, here enable wakeup by connection before suspend to make it can be resumed by DP; and handle wakeup from that state like SRP. Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: host: turn on vbus before add hcd if early vbus on is requiredLi Jun1-5/+22
If CI_HDRC_TURN_VBUS_EARLY_ON is set, turn on vbus before adding hcd, so it will not set reg_vbus of ehci_ci_priv, then vbus will not be handled by ehci core. Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: add a flag for turn on vbus early for hostLi Jun1-4/+8
Some usb PHYs need power supply from vbus to make it work, eg mxs-phy, if there is no vbus, USB PHY will not in correct state when the controller starts to work, for host, this requires vbus should be turned on before setting port power(PP) of ehci, to work with this kind of USB PHY design, this patch adds a flag CI_HDRC_TURN_VBUS_EARLY_ON, can be checked by host driver to turn on vbus while start host. Signed-off-by: Li Jun <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18chipidea: pci: register nop PHYAndy Shevchenko1-7/+24
Since PHY for ChipIdea is optional (not all SoCs having PHY for ChipIdea should be programmed), we register 'nop' PHY for platforms that do not have programmable PHY. Acked-by: Felipe Balbi <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: host: add .bus_suspend quirkPeter Chen1-0/+44
For chipidea, its resume sequence is not-EHCI compatible, see below description for FPR at portsc. So in order to send SoF in time for remote wakeup sequence(within 3ms), the RUN/STOP bit must be set before the resume signal is ended, but the usb resume code may run after resume signal is ended, so we had to set it at suspend path. Force Port Resume - RW. Default = 0b. 1= Resume detected/driven on port. 0=No resume (K-state) detected/driven on port. Host mode: Software sets this bit to one to drive resume signaling. The Controller sets this bit to '1' if a J-to-K transition is detected while the port is in the Suspend state. When this bit transitions to a '1' because a J-to-K transition is detected, the Port Change Detect bit in the USBSTS register is also set to '1'. This bit will automatically change to '0' after the resume sequence is complete. This behavior is different from EHCI where the controller driver is required to set this bit to a '0' after the resume duration is timed in the driver. Note that when the controller owns the port, the resume sequence follows the defined sequence documented in the USB Specification Revision 2.0. The resume signaling (Full-speed 'K') is driven on the port as long as this bit remains a '1'. This bit will remain a '1' until the port has switched to idle. Writing a '0' has no affect because the port controller will time the resume operation, clear the bit and the port control state switches to HS or FS idle. This field is '0' if Port Power(PP) is '0' in host mode. This bit is not-EHCI compatible. Acked-by: Alan Stern <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18Chipidea: Set connect-at-fullspeed bit when entering host mode if ↵Daniel Tang1-0/+3
CI_HDRC_FORCE_FULLSPEED is set in the platform data PORTSC_PFSC is not set on entering host mode which means the USB OTG controller will attempt to enumerate USB devices at high speed even when the CI_HDRC_FORCE_FULLSPEED flag is set in the platform data. This patch ensures it is set right before host mode operations begin if needed. Signed-off-by: Daniel Tang <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18Chipidea: TI-NSPIRE USB OTG hardware does not support high speed and must ↵Daniel Tang1-1/+1
connect at full speed Signed-off-by: Daniel Tang <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: Add errata for revision 2.40aSanchayan Maity1-0/+20
At chipidea revision 2.40a, there is a below errata: 9000531823 B2-Medium Adding a dTD to a Primed Endpoint May Not Get Recognized Title: Adding a dTD to a Primed Endpoint May Not Get Recognized Impacted Configuration: All device mode configurations. Description: There is an issue with the add dTD tripwire semaphore (ATDTW bit in USBCMD register) that can cause the controller to ignore a dTD that is added to a primed endpoint. When this happens, the software can read the tripwire bit and the status bit at '1' even though the endpoint is unprimed. After executing a dTD, the device controller endpoint state machine executes a final read of the dTD terminate bit to check if the application added a dTD to the linked list at the last moment. This read is done in the finpkt_read_latest_next_td (44) state. After the read is performed, if the terminate bit is still set, the state machine moves to unprime the endpoint. The decision to unprime the endpoint is done in the checkqh_decision (59) state, based on the value of the terminate bit. Before reaching the checkqh_decision state, the state machine traverses the writeqhtd_status (57), writeqh_status (56), and release_prime_mask (42) states. As shown in the waveform, the ep_addtd_tripwire_clr signal is not set to clear the tripwire bit in these states. Workaround: The software must implement a periodic poll cycle, and check for each dTD pending on execution (Active = 1), if the enpoint is primed. It can do this by reading the corresponding bits in the ENDPTPRIME and ENDPTSTAT registers. If these bits are read at 0, the software needs to re-prime the endpoint by writing 1 to the corresponding bit in the ENDPTPRIME register. This can be done for every microframe, every frame or with a larger interval, depending on the urgency of transfer execution for the application. Tested-by: Stefan Agner <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Sanchayan Maity <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: add chipidea revision informationPeter Chen3-2/+45
Define ci_get_revision API to know the controller revision information according to chipidea 1.1a, 2.0a and 2.5a spec. Besides, add one entry at struct ci_hdrc to indicate revision information, it can be used for adding different code for revisions, eg kinds of errata. Reviewed-by: Stefan Agner <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: add identification registers access APIsPeter Chen1-0/+39
Using hw_write_id_reg and hw_read_id_reg to write and read identification registers contents, they can be used to get controller information, change some system configurations, and so on. Reviewed-by: Stefan Agner <[email protected]> Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: usbmisc_imx: add imx6sx initialization routinePeter Chen1-0/+47
Except the same process with earlier imx6, it has below two features: - Choose which vbus voltage as vbus wakeup source We choose B_SESSION_VALID as vbus wakeup source since when the system goes to suspend, the vbus comparator can't compare the vbus voltage for VBUS_VALID. - Disable dp/dm (linestate) change as wakeup source at device mode when the vbus is not there, we don't expect dp/dm change waking up usb controller at this situation. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: clear otg interrupt status for otg capable controllerPeter Chen1-4/+5
We need to do it for all otg capable controller, not only peripheral featured otg capable controller, otherwise, the host-only role, but otg capable controller may be responded by otg interrupt. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: imx: add usb as system wakeup sourcePeter Chen1-0/+13
Enable USB as system wakeup source, and each platform needs to implement imx_usbmisc_set_wakeup in usbmisc_imx.c to support. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: add usb as system wakeup sourcePeter Chen1-0/+10
The USB signal can be system wakeup source, this patch add the support, for how to enable it, see Documentation/usb/chipidea.txt. Since USB wakeup enable logic is vendor/platform specific, the glue layer needs to implement it to support this feature. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: imx: add runtime power management supportPeter Chen1-6/+100
Add runtime pm support for imx, only imx6 series are supported and tested. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: usbmisc_imx: add .set_wakeup interfacePeter Chen2-0/+53
This API is used to enable/disable usb wakeup, only imx6 series are added, since I don't have other imx hardware on hand. Other imx users can add their API according to reference manual after testing. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: add runtime power management supportPeter Chen3-6/+102
Add runtime power management support. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-03-18usb: chipidea: imx: simplify the usbmisc callersPeter Chen2-16/+18
Move struct imx_usbmisc_data NULL pointer judgement from caller to each API, it can simplify the caller. Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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