aboutsummaryrefslogtreecommitdiff
path: root/drivers/usb/cdns3/cdnsp-pci.c
AgeCommit message (Collapse)AuthorFilesLines
2023-03-16usb: cdnsp: changes PCI Device ID to fix conflict with CNDS3 driverPawel Laszczak1-16/+11
Patch changes CDNS_DEVICE_ID in USBSSP PCI Glue driver to remove the conflict with Cadence USBSS driver. cc: <stable@vger.kernel.org> Fixes: 3d82904559f4 ("usb: cdnsp: cdns3 Add main part of Cadence USBSSP DRD Driver") Signed-off-by: Pawel Laszczak <pawell@cadence.com> Link: https://lore.kernel.org/r/20230309063048.299378-1-pawell@cadence.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-10-22usb: cdns3: adjust the partial logic of cdnsp_pci_removeDongliang Mu1-5/+3
In cdnsp_pci_remove, if pci_is_enabled returns true, it will call cdns_remove; else it will call kfree. Then both control flow goes to pci_dev_put. Adjust this logic by modifying it to an if else. Signed-off-by: Dongliang Mu <dzm91@hust.edu.cn> Acked-by: Pawel Laszczak <pawell@cadence.com> Link: https://lore.kernel.org/r/20221009072305.1593707-1-dzm91@hust.edu.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-12-29usb: cdnsp: cdns3 Add main part of Cadence USBSSP DRD DriverPawel Laszczak1-0/+254
This patch introduces the main part of Cadence USBSSP DRD driver to Linux kernel. To reduce the patch size a little bit, the header file gadget.h was intentionally added as separate patch. The Cadence USBSSP DRD Controller is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI)configurations. The current driver has been validated with FPGA platform. We have support for PCIe bus, which is used on FPGA prototyping. The host side of USBSS DRD controller is compliant with XHCI. The architecture for device side is almost the same as for host side, and most of the XHCI specification can be used to understand how this controller operates. Signed-off-by: Pawel Laszczak <pawell@cadence.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>