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path: root/drivers/spi/spi-stm32.c
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2020-10-09Merge remote-tracking branch 'spi/for-5.10' into spi-nextMark Brown1-8/+5
2020-10-01spi: spi-stm32: remove redundant irqsave and irqrestore in hardIRQBarry Song1-5/+4
Running in hardIRQ, disabling IRQ is redundant. Signed-off-by: Barry Song <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-09spi: stm32: fix pm_runtime_get_sync() error checkingDan Carpenter1-1/+1
The pm_runtime_get_sync() can return either 0 or 1 on success but this code treats 1 as a failure. Fixes: db96bf976a4f ("spi: stm32: fixes suspend/resume management") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/20200909094304.GA420136@mwanda Signed-off-by: Mark Brown <[email protected]>
2020-09-08spi: stm32: Simplify with dev_err_probe()Krzysztof Kozlowski1-3/+1
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-07spi: stm32: Rate-limit the 'Communication suspended' messageMarek Vasut1-1/+5
The 'spi_stm32 44004000.spi: Communication suspended' message means that when using PIO, the kernel did not read the FIFO fast enough and so the SPI controller paused the transfer. Currently, this is printed on every single such event, so if the kernel is busy and the controller is pausing the transfers often, the kernel will be all the more busy scrolling this message into the log buffer every few milliseconds. That is not helpful. Instead, rate-limit the message and print it every once in a while. It is not possible to use the default dev_warn_ratelimited(), because that is still too verbose, as it prints 10 lines (DEFAULT_RATELIMIT_BURST) every 5 seconds (DEFAULT_RATELIMIT_INTERVAL). The policy here is to print 1 line every 50 seconds (DEFAULT_RATELIMIT_INTERVAL * 10), because 1 line is more than enough and the cycles saved on printing are better left to the CPU to handle the SPI. However, dev_warn_once() is also not useful, as the user should be aware that this condition is possibly recurring or ongoing. Thus the custom rate-limit policy. Finally, turn the message from dev_warn() to dev_dbg(), since the system does not suffer any sort of malfunction if this message appears, it is just slowing down. This further reduces the printing into the log buffer and frees the CPU to do useful work. Fixes: dcbe0d84dfa5 ("spi: add driver for STM32 SPI controller") Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Amelie Delaunay <[email protected]> Cc: Antonio Borneo <[email protected]> Cc: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-08-10spi: stm32: always perform registers configuration prior to transferAlain Volmat1-25/+17
SPI registers content may have been lost upon suspend/resume sequence. So, always compute and apply the necessary configuration in stm32_spi_transfer_one_setup routine. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-08-10spi: stm32: fixes suspend/resume managementAmelie Delaunay1-3/+24
This patch adds pinctrl power management, and reconfigure spi controller in case of resume. Fixes: 038ac869c9d2 ("spi: stm32: add runtime PM support") Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-08-10spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rateAmelie Delaunay1-1/+2
Fix spi->clk_rate when it is odd to the nearest lowest even value because minimum SPI divider is 2. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-08-10spi: stm32: fix fifo threshold level in case of short transferAmelie Delaunay1-8/+18
When transfer is shorter than half of the fifo, set the data packet size up to transfer size instead of up to half of the fifo. Check also that threshold is set at least to 1 data frame. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-08-10spi: stm32h7: fix race condition at end of transferAntonio Borneo1-1/+1
The caller of stm32_spi_transfer_one(), spi_transfer_one_message(), is waiting for us to call spi_finalize_current_transfer() and will eventually schedule a new transfer, if available. We should guarantee that the spi controller is really available before calling spi_finalize_current_transfer(). Move the call to spi_finalize_current_transfer() _after_ the call to stm32_spi_disable(). Signed-off-by: Antonio Borneo <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-08-05spi: stm32: clear only asserted irq flags on interruptTobias Schramm1-1/+1
Previously the stm32h7 interrupt thread cleared all non-masked interrupts. If an interrupt was to occur during the handling of another interrupt its flag would be unset, resulting in a lost interrupt. This patches fixes the issue by clearing only the currently set interrupt flags. Signed-off-by: Tobias Schramm <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-05-25spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4dillon min1-4/+15
in l3gd20 driver startup, there is a setup failed error return from stm32 spi driver " [ 2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy regulator [ 2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy regulator [ 2.706707] spi_stm32 40015000.spi: SPI transfer setup failed [ 2.713741] st-gyro-spi spi0.0: SPI transfer failed: -22 [ 2.721096] spi_master spi0: failed to transfer one message from queue [ 2.729268] iio iio:device0: failed to read Who-Am-I register. [ 2.737504] st-gyro-spi: probe of spi0.0 failed with error -22 " after debug into spi-stm32 driver, st-gyro-spi split two steps to read l3gd20 id first: send command to l3gd20 with read id command in tx_buf, rx_buf is null. second: read id with tx_buf is null, rx_buf not null. so, for second step, stm32 driver recongise this process as 'SPI_SIMPLE_RX' from stm32_spi_communication_type(), but there is no related process for this type in stm32f4_spi_set_mode(), then we get error from stm32_spi_transfer_one_setup(). we can use two method to fix this bug. 1, use stm32 spi's "In unidirectional receive-only mode (BIDIMODE=0 and RXONLY=1)". but as our code running in sdram, the read latency is too large to get so many receive overrun error in interrupts handler. 2, use stm32 spi's "In full-duplex (BIDIMODE=0 and RXONLY=0)", as tx_buf is null, so add flag 'SPI_MASTER_MUST_TX' to spi master. Change since V4: 1 remove dummy data sent out by stm32 spi driver 2 add flag 'SPI_MASTER_MUST_TX' to spi master Signed-off-by: dillon min <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-03-20spi: stm32: Fix comments compilation warningsAlain Volmat1-17/+45
Fix all functions and structure descriptions to have the driver warning free when built with W=1. Signed-off-by: Alain Volmat <[email protected]> Reviewed-by: Amelie Delaunay <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2019-12-16spi: stm32: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi1-10/+22
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. By using dma_request_chan() directly the driver can support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2019-12-09spi: stm32: Switch to use GPIO descriptors for CSLinus Walleij1-44/+3
This switches the STM32 SPI driver over to using GPIO descriptors for chip select. Instead of the callbacks for picking the GPIO lines using the legacy API we just let the core handle it all using descriptors. Cc: Fabien Dessenne <[email protected]> Cc: Amelie Delaunay <[email protected]> Cc: Cezary Gapinski <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2019-05-02spi: stm32: return the get_irq errorFabien Dessenne1-2/+3
During probe, return the "get_irq" error value instead of -ENOENT. This allows the driver to be defer probed if needed. Signed-off-by: Fabien Dessenne <[email protected]> Acked-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: add support for STM32F4Cezary Gapinski1-7/+482
Add routines, registers & bitfield definition. Also baud rate divisor definitions for STM32F4 SPI. This version supports full-duplex, simplex TX and half-duplex TX communication with 8 or 16-bit per word. DMA capability is optionally supported for transfer longer than 16 bytes. For transfer less than 16 bytes frames can be send in discontinuous mode. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: introduce compatible data cfgCezary Gapinski1-101/+236
Prepare support for STM32F4 spi variant by introducing compatible configuration data. Move STM32H7 specific stuff to compatible data structure: - registers & bit fields - routines to control driver - baud rate divisor definitions - fifo availability - split IRQ functions to parts to be called when the IRQ occurs and for threaded interrupt what helps to provide less discontinuous mode for drivers without FIFO. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: add start dma transfer functionCezary Gapinski1-9/+18
Add transfer_one_dma_start function to be more generic for other stm32 SPI family drivers. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: split transfer one setup functionCezary Gapinski1-78/+192
Split stm32_spi_transfer_one_setup function into smaller chunks to be more generic for other stm32 SPI family drivers. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: rename interrupt functionCezary Gapinski1-3/+3
Interrupt function is used as a thread so rename it to express meaning directly by more clear function name. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: rename STM32 SPI registers to STM32H7Cezary Gapinski1-182/+199
Rename STM32 SPI registers to be related to STM32H7 SPI driver and not STM32 generally. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: remove SPI LOOP modeCezary Gapinski1-1/+1
This driver does not support SPI LOOP mode by configuration in registers. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: use explicit CPOL and CPHA mode bitsCezary Gapinski1-1/+1
Driver supports SPI mode 0 to 3 not only the mode 3. Use SPI_CPOL and SPI_CPHA indicates that these bits can be changed to obtain modes 0 - 3. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: fix DMA configuration with only one channelCezary Gapinski1-8/+12
When SPI driver is configured to work only with TX or RX DMA channel then dmaengine functions can dereferene NULL pointer. Running full-duplex mode when when only RX or TX DMA channel is available can cause overrun condition or incorrect writing to transmit buffer so disable this types of DMA configuration and go back to interrupt mode. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: use NULL pointer instead of plain integerCezary Gapinski1-1/+1
Patch fixes sparse warning: Using plain integer as NULL pointer. Replaces second argument of function devm_clk_get from 0 to NULL. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2019-01-07spi: stm32: switch to SPDX identifierCezary Gapinski1-20/+7
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Cezary Gapinski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-04-17spi: stm32: Fix error handling in stm32_spi_probe()Alexey Khoroshilov1-1/+1
clk_get_rate() is below clk_prepare_enable(), so its error should lead to goto err_clk_disable, not to err_master_put. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <[email protected]> Reviewed-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-09-13spi: stm32: Fix logical error in stm32_spi_prepare_mbr()Christos Gkekas1-2/+2
stm32_spi_prepare_mbr() is returning an error value when div is less than SPI_MBR_DIV_MIN *and* greater than SPI_MBR_DIV_MAX, which always evaluates to false. This should change to use *or*. Signed-off-by: Christos Gkekas <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-07-19spi: stm32: explicitly request exclusive reset controlPhilipp Zabel1-1/+1
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Mark Brown <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: [email protected] Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-28spi: stm32: fix potential dereference null return valueAmelie Delaunay1-8/+8
This patch fixes the usage of rx_dma_desc and tx_dma_desc pointers returned by dmaengine_prep_slave_sg, which can be null. Detected by CoverityScan, CID#1446587 ("Dereference null return value") Reported-by: Colin Ian King <[email protected]> Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-28spi: stm32: enhance DMA error managementAmelie Delaunay1-6/+17
This patch reworks DMA error management. In case the DMA callback is called while EOT (End Of Transfer) flag is not set, that means that DMA encountered an error. This error will result in an auto-suspend of SPI flow, which could also result in an overrun. So, in DMA mode, SUSP and OVR flags are a condition to stop the current transfer. Moreover, stm32_spi_can_dma doesn't care about the state of dma channels. During driver probe, master->can_dma is initialised if dma channel request is successful. That's why we must use master->can_dma to know if dma use is possible (dma channel are successfully requested and the transfer size is greater than fifo size). Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-28spi: stm32: add runtime PM supportAmelie Delaunay1-7/+36
This patch reworks suspend and resume callbacks and add runtime_suspend and runtime_resume callbacks. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-28spi: stm32: use normal conditional statements instead of ternary operatorAmelie Delaunay1-14/+30
This patch replace ternary operator use by normal condition statements to ease code reading. It also removes redundant !!. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-28spi: stm32: replace st, spi-midi with st, spi-midi-ns to fit bindingsAmelie Delaunay1-1/+1
This patch fixes the optional dt property used to set master inter-data idleness. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-28spi: stm32: fix compatible to fit with new bindingsAmelie Delaunay1-1/+1
This patch updates of_device_id compatible string to fit with new bindings. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-23spi: stm32: fix error check on mbr being -veColin Ian King1-2/+2
The error check of mbr < 0 is always false because mbr is a u32. Make mbt an int so that a -ve error return from stm32_spi_prepare_mbr can be detected. Detected by CoverityScan, CID#1446586 ("Unsigned compared against 0") Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-06-21spi: add driver for STM32 SPI controllerAmelie Delaunay1-0/+1266
The STM32 Serial Peripheral Interface (SPI) can be used to communicate with external devices while using the specific synchronous protocol. It supports a half-duplex, full-duplex and simplex synchronous, serial communication with external devices with 4-bit to 16/32-bit per word. It has two 8x/16x 8-bit embedded Rx and TxFIFOs with DMA capability. It can operate in master or slave mode. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Mark Brown <[email protected]>
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