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path: root/drivers/spi/spi-dw-mid.c
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2018-02-12spi: dw: Convert to generalized SPI controller APIJarkko Nikula1-3/+3
Convert to generalized SPI controller API introduced by the commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller""). Inside driver variable name "master" is still used to indicate the driver is master only. Signed-off-by: Jarkko Nikula <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2017-01-04spi: dw-mid: switch to new dmaengine_terminate_* API (part 2)Andy Shevchenko1-2/+2
The commit a3ff9582369e ("spi: dw-mid: switch to new dmaengine_terminate_* API") converted mid_spi_dma_exit() but missed mid_spi_dma_stop(). This is follow up to convert the rest. Fixes: a3ff9582369e ("spi: dw-mid: switch to new dmaengine_terminate_* API") Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2016-02-05spi: dw-mid: switch to new dmaengine_terminate_* APIAndy Shevchenko1-2/+2
Convert dmaengine_terminate_all() calls to synchronous versions. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-11-30spi: dw-mid: constify dw_spi_dma_ops structureJulia Lawall1-1/+1
The dw_spi_dma_ops structure is never modified, so declare it as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Acked-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-17spi: dw-spi: Convert 16bit accesses to 32bit accessesThor Thayer1-5/+5
Altera's Arria10 SoC interconnect requires a 32-bit write for APB peripherals. The current spi-dw driver uses 16-bit accesses in some locations. This patch converts all the 16-bit reads and writes to 32-bit reads and writes. Additional Documentation to Support this Change: The DW_apb_ssi databook states: "All registers in the DW_apb_ssi are addressed at 32-bit boundaries to remain consistent with the AHB bus. Where the physical size of any register is less than 32-bits wide, the upper unused bits of the 32-bit boundary are reserved. Writing to these bits has no effect; reading from these bits returns 0." [1] [1] Section 6.1 of dw_apb_ssi.pdf (version 3.22a) Request for test with platforms using the DesignWare SPI IP. Tested On: Altera CycloneV development kit Altera Arria10 development kit Compile tested for build errors on x86_64 (allyesconfigs) Signed-off-by: Thor Thayer <[email protected]> Reviewed-and-tested-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-09spi: dw-mid: convert to use dw_dmac instead of intel_mid_dmaAndy Shevchenko1-26/+19
intel_mid_dma seems to be unmaintained for a long time. Moreover, the IP block of DMA itself is the same in both dw_dmac and intel_mid_dma. This patch moves spi-dw-midpci to use dw_dmac driver. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-09spi: dw-mid: move to use core SPI DMA mappingsAndy Shevchenko1-22/+30
SPI core has a comprehensive function set to map and unmap a message when it's needed. This patch converts driver to use that advantage. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-09spi: dw-mid: clear ongoing DMA transfers on timeoutAndy Shevchenko1-0/+13
This patch shuts up any ongoing DMA transfer in case of error. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-09spi: dw-mid: take care of FIFO overrun/underrun when do DMAAndy Shevchenko1-0/+21
In according to documentation SPI in DMA mode may encounter underrun/overrun failures in rare cases. When such failure occurs, an error recovery protocol is expected to be implemented in the device driver so that the failed transaction can be restarted. This patch enables FIFO overrun / underrun interrupts in DMA case and adds a handler for that. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-09spi: dw-mid: split dma_setup() from dma_transfer()Andy Shevchenko1-11/+6
The patch splits DMA preparatory code to dma_setup() callback. The change also converts transfer_one() to program DMA whenever the transfer is DMA mapped. The change is a follow up of the converion to use SPI core transfer_one_message(). Since the DMA mapped transfers can be interleaved with PIO ones the DMA related configuration should respect that. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-09spi: dw-mid: convert value of dma_width to enum dma_slave_buswidthAndy Shevchenko1-2/+11
DMAEngine has a specific type to be used for bus width. This patch converts the code to use the values of the specific type when configure DMA transfer. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-09Merge branch 'fix/dw' of ↵Mark Brown1-2/+10
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-dw
2015-03-07spi: dw-mid: clear BUSY flag fist and test other oneAndy Shevchenko1-2/+4
The logic of DMA completion is broken now since test_and_clear_bit() never returns the other bit is set. It means condition are always false and we have spi_finalize_current_transfer() called per each DMA completion which is wrong. The patch fixes logic by clearing BUSY bit first and then check for the other one. Fixes: 30c8eb52cc4a (spi: dw-mid: split rx and tx callbacks when DMA) Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
2015-03-06spi: dw: move to SPI core message handlingAndy Shevchenko1-2/+2
This patch removes a lot of duplicate code since SPI core provides a nice message handling. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-03-06spi: dw-mid: avoid potential NULL dereferenceAndy Shevchenko1-0/+6
When DMA descriptor allocation fails we should not try to assign any fields in the bad descriptor. The patch adds the necessary checks for that. Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support) Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
2015-01-27spi: dw-mid: get a proper clock frequency for SPI2Andy Shevchenko1-5/+8
The clock information is being kept in the custom register on Intel MID platforms. Each controller has its own dedicated custom register for that. Thus, to get a proper frequency we have to read value from the specific offset to the register block. This patch makes this happen. Fixes: d58cf5ff6500 (spi: dw-pci: describe Intel MID controllers better) Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-01-07spi: dw-pci: describe Intel MID controllers betterAndy Shevchenko1-2/+0
There are more that one SPI controller on the Intel MID boards. This patch describes the status and IDs of them. From now on we also have to care about bus number that must be unique per host. According to the specification the SPI1 has 5 bits for chip selects and SPI2 only 2 bits. The patch makes it depend to PCI ID. The first controller (SPI1) is DMA capable, meanwhile SPI2 can share same channels (via software switch) such functionality is not in the scope of this patch. Thus, attempt to init DMA for SPI2 will always fail for now. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2015-01-05spi: dw-mid: fix FIFO sizeAndy Shevchenko1-1/+0
The FIFO size is 40 accordingly to the specifications, but this means 0x40, i.e. 64 bytes. This patch fixes the typo and enables FIFO size autodetection for Intel MID devices. Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support) Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
2014-10-28spi: dw-mid: split rx and tx callbacks when DMAAndy Shevchenko1-14/+39
Currently driver wouldn't work properly if user asked for simplex transfer. The patch separates DMA rx and tx callbacks and finishes transfer correctly in any case. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-10-28spi: dw-mid: refactor to use helpersAndy Shevchenko1-21/+48
This patch splits few helpers, namely dw_spi_dma_prepare_rx(), dw_spi_dma_prepare_tx(), and dw_spi_dma_setup() which will be useful for the consequent improvements. There is no functional change. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-10-02spi: dw-mid: follow new DMAengine workflowAndy Shevchenko1-2/+6
Though intel-mid-dma does not follow a new DMA workflow (*) let's prepare SPI DW driver for that. (*) The client is obliged to call dma_async_issue_pending() which starts the actual transfers. Old DMA drivers do not follow this, since requirement was introduced in the discussion of [1]. [1] http://www.spinics.net/lists/arm-kernel/msg125987.html Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-10-02spi: dw-mid: convert to use DMAengine wrappersAndy Shevchenko1-12/+7
Instead of direct dereference to dmaengine callbacks we are going to use DMAengine wrappers. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-10-02spi: dw-mid: change magic numbers to the constantsAndy Shevchenko1-2/+2
Instead of using magic numbers in the code we create a bit map definition of the DMACR register and use it. There is no functional change. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-09-24spi: dw-mid: terminate ongoing transfers at exitAndy Shevchenko1-0/+4
Do full clean up at exit, means terminate all ongoing DMA transfers. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
2014-09-24spi: dw-mid: respect 8 bit modeAndy Shevchenko1-2/+2
In case of 8 bit mode and DMA usage we end up with every second byte written as 0. We have to respect bits_per_word settings what this patch actually does. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
2014-09-13spi: dw-mid: remove FSF address and update copyrightAndy Shevchenko1-5/+1
The FSF address is subject to change, thus remove it from the file. While here, update a copyright line. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-09-13spi: dw-mid: remove redundant dmac memberAndy Shevchenko1-4/+8
Instead of using that member we prefer to use dma_dev which represents actual struct device of the DMA device. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-09-13spi: dw-mid: remove Moorestown supportAndy Shevchenko1-5/+3
The support of the Moorestown was removed [1] from kernel long time ago. This is just a follow up of that change. [1] http://www.spinics.net/lists/platform-driver-x86/msg02948.html Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2014-09-13spi: dw-mid: check that DMA was inited before exitAndy Shevchenko1-0/+2
If the driver was compiled with DMA support, but DMA channels weren't acquired by some reason, mid_spi_dma_exit() will crash the kernel. Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support) Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2013-11-14dmaengine: remove DMA unmap flagsBartlomiej Zolnierkiewicz1-2/+2
Remove no longer needed DMA unmap flags: - DMA_COMPL_SKIP_SRC_UNMAP - DMA_COMPL_SKIP_DEST_UNMAP - DMA_COMPL_SRC_UNMAP_SINGLE - DMA_COMPL_DEST_UNMAP_SINGLE Cc: Vinod Koul <[email protected]> Cc: Tomasz Figa <[email protected]> Cc: Dave Jiang <[email protected]> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Acked-by: Jon Mason <[email protected]> Acked-by: Mark Brown <[email protected]> [djbw: clean up straggling skip unmap flags in ntb] Signed-off-by: Dan Williams <[email protected]>
2012-03-21dmaengine/dma_slave: introduce inline wrappersAlexandre Bounine1-2/+2
Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to hide new parameter from current users of affected interfaces. Convert current users to use new wrappers instead of direct calls. Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269]. Signed-off-by: Alexandre Bounine <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2012-02-22dmaengine: Pass dma_slave_config .device_fc = NULL for all existing usersViresh Kumar1-0/+3
.device_fc is added in struct dma_slave_config recently. All user drivers, which want DMA to be the flow controller must pass this field as false. As earlier driver don't look to use this feature, mark it false for now. Signed-off-by: Viresh Kumar <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2011-11-17Merge branch 'dma_slave_direction' into next_test_dirnVinod Koul1-4/+4
resolved conflicts: drivers/media/video/mx3_camera.c
2011-10-31spi, serial: move to dma_transfer_directionVinod Koul1-4/+4
fixup usage of dma direction by introducing dma_transfer_direction, this patch moves spi, serial drivers to use new enum Signed-off-by: Vinod Koul <[email protected]> Cc: Grant Likely <[email protected]> Cc: Alan Cox <[email protected]> Acked-by: Mika Westerberg <[email protected]>
2011-09-21spi: spi-dw: fix all sparse warningsH Hartley Sweeten1-4/+5
The dw_{read,write}[lw] macros produce sparse warnings everytime they are used. The "read" ones cause: warning: cast removes address space of expression warning: incorrect type in argument 1 (different address spaces) expected void const volatile [noderef] <asn:2>*addr got unsigned int *<noident> And the "write" ones: warning: cast removes address space of expression warning: incorrect type in argument 2 (different address spaces) expected void volatile [noderef] <asn:2>*addr got unsigned int *<noident> Fix this by removing struct dw_spi_reg and converting all the register offsets to #defines. Then convert the macros into inlined functions so that proper type checking can occur. While here, also fix the three sparse warnings in spi-dw-mid.c due to the return value of ioremap_nocache being stored in a u32 * not a void __iomem *. With these changes the spi-dw* files all build with no sparse warnings. Signed-off-by: H Hartley Sweeten <[email protected]> Acked-by: Feng Tang <[email protected]> Signed-off-by: Grant Likely <[email protected]>
2011-06-06spi: reorganize driversGrant Likely1-0/+224
Sort the SPI makefile and enforce the naming convention spi_*.c for spi drivers. This change also rolls the contents of atmel_spi.h into the .c file since there is only one user of that particular include file. v2: - Use 'spi-' prefix instead of 'spi_' to match what seems to be be the predominant pattern for subsystem prefixes. - Clean up filenames in Kconfig and header comment blocks Signed-off-by: Grant Likely <[email protected]> Acked-by: Wolfram Sang <[email protected]> Acked-by: Linus Walleij <[email protected]>
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