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The canvas IP on Meson8, Meson8b and Meson8m2 is mostly identical to the
one on GXBB and newer. The only known difference so far is that that the
"endianness" bits are not supported on Meson8m2 and earlier.
Add new compatible strings and a check in meson_canvas_config() to
validate that the endianness bits cannot be configured on the 32-bit
SoCs.
Signed-off-by: Martin Blumenstingl <[email protected]>
Reviewed-by: Maxime Jourdan <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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When probe fails, a platforn_device is still associated to the node,
but dev_get_drvdata() returns NULL.
Handle this case by returning a consistent error.
Fixes: d4983983d987 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Maxime Jourdan <[email protected]>
[khilman: fixed minor typo in comment ]
Signed-off-by: Kevin Hilman <[email protected]>
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The call to of_parse_phandle returns a node pointer with refcount
incremented thus it must be explicitly decremented here after the last
usage.
Signed-off-by: Wen Yang <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Fixes: d4983983d987 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Kevin Hilman <[email protected]>
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Amlogic SoCs have a repository of 256 canvas which they use to
describe pixel buffers.
They contain metadata like width, height, block mode, endianness [..]
Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write
pixels.
Reviewed-by: Jerome Brunet <[email protected]>
Tested-by: Neil Armstrong <[email protected]>
Signed-off-by: Maxime Jourdan <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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