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2015-07-29sh/irq: Use access helper irq_data_get_affinity_mask()Thomas Gleixner1-3/+3
This is a preparatory patch for moving irq_data struct members. Signed-off-by: Jiang Liu <[email protected]> Cc: Simon Horman <[email protected]> Cc: Magnus Damm <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
2012-10-15sh: Fix up more fallout from pointless ARM __iomem churn.Paul Mundt1-2/+2
It was already pointed out how to fix these cases before the offending patches were merged, but unsurprisingly, that didn't happen. As this change is entirely superfluous to begin with, simply shut things up by casting everything away. Signed-off-by: Paul Mundt <[email protected]>
2012-01-24sh: intc: optimize intc IRQ lookupPaul Mundt1-21/+6
This ensures that the sense/prio lists are sorted at registration time, enabling us to use a simple binary search for an optimized lookup (something that had been on the TODO for some time). Signed-off-by: Paul Mundt <[email protected]>
2012-01-24sh: intc: Use IRQ_SET_MASK_OK_NOCOPY for intc_set_affinity.Paul Mundt1-1/+1
intc_set_affinity() updates the cpumask in place, so there's no need for the upper layer to do this itself. Signed-off-by: Paul Mundt <[email protected]>
2012-01-24sh: intc: Kill off superfluous irq_shutdown hooking.Paul Mundt1-1/+0
This already gets handled via disable, as per the notes in linux/irq.h. Signed-off-by: Paul Mundt <[email protected]>
2012-01-24sh: intc: Prefer IRQCHIP_SKIP_SET_WAKE over a dummy set_wake callback.Paul Mundt1-6/+1
It's possible to use IRQCHIP_SKIP_SET_WAKE to get the behaviour that we're after, without having to bother with a dummy ->set_wake() callback for the IRQ chip. Signed-off-by: Paul Mundt <[email protected]>
2011-11-05sh: intc: Allow triggering on both edges for ARM SoCsMagnus Damm1-1/+1
Enable IRQ_TYPE_EDGE_BOTH on all R/SH-Mobile ARM SoCs. This hardware feature is supported by sh7367, sh7377, sh7372 and sh73a0. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2011-10-28sh: intc: Add IRQ trigger bit field checkMagnus Damm1-2/+7
R-Mobile SoCs such as sh73a0 include PINT blocks in INTC that come with 2-bit IRQ trigger support. Add code to make sure the bit width is checked so 4-bit only modes like for instance EDGE_BOTH will fail for PINT. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2011-07-21sh: intc: enable both edges GPIO interrupts on sh7372Magnus Damm1-0/+3
IRQ-capable GPIOs on sh7372 can be configured to produce interrupts on both edges. Signed-off-by: Guennadi Liakhovetski <[email protected]> Acked-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2011-01-19sh: update INTC to clear IRQ sense valid flagMagnus Damm1-2/+4
Clear the valid flag is in the INTC code. Without this fix bit 7 of the sense register is mistakenly set. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2010-10-27sh: intc: irq_data conversion.Paul Mundt1-23/+30
Signed-off-by: Paul Mundt <[email protected]>
2010-10-05sh: intc: Split up the INTC code.Paul Mundt1-0/+215
This splits up the sh intc core in to something more vaguely resembling a subsystem. Most of the functionality was alread fairly well compartmentalized, and there were only a handful of interdependencies that needed to be resolved in the process. This also serves as future-proofing for the genirq and sparseirq rework, which will make some of the split out functionality wholly generic, allowing things to be killed off in place with minimal migration pain. Signed-off-by: Paul Mundt <[email protected]>
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