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2017-01-30pwm: Print error messages with pr_err() instead of pr_debug()Lothar Wassmann1-2/+2
Make the messages that are printed in case of fatal errors actually visible to the user without having to recompile the driver with debugging enabled. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Bhuvanchandra DV <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Add polarity inversion support to i.MX's PWMv2Lukasz Majewski1-5/+19
With this patch the polarity settings for i.MX's PWMv2 is now supported on top of atomic PWM setting Signed-off-by: Bhuvanchandra DV <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Remove redundant i.MX PWMv2 codeLukasz Majewski1-127/+0
The code providing functionality surpassed by the atomic PWM is not needed anymore and hence can be removed. Suggested-by: Stefan Agner <[email protected]> Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Provide atomic PWM support for i.MX PWMv2Lukasz Majewski1-0/+67
This commit provides apply() callback implementation for i.MX's PWMv2. Suggested-by: Stefan Agner <[email protected]> Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Move PWMv2 wait for fifo slot code to a separate functionLukasz Majewski1-18/+25
The code, which waits for fifo slot, has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_wait_fifo_slot(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner <[email protected]> Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Move PWMv2 software reset code to a separate functionLukasz Majewski1-10/+21
The software reset code has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_sw_reset(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner <[email protected]> Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Rewrite v1 code to facilitate switch to atomic PWMLukasz Majewski1-10/+22
The code has been rewritten to remove "generic" calls to imx_pwm_{enable|disable|config}. Such approach would facilitate switch to atomic PWM (a.k.a ->apply()) implementation. Suggested-by: Stefan Agner <[email protected]> Suggested-by: Boris Brezillon <[email protected]> Reviewed-by: Stefan Agner <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Add separate set of PWM ops for v1 and v2Lukasz Majewski1-3/+14
This patch provides separate set of PWM operations utilized by i.MX's v1 and v2 of the PWM hardware. Signed-off-by: Lothar Waßmann <[email protected]> Signed-off-by: Bhuvanchandra DV <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Acked-by: Shawn Guo <[email protected]> Reviewed-by: Sascha Hauer <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: imx: Remove ipg clock and enable per clock when requiredSascha Hauer1-10/+2
The use of the ipg clock was introduced with commit 7b27c160c681 ("pwm: i.MX: fix clock lookup"). In the commit message it was claimed that the ipg clock is enabled for register accesses. This is true for the ->config() callback, but not for the ->set_enable() callback. Given that the ipg clock is not consistently enabled for all register accesses we can assume that either it is not required at all or that the current code does not work. Remove the ipg clock code for now so that it's no longer in the way of refactoring the driver. On the other hand, the i.MX 7 IP requires the peripheral clock to be enabled before accessing its registers. Since ->config() can be called when the PWM is disabled (in which case, the peripheral clock is also disabled), we need to surround the imx->config() with clk_prepare_enable(per_clk)/clk_disable_unprepare(per_clk) calls. Note that the driver was working fine for the i.MX 7 IP so far because the ipg and peripheral clock use the same hardware clock gate, which guaranteed peripheral clock activation even when ->config() was called when the PWM was disabled. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Cc: Philipp Zabel <[email protected]> Reviewed-by: Stefan Agner <[email protected]> Tested-by: Stefan Agner <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: lpss: Add Intel Gemini Lake PCI IDMika Westerberg1-0/+1
Intel Gemini Lake PWM is pretty much same as used in Intel Broxton. Add this new PCI ID to the list of supported devices. Signed-off-by: Mika Westerberg <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: lpss: Do not export board infos for different PWM typesAndy Shevchenko4-28/+42
The PWM LPSS probe drivers just pass a pointer to the exported board info structures to pwm_lpss_probe() based on device PCI or ACPI ID. In order to remove the knowledge of specific devices from library part of the driver and reduce noise in exported namespace just duplicate the board info structures and stop exporting them. Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: lpss: Avoid reconfiguring while UPDATE bit is still enabledIlkka Koskinen1-9/+43
PWM Configuration register has SW_UPDATE bit that is set when a new configuration is written to the register. The bit is automatically cleared at the start of the next output cycle by the IP block. If one writes a new configuration to the register while it still has the bit enabled, PWM may freeze. That is, while one can still write to the register, it won't have an effect. Thus, we try to sleep long enough that the bit gets cleared and make sure the bit is not enabled while we update the configuration. Reviewed-by: Mika Westerberg <[email protected]> Tested-by: Richard Griffiths <[email protected]> Signed-off-by: Ilkka Koskinen <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: lpss: Switch to new atomic APIAndy Shevchenko1-35/+29
Instead of doing things separately, which is not so reliable on some platforms, switch the driver to use new atomic API, i.e. ->apply() callback. The change has been tested on Intel platforms such as Broxton, BayTrail, and Merrifield. Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: lpss: Allow duty cycle to be 0Andy Shevchenko1-2/+0
A duty cycle is represented by values [0..<period>] which reflects [0%..100%]. 0% of the duty cycle means always off (logical "0") on output. Allow this in the driver. Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-30pwm: lpss: Avoid potential overflow of base_unitAndy Shevchenko1-3/+3
The resolution of base_unit is derived from base_unit_bits and thus must be equal to (2^base_unit_bits - 1). Otherwise frequency and therefore base_unit might potentially overflow. Prevent the above by substracting 1 in all cases where base_unit_bits or derivative is used. Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-25pwm: Add driver for STM32 plaftormBenjamin Gaignard3-0/+407
This driver adds support for PWM driver on STM32 platform. The SoC have multiple instances of the hardware IP and each of them could have small differences: number of channels, complementary output, auto reload register size... version 9: - fix commit message header - remove one space MODULE_ALIAS version 8: - fix comments done by Thierry on version 7 version 6: - change st,breakinput parameter to make it usuable for stm32f7 too. version 4: - detect at probe time hardware capabilities - fix comments done on v2 and v3 - use PWM atomic ops version 2: - only keep one comptatible - use DT parameters to discover hardware block configuration Signed-off-by: Benjamin Gaignard <[email protected]> Acked-by: Thierry Reding <[email protected]> Signed-off-by: Lee Jones <[email protected]>
2017-01-20pwm: pca9685: Fix period change with same duty cycleClemens Gruber1-11/+0
When first implementing support for changing the output frequency, an optimization was added to continue the PWM after changing the prescaler without having to reprogram the ON and OFF registers for the duty cycle, in case the duty cycle stayed the same. This was flawed, because we compared the absolute value of the duty cycle in nanoseconds instead of the ratio to the period. Fix the problem by removing the shortcut. Fixes: 01ec8472009c9 ("pwm-pca9685: Support changing the output frequency") Cc: <[email protected]> # v4.3+ Signed-off-by: Clemens Gruber <[email protected]> Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-19pwm: constify pwm_ops structuresBhumika Goyal4-4/+4
Declare pwm_ops structures as const as they are only stored in the ops field of a pwm_chip structure. This field is of type const struct pwm_ops *, so pwm_ops structures having this property can be declared as const. Done using Coccinelle: @r1 disable optional_qualifier@ identifier i; position p; @@ static struct pwm_ops i@p={...}; @ok1@ identifier r1.i; position p; struct pxa_pwm_chip pwm; struct bfin_pwm_chip bwm; struct vt8500_chip vp; struct imx_chip icp; @@ ( pwm.chip.ops=&i@p | bwm.chip.ops=&i@p | vp.chip.ops=&i@p | icp.chip.ops=&i@p ) @bad@ position p!={r1.p,ok1.p}; identifier r1.i; @@ i@p @depends on !bad disable optional_qualifier@ identifier r1.i; @@ +const struct pwm_ops i; File size details: text data bss dec hex filename 1646 328 0 1974 7b6 drivers/pwm/pwm-imx.o 1742 224 0 1966 7ae drivers/pwm/pwm-imx.o 1941 296 0 2237 8bd drivers/pwm/pwm-pxa.o 2037 192 0 2229 8b5 drivers/pwm/pwm-pxa.o 1946 296 0 2242 8c2 drivers/pwm/pwm-vt8500.o 2050 192 0 2242 8c2 drivers/pwm/pwm-vt8500.o The drivers/pwm/pwm-bfin.o file did not compile. Signed-off-by: Bhumika Goyal <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-19pwm: bcm-iproc: Update dependencies for compile-testScott Branden1-1/+3
Add dependency on COMMON_CLK and allow COMPILE_TEST for broader compile coverage. Default to Y for IPROC SoCs. This allows the driver to simply be enabled by selecting PWM. Signed-off-by: Scott Branden <[email protected]> Reviewed-by: Ray Jui <[email protected]> [[email protected]: reword commit message] Signed-off-by: Thierry Reding <[email protected]>
2017-01-19pwm: pca9685: Allow any of the 16 PWMs to be used as a GPIOMika Westerberg1-1/+163
The PCA9685 controller has full on/off bit for each PWM channel. Setting this bit bypasses the PWM control and the line works just as it would be a GPIO. Furthermore in Intel Galileo it is actually used as GPIO output for discreet muxes on the board. This patch adds GPIO output only support for the driver so that we can control the muxes on Galileo using standard GPIO interfaces available in the kernel. GPIO and PWM functionality is exclusive so only one can be active at a time on a single PWM channel. Signed-off-by: Mika Westerberg <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-01-04pwm: Remove .can_sleep from struct pwm_chipThierry Reding14-14/+1
All PWM devices have been marked as "might sleep" since v4.5, there is no longer a need to differentiate on a per-chip basis. Signed-off-by: Thierry Reding <[email protected]>
2017-01-04pwm: Remove pwm_can_sleep()Thierry Reding1-12/+0
The last user of this function has been removed, so it is no longer needed. Signed-off-by: Thierry Reding <[email protected]>
2016-12-15Merge tag 'pwm/for-4.10-rc1' of ↵Linus Torvalds4-1/+281
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This is a very tiny pull request, with just a new driver for HiSilicon BVT SoCs and a cleanup for the Amlogic Meson driver. There are other patches on the list, but my timing was really bad this time and I ended up not having the time to look at them in enough detail to be comfortable merging them" * tag 'pwm/for-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: Add PWM driver for HiSilicon BVT SOCs pwm: meson: Remove unneeded platform MODULE_ALIAS
2016-11-29pwm: Add PWM driver for HiSilicon BVT SOCsyuanjian3-0/+281
Add PWM driver for the PWM controller found on HiSilicon BVT SoCs such as Hi3519V100, Hi3516CV300, etc. The PWM controller is primarily in charge of controlling the P-Iris lens. Reviewed-by: Jiancheng Xue <[email protected]> Signed-off-by: Jian Yuan <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-11-29pwm: Fix device reference leakJohan Hovold1-0/+2
Make sure to drop the reference to the parent device taken by class_find_device() after "unexporting" any children when deregistering a PWM chip. Fixes: 0733424c9ba9 ("pwm: Unexport children before chip removal") Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-10-21pwm: meson: Remove unneeded platform MODULE_ALIASJavier Martinez Canillas1-1/+0
The Amlogic Meson is a DT-only platform, which means the devices are registered via OF and not using the legacy platform devices support. So there's no need to have a MODULE_ALIAS("platform:meson-pwm") since the reported uevent MODALIAS to user-space will always be the OF one. Signed-off-by: Javier Martinez Canillas <[email protected]> Acked-by: Kevin Hilman <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-10-21pwm: meson: Add missing spin_lock_init()Axel Lin1-0/+1
The driver uses the spin_lock but does not initialize it. Fix it. Signed-off-by: Axel Lin <[email protected]> Acked-by: Neil Armstrong <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08Merge branch 'for-4.9/drivers' into for-nextThierry Reding12-141/+1127
2016-09-08pwm: meson: Handle unknown ID valuesArnd Bergmann1-0/+9
When building with -Wmaybe-uninitialized, we get a couple of harmless warnings about three functions in this new driver that don't look safe to the compiler: drivers/pwm/pwm-meson.c: In function 'meson_pwm_get_state': drivers/pwm/pwm-meson.c:355:26: error: 'mask' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c: In function 'meson_pwm_disable': drivers/pwm/pwm-meson.c:263:13: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c: In function 'meson_pwm_apply': drivers/pwm/pwm-meson.c:231:13: error: 'clk_shift' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c:231:36: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/pwm/pwm-meson.c:231:24: error: 'clk_enable' may be used uninitialized in this function [-Werror=maybe-uninitialized] Specifically, if we have a device with an ID other than 0 or 1, this would result in undefined behavior. This is currently not possible, but the compiler cannot be expected to know this. This patch adds a 'default' clause to let the compiler know what to do instead, which shuts up the warning and makes the code slightly more resiliant in case it gets extended to other identifiers. Signed-off-by: Arnd Bergmann <[email protected]> Acked-by: Neil Armstrong <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Take the opportunity to conduct a little house keepingLee Jones1-72/+81
This includes fixing some Coding Style issues and re-ordering and/or simplifying a little code. Signed-off-by: Lee Jones <[email protected]> [[email protected]: applied some bikeshedding> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: It's now valid for number of PWM channels to be zeroLee Jones1-1/+14
Setting up the STI PWM IP as capture only, with zero PWM output devices is a perfectly valid configuration. It is no longer okay to assume that there must be at least 1 PWM output device. In this patch we make the default number of PWM output devices zero and only configure channels explicitly requested. Reported-by: Peter Griffin <[email protected]> Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Add PWM capture callbackLee Jones1-0/+88
Once a PWM capture has been initiated, the capture call enables a rising edge detection interrupt, then waits. Once each of the 3 phase changes have been recorded the thread then wakes. The remaining part of the call carries out the relevant calculations and returns a structure filled out with the capture data. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Add support for PWM capture interruptsLee Jones1-1/+91
Here we're requesting the PWM capture IRQ and supplying the handler that will be called in the event of an interrupt to handle it. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Initialise PWM capture device dataLee Jones1-7/+38
Each PWM capture device is allocated a structure to hold its own state. During a capture the device may be partaking in one of 3 phases. Initial (rising) phase change, a subsequent (falling) phase change indicating end of the duty-cycle phase and finally a final (rising) phase change indicating the end of the period. The timer value snapshot each event is held in a variable of the same name, and the phase number (0, 1, 2) is contained in the index variable. Other device specific information, such as GPIO pin, the IRQ wait queue and locking is also contained in the structure. This patch initialises this structure for each of the available devices. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Supply PWM Capture clock handlingLee Jones1-0/+25
ST's PWM IP is supplied by 2 different clocks. One for PWM output and the other for capture. This patch provides clock handling for the latter. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Supply PWM capture register addresses and bit locationsLee Jones1-0/+25
This is in preparation for subsequent patches that add support for PWM capture to this driver. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Only request clock rate when neededLee Jones1-8/+8
In the original code the clock rate was only obtained during initialisation; however, the rate may change between then and its use. This patch ensures the correct rate is acquired just before use. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Reorganise register names in preparation for new functionalityLee Jones1-35/+41
Exciting functionality is on the way to this device. But before we can add it, we need to do some basic housekeeping so the additions can be added cleanly. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sti: Rename channel => deviceLee Jones1-16/+16
This is to bring the terminology used in the STi PWM driver more into line with the PWM subsystem. Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: lpc-18xx: use pwm_set_chip_data[email protected]1-4/+8
The lpc-18xx driver currently manipulates the pwm_device struct directly rather than using the pwm_set_chip_data() function. While the current method may save a clock cycle or two, using the explicit function call makes it more obvious that data is set to the local chip data pointer. Signed-off-by: Olliver Schinagl <[email protected]> Reviewed-by: Ariel D'Alessandro <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: sunxi: Add H3 supportMilo Kim1-0/+9
H3 PWM controller has same register layout as sun4i driver, so it works by adding H3 specific data. Cc: Thierry Reding <[email protected]> Cc: Rob Herring <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Chen-Yu Tsai <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Milo Kim <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]> Reviewed-by: Alexandre Belloni <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-08pwm: Add support for Meson PWM ControllerNeil Armstrong3-0/+530
Add support for the PWM controller found in the Amlogic SoCs. This driver supports the Meson8b and GXBB SoCs. Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Martin Blumenstingl <[email protected]> Tested-by: Jerome Brunet <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-06pwm: samsung: Fix to use lowest div for large enough modulation bitsSeung-Woo Kim1-3/+12
From pwm_samsung_calc_tin(), there is routine to find the lowest divider possible to generate lower frequency than requested one. But it is always possible to generate requested frequency with large enough modulation bits except on s3c24xx, so this patch fixes to use lowest div for the case. This patch removes following UBSAN warning: UBSAN: Undefined behaviour in drivers/pwm/pwm-samsung.c:197:13 shift exponent 32 is too large for 32-bit type 'long unsigned int' [...] [<c0670248>] (ubsan_epilogue) from [<c06707b4>] (__ubsan_handle_shift_out_of_bounds+0xd8/0x120) [<c06707b4>] (__ubsan_handle_shift_out_of_bounds) from [<c0694b28>] (pwm_samsung_config+0x508/0x6a4) [<c0694b28>] (pwm_samsung_config) from [<c069286c>] (pwm_apply_state+0x174/0x40c) [<c069286c>] (pwm_apply_state) from [<c0b2e070>] (pwm_fan_probe+0xc8/0x488) [<c0b2e070>] (pwm_fan_probe) from [<c07ba8b0>] (platform_drv_probe+0x70/0x150) [...] Cc: Tomasz Figa <[email protected]> Signed-off-by: Seung-Woo Kim <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-06pwm: pwm-tipwmss: Remove all runtime PM gets/putsJyri Sarha1-19/+0
Remove all pm_runtime_get_sync() and pm_runtime_put_sync() call as well as the dummy pm_ops from the pwm-tipwmss driver. No registers are being modified. The runtime PM still needs to be enabled, so that the runtime PM framework can take care of enabling/disabling the PWMSS clock when submodules of PWMSS (ECAP or EHRPWM) call runtime PM APIs. With this change PWMSS clock goes to idle when none of the submodules are in use. Signed-off-by: Jyri Sarha <[email protected]> Signed-off-by: Vignesh R <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-06pwm: cros-ec: Add __packed to prevent paddingBrian Norris1-2/+2
While the particular usage in question is likely safe (struct cros_ec_command is 32-bit aligned, followed by <= 32-bit fields), it's been suggested this is not a great pattern to follow for the general case -- for example, if we follow a 'struct cros_ec_command' (which is 32-bit- but not 64-bit-aligned) with a struct that starts with a 64-bit type (e.g., u64), the compiler may add padding. Let's add __packed, to inform the compiler of our true intention -- to have no padding between these struct elements -- and to future proof for any refactorings that might occur. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Dmitry Torokhov <[email protected]> Reviewed-by: Guenter Roeck <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-06pwm: Add MediaTek MT2701 display PWM driver supportWeiqing Kong1-15/+72
Use the mtk_pwm_data struction to define different registers and add MT2701 specific register operations, such as MT2701 doesn't have commit register, needs to disable double buffer before writing register, and needs to select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH. Signed-off-by: Weiqing Kong <[email protected]> [[email protected]: use of_device_get_match_data()] [[email protected]: parameterize more consistently] Signed-off-by: Thierry Reding <[email protected]>
2016-09-06pwm: berlin: Add suspend/resume supportJisheng Zhang1-0/+84
This patch adds suspend-to-RAM support to the Berlin PWM driver. Signed-off-by: Jisheng Zhang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-09-05pwm: Unexport children before chip removalDavid Hsu2-0/+20
Exported pwm channels aren't removed before the pwmchip and are leaked. This results in invalid sysfs files. This fix removes all exported pwm channels before chip removal. Signed-off-by: David Hsu <[email protected]> Fixes: 76abbdde2d95 ("pwm: Add sysfs interface") Signed-off-by: Thierry Reding <[email protected]>
2016-09-05pwm: twl: Reliably disable TWL6030 PWMsPaul Kocialkowski1-0/+16
The current TWL6030 code for the TWL PWM driver does not reliably disable the PWM output, as tested with LEDs. The previous commit to that driver introduced that regression. However, it does make sense to disable the PWM clock after resetting the PWM, but for some obscure reason, doing it all at once simply doesn't work. The TWL6030 datasheet mentions that PWMs have to be disabled in two distinct steps. However, clearing the clock enable bit in a second step (after issuing a reset first) does not work. The only approach that works is the one that was in place before the previous commit to the driver. It consists in enabling the PWM clock after issuing a reset. This is what TI kernel trees and production code seem to be using. However, adding an extra step to disable the PWM clock seems to work reliably, despite looking quite odd. Signed-off-by: Paul Kocialkowski <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-08-06Merge tag 'pwm/for-4.8-rc1' of ↵Linus Torvalds17-234/+1169
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This set of changes improve some aspects of the atomic API as well as make use of this new API in the regulator framework to allow properly dealing with critical regulators controlled by a PWM. Aside from that there's a bunch of updates and cleanups for existing drivers, as well as the addition of new drivers for the Broadcom iProc, STMPE and ChromeOS EC controllers" * tag 'pwm/for-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (44 commits) regulator: pwm: Document pwm-dutycycle-unit and pwm-dutycycle-range regulator: pwm: Support extra continuous mode cases pwm: Add ChromeOS EC PWM driver dt-bindings: pwm: Add binding for ChromeOS EC PWM mfd: cros_ec: Add EC_PWM function definitions mfd: cros_ec: Add cros_ec_cmd_xfer_status() helper pwm: atmel: Use of_device_get_match_data() pwm: atmel: Fix checkpatch warnings pwm: atmel: Fix disabling of PWM channels dt-bindings: pwm: Add R-Car H3 device tree bindings pwm: rcar: Use ARCH_RENESAS pwm: tegra: Add support for Tegra186 dt-bindings: pwm: tegra: Add compatible string for Tegra186 pwm: tegra: Avoid overflow when calculating duty cycle pwm: tegra: Allow 100 % duty cycle pwm: tegra: Add support for reset control pwm: tegra: Rename mmio_base to regs pwm: tegra: Remove useless padding pwm: tegra: Drop NUM_PWM macro pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default value ...
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