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2023-03-31platform/x86: asus-nb-wmi: Add quirk_asus_tablet_mode to other ROG Flow X13 ↵weiliang15031-1/+2
models Make quirk_asus_tablet_mode apply on other ROG Flow X13 devices, which only affects the GV301Q model before. Signed-off-by: weiliang1503 <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-31platform/x86: gigabyte-wmi: add support for X570S AORUS ELITEHans de Goede1-0/+1
Add "X570S AORUS ELITE" to known working boards Reported-by: Brandon Nielsen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86: ISST: unlock on error path in tpmi_sst_init()Dan Carpenter1-2/+4
Call mutex_unlock(&isst_tpmi_dev_lock) before returning on this error path. Fixes: d805456c712f ("platform/x86: ISST: Enumerate TPMI SST and create framework") Signed-off-by: Dan Carpenter <[email protected]> Acked-by: Srinivas Pandruvada <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/ifs: Update IFS docJithu Joseph1-11/+14
Array BIST is the second test supported by IFS. Modify IFS doc entry to be more general. Signed-off-by: Jithu Joseph <[email protected]> Reviewed-by: Tony Luck <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/ifs: Implement Array BIST testJithu Joseph2-0/+93
Array BIST test (for a particular core) is triggered by writing to MSR_ARRAY_BIST from one sibling of the core. This will initiate a test for all supported arrays on that CPU. Array BIST test may be aborted before completing all the arrays in the event of an interrupt or other reasons. In this case, kernel will restart the test from that point onwards. Array test will also be aborted when the test fails, in which case the test is stopped immediately without further retry. Signed-off-by: Jithu Joseph <[email protected]> Reviewed-by: Tony Luck <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/ifs: Sysfs interface for Array BISTJithu Joseph4-6/+24
The interface to trigger Array BIST test and obtain its result is similar to the existing scan test. The only notable difference is that, Array BIST doesn't require any test content to be loaded. So binary load related options are not needed for this test. Add sysfs interface for array BIST test, the testing support will be added by subsequent patch. Signed-off-by: Jithu Joseph <[email protected]> Reviewed-by: Tony Luck <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/ifs: Introduce Array Scan test to IFSJithu Joseph2-18/+50
Array BIST is a new type of core test introduced under the Intel Infield Scan (IFS) suite of tests. Emerald Rapids (EMR) is the first CPU to support Array BIST. Array BIST performs tests on some portions of the core logic such as caches and register files. These are different portions of the silicon compared to the parts tested by the first test type i.e Scan at Field (SAF). Make changes in the device driver init flow to register this new test type with the device driver framework. Each test will have its own sysfs directory (intel_ifs_0 , intel_ifs_1) under misc hierarchy to accommodate for the differences in test type and how they are initiated. Upcoming patches will add actual support. Signed-off-by: Jithu Joseph <[email protected]> Reviewed-by: Tony Luck <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/ifs: IFS cleanupJithu Joseph3-12/+5
Cleanup incorporating misc review comments - Remove the subdirectory intel_ifs/0 for devicenode [1] - Make plat_ifs_groups non static and use it directly without using a function [2] Link: https://lore.kernel.org/lkml/[email protected]/ [1] Link: https://lore.kernel.org/lkml/[email protected]/ [2] Signed-off-by: Jithu Joseph <[email protected]> Reviewed-by: Tony Luck <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/ifs: Reorganize driver dataJithu Joseph3-12/+25
The struct holding device driver data contained both read only(ro) and read write(rw) fields. Separating ro fields from rw fields was recommended as a preferable design pattern during review[1]. Group ro fields into a separate const struct. Associate it to the miscdevice being registered by keeping its pointer in the same container struct as the miscdevice. Link: https://lore.kernel.org/lkml/[email protected]/ [1] Signed-off-by: Jithu Joseph <[email protected]> Reviewed-by: Tony Luck <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/ifs: Separate ifs_pkg_auth from ifs_dataJithu Joseph3-9/+10
In preparation to supporting additional tests, remove ifs_pkg_auth from per-test scope, as it is only applicable for one test type. This will simplify ifs_init() flow when multiple tests are added. Signed-off-by: Jithu Joseph <[email protected]> Reviewed-by: Tony Luck <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86: Add new msi-ec driverNikita Kravets4-0/+1028
Add a new driver to allow various MSI laptops' functionalities to be controlled from userspace. This includes such features as power profiles (aka shift modes), fan speed, charge thresholds, LEDs, etc. This driver contains EC memory configurations for different firmware versions and exports battery charge thresholds to userspace (note, that start and end thresholds control the same EC parameter and are always 10% apart). Link: https://github.com/BeardOverflow/msi-ec/ Link: https://github.com/BeardOverflow/msi-ec/pull/13 Cc: Aakash Singh <[email protected]> Cc: Jose Angel Pastrana <[email protected]> Signed-off-by: Nikita Kravets <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86: gigabyte-wmi: add support for B650 AORUS ELITE AXThomas Weißschuh1-0/+1
This has been reported as working. Suggested-by: got3nks <[email protected]> Link: https://github.com/t-8ch/linux-gigabyte-wmi-driver/issues/15#issuecomment-1483942966 Signed-off-by: Thomas Weißschuh <[email protected]> Link: https://lore.kernel.org/r/20230327-gigabyte-wmi-b650-elite-ax-v1-1-d4d645c21d0b@weissschuh.net Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-27Merge back thermal control material for 6.4-rc1.Rafael J. Wysocki1-16/+3
2023-03-27platform/x86/intel/pmc: Alder Lake PCH slp_s0_residency fixRajvi Jingar1-1/+12
For platforms with Alder Lake PCH (Alder Lake S and Raptor Lake S) the slp_s0_residency attribute has been reporting the wrong value. Unlike other platforms, ADL PCH does not have a counter for the time that the SLP_S0 signal was asserted. Instead, firmware uses the aggregate of the Low Power Mode (LPM) substate counters as the S0ix value. Since the LPM counters run at a different frequency, this lead to misreporting of the S0ix time. Add a check for Alder Lake PCH and adjust the frequency accordingly when display slp_s0_residency. Fixes: bbab31101f44 ("platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver") Signed-off-by: Rajvi Jingar <[email protected]> Signed-off-by: David E. Box <[email protected]> Reviewed-by: Rajneesh Bhardwaj <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-22platform/x86: think-lmi: Add possible_values for ThinkStationMark Pearson1-0/+20
ThinkStation platforms don't support the API to return possible_values but instead embed it in the settings string. Try and extract this information and set the possible_values attribute appropriately. Fixes: a40cd7ef22fb ("platform/x86: think-lmi: Add WMI interface support on Lenovo platforms") Signed-off-by: Mark Pearson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Thomas Weißschuh <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-22platform/x86: think-lmi: only display possible_values if availableMark Pearson1-3/+13
Some attributes don't have any values available. In those cases don't make the possible_values entry visible. Fixes: a40cd7ef22fb ("platform/x86: think-lmi: Add WMI interface support on Lenovo platforms") Signed-off-by: Mark Pearson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Thomas Weißschuh <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-22platform/x86: think-lmi: use correct possible_values delimitersMark Pearson1-1/+8
firmware-attributes class requires that possible values are delimited using ';' but the Lenovo firmware uses ',' instead. Parse string and replace where appropriate. Suggested-by: Thomas Weißschuh <[email protected]> Fixes: a40cd7ef22fb ("platform/x86: think-lmi: Add WMI interface support on Lenovo platforms") Signed-off-by: Mark Pearson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Thomas Weißschuh <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-22platform/x86: think-lmi: add missing type attributeMark Pearson1-0/+17
This driver was missing the mandatory type attribute...oops. Add it in along with logic to determine whether the attribute is an enumeration type or a string by parsing the possible_values attribute. Upstream bug https://bugzilla.kernel.org/show_bug.cgi?id=216460 Fixes: a40cd7ef22fb ("platform/x86: think-lmi: Add WMI interface support on Lenovo platforms") Signed-off-by: Mark Pearson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Thomas Weißschuh <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-20platform/x86/intel: vsec: Use intel_vsec_dev_release() to simplify init() ↵Hans de Goede1-5/+1
error cleanup On auxiliary_device_init(auxdev) failure we need to do the exact same cleanup steps as on device.release(), so use the intel_vsec_dev_release() callback for this. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-20platform/x86/intel/pmt: Add INTEL_PMT module namespaceDavid E. Box3-3/+5
Since the currently exported symbols in pmt_class are only used by other Intel PMT drivers, create an INTEL_PMT module namespace for them. Signed-off-by: David E. Box <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-20platform/x86 (gigabyte-wmi): Add support for A320M-S2H V2Frank Crawford1-0/+1
Add support for A320M-S2H V2. Tested using module force_load option. Signed-off-by: Frank Crawford <[email protected]> Acked-by: Thomas Weißschuh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-20platform/x86/intel: vsec: Explicitly enable capabilitiesDavid E. Box2-40/+38
Discovered Intel VSEC/DVSEC capabilities are enabled by default and only get disabled by quirk. Instead, remove such quirks and only enable support for capabilities that have been explicitly added to a new capabilities field. While here, also reorder the device info structures alphabetically. Signed-off-by: David E. Box <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-20platform/x86/intel: tpmi: Revise the comment of intel_vsec_add_auxDongliang Mu1-2/+2
intel_vsec_add_aux() is resource managed including res and feature_vsec_dev memory. Fix this by revising the comment of intel_vsec_add_aux since res variable will also be freed in the intel_vsec_add_aux. Signed-off-by: Dongliang Mu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-20platform/x86/intel: tpmi: Fix double free in tpmi_create_device()Dongliang Mu1-14/+5
The previous commit 6a192c0cbf38 ("platform/x86/intel/tpmi: Fix double free reported by Smatch") incorrectly handle the deallocation of res variable. As shown in the comment, intel_vsec_add_aux handles all the deallocation of res and feature_vsec_dev. Therefore, kfree(res) can still cause double free if intel_vsec_add_aux returns error. Fix this by adjusting the error handling part in tpmi_create_device, following the function intel_vsec_add_dev. Fixes: 6a192c0cbf38 ("platform/x86/intel/tpmi: Fix double free reported by Smatch") Signed-off-by: Dongliang Mu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-20platform/x86/intel: vsec: Fix a memory leak in intel_vsec_add_auxDongliang Mu1-0/+1
The first error handling code in intel_vsec_add_aux misses the deallocation of intel_vsec_dev->resource. Fix this by adding kfree(intel_vsec_dev->resource) in the error handling code. Reviewed-by: David E. Box <[email protected]> Signed-off-by: Dongliang Mu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-17platform/x86: intel-uncore-freq: move to use bus_get_dev_root()Greg Kroah-Hartman1-3/+9
Direct access to the struct bus_type dev_root pointer is going away soon so replace that with a call to bus_get_dev_root() instead, which is what it is there for. Cc: Mark Gross <[email protected]> Cc: [email protected] Acked-by: Hans de Goede <[email protected]> Acked-by: Srinivas Pandruvada <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-03-17platform/x86: ibm_rtl: move to use bus_get_dev_root()Greg Kroah-Hartman1-4/+14
Direct access to the struct bus_type dev_root pointer is going away soon so replace that with a call to bus_get_dev_root() instead, which is what it is there for. Cc: Mark Gross <[email protected]> Cc: [email protected] Acked-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-03-17drivers: remove struct module * setting from struct classGreg Kroah-Hartman2-2/+0
There is no need to manually set the owner of a struct class, as the registering function does it automatically, so remove all of the explicit settings from various drivers that did so as it is unneeded. This allows us to remove this pointer entirely from this structure going forward. Cc: "Rafael J. Wysocki" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-03-16platform/x86: pcengines-apuv2: Drop platform:pcengines-apuv2 module-aliasHans de Goede1-1/+0
The driver auto-loads based on the DMI modaliases and this platform modalias is not necessary and broken: 1. Not necessary since the driver itself creates the platform_device, so it is already loaded when the modalias might be used 2. From a quick scan of the code it does not create any platform-devices called "platform:pcengines-apuv2" Signed-off-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-16platform/x86: sony: mark SPI related data as maybe unusedKrzysztof Kozlowski1-1/+1
The driver can be compile tested as built-in making certain data unused: drivers/platform/x86/sony-laptop.c:3290:36: error: ‘sony_device_ids’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: classmate: mark SPI related data as maybe unusedKrzysztof Kozlowski1-1/+1
The driver can be compile tested as built-in making certain data unused: drivers/platform/x86/classmate-laptop.c:1137:36: error: ‘cmpc_device_ids’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: think-lmi: Remove custom kobject sysfs_opsThomas Weißschuh1-29/+2
think-lmi defines its own sysfs_ops that are identical to the standard kobj_sysfs_ops. Use the standard definitions. Signed-off-by: Thomas Weißschuh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: think-lmi: Properly interpret return value of tlmi_settingThomas Weißschuh1-3/+2
The return value of tlmi_settings() is an errorcode, not an acpi_status. Signed-off-by: Thomas Weißschuh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: acerhdf: Remove unneeded semicolonJiapeng Chong1-1/+1
Fix the following warning: ./drivers/platform/x86/acerhdf.c:343:2-3: Unneeded semicolon. Reported-by: Abaci Robot <[email protected]> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2271 Signed-off-by: Jiapeng Chong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Add suspend/resume callbacksSrinivas Pandruvada3-0/+70
To support S3/S4 with TPMI interface add suspend/resume callbacks. Here HW state is stored in suspend callback and restored during resume callback. The hardware state which needs to be stored/restored: - CLOS configuration - CLOS Association - SST-CP enable/disable status - SST-PP perf level setting Signed-off-by: Srinivas Pandruvada <[email protected]> Suggested-by: Hans de Goede <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Add SST-TF support via TPMISrinivas Pandruvada1-0/+66
The support of Intel Speed Select Technology - Turbo Frequency (SST-TF) feature enables the ability to set different “All core turbo ratio limits” to cores based on the priority. By using this feature, some cores can be configured to get higher turbo frequency by designating them as high priority at the cost of lower or no turbo frequency on the low priority cores. One new IOCTLs are added: ISST_IF_GET_TURBO_FREQ_INFO : Get information about turbo frequency buckets Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST-TF operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Add SST-BF support via TPMISrinivas Pandruvada1-0/+87
The Intel Speed Select Technology - Base Frequency (SST-BF) feature lets the user control base frequency. If some critical workload threads demand constant high guaranteed performance, then this feature can be used to execute the thread at higher base frequency on specific sets of CPUs (high priority CPUs) at the cost of lower base frequency (low priority CPUs) on other CPUs. Two new IOCTLs are added: ISST_IF_GET_BASE_FREQ_INFO : Get frequency information for high and low priority CPUs ISST_IF_GET_BASE_FREQ_CPU_MASK : CPUs capable of higher frequency Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST-BF operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Add SST-PP support via TPMISrinivas Pandruvada1-1/+416
This Intel Speed Select Technology - Performance Profile (SST-PP) feature introduces a mechanism that allows multiple optimized performance profiles per system. Each profile defines a set of CPUs that need to be online and rest offline to sustain a guaranteed base frequency. Five new IOCTLs are added: ISST_IF_PERF_LEVELS : Get number of performance levels ISST_IF_PERF_SET_LEVEL : Set to a new performance level ISST_IF_PERF_SET_FEATURE : Activate SST-BF/SST-TF for a performance level ISST_IF_GET_PERF_LEVEL_INFO : Get parameters for a performance level ISST_IF_GET_PERF_LEVEL_CPU_MASK : Get CPU mask for a performance level Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST PP operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Add SST-CP support via TPMISrinivas Pandruvada1-0/+264
Intel Speed Select Technology Core Power (SST-CP) is an interface that allows users to define per core priority. This defines a mechanism to distribute power among cores when there is a power constrained scenario. This defines a class of service (CLOS) configuration. Three new IOCTLs are added: ISST_IF_CORE_POWER_STATE : Enable/Disable SST-CP ISST_IF_CLOS_PARAM : Configure CLOS parameters ISST_IF_CLOS_ASSOC : Associate CPUs to a CLOS To associate CPUs to CLOS, either Linux CPU numbering or PUNIT numbering scheme can be used, using parameter punit_cpu_map (1: for PUNIT numbering 0 for Linux CPU number). There is no change to IOCTL to get PUNIT CPU number for a CPU. Introduce get_instance() function, which is used by majority of IOCTLs processing to convert a socket and power domain to tpmi_per_power_domain_info * instance. This instance has all the MMIO offsets stored to read a particular field. Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST CP operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Parse SST MMIO and update instanceSrinivas Pandruvada1-4/+287
SST registers are presented to OS in multi-layer structures starting with a SST header showing version information freezing current definition. For details on SST terminology refer to Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation SST TPMI details are published in the following document: https://github.com/intel/tpmi_power_management/blob/main/SST_TPMI_public_disclosure_FINAL.docx SST MMIO structure layout follows: SST-HEADER SST-CP Header SST-CP CONTROL SST-CP STATUS SST-CP CONFIG0 SST-CP CONFIG1 ... ... SST-PP Header SST-PP OFFSET_0 SST-PP OFFSET_1 SST_PP_0_INFO SST_PP_1_INFO SST_PP_2_INFO SST_PP_3_INFO SST-PP CONTROL SST-PP STATUS Each register bank contains information to get to next lower level information. This information is parsed and stored in the struct tpmi_per_power_domain_info for each domain. This information is used to process each SST requests. Signed-off-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Enumerate TPMI SST and create frameworkSrinivas Pandruvada5-0/+349
Enumerate TPMI SST driver and create basic framework to add more features. The basic user space interface is still same as the legacy using /dev/isst_interface. Users of "intel-speed-select" utility should be able to use same commands as prior gens without being aware of new underlying hardware interface. TPMI SST driver enumerates on device "intel_vsec.tpmi-sst". Since there can be multiple instances and there is one common SST core, split implementation into two parts: A common core part and an enumeration part. The enumeration driver is loaded for each device instance and register with the TPMI SST core driver. On very first enumeration the TPMI SST core driver register with SST core driver to get IOCTL callbacks. The api_version is incremented for IOCTL ISST_IF_GET_PLATFORM_INFO, so that user space can issue new IOCTLs. Each TPMI package contains multiple power domains. Each power domain has its own set of SST controls. For each domain map the MMIO memory and update per domain struct tpmi_per_power_domain_info. This information will be used to implement other SST interfaces. Implement first IOCTL commands to get number of TPMI SST instances and instance mask as some of the power domains may not have any SST controls. Signed-off-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: ISST: Add support for MSR 0x54Srinivas Pandruvada1-0/+28
To map Linux CPU numbering scheme to hardware CPU numbering scheme MSR 0x53 is getting used. But for new generation of CPUs, this MSR is not valid. Since this is model specific MSR, this is possible. A new MSR 0x54 is defined for this purpose. User space can use the API version to distinguish format from MSR 0x53. Intel speed select utility is updated to use the new format based on the API version. Signed-off-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Zhang Rui <[email protected]> Tested-by: Pragya Tanwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: dell-laptop: Register ctl-led for speaker-muteKoba Ko2-0/+44
Some platforms have the speaker-mute led and current driver doesn't control it. If the platform support the control of speaker-mute led, register it Signed-off-by: Koba Ko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: Add intel_bytcrc_pwrsrc driverHans de Goede3-0/+193
Add a new driver for the power-, wake- and reset-source functionality of the Bay Trail (BYT) version of the Crystal Cove PMIC. The main functionality here is detecting which power-sources (USB / DC in / battery) are active. This is normally exposed to userspace as a power_supply class charger device with an online sysfs attribute. But if a charger is online or not is already exposed on BYT-CRC devices through either an ACPI AC power_supply device, or through a native driver for the battery charger chip (e.g. a BQ24292i). So instead of adding duplicate info under the power_supply class this driver exports the info through debugfs and likewise adds debugfs files for the reset- and wake-source info / registers. Despite this driver only exporting debugfs bits it is still useful to have this driver because it clears the wake- and reset-source registers after reading them. Not clearing these can have undesirable side-effects. Specifically if the WAKESRC register contains 0x01 (wake by powerbutton) on reboot then the firmware on some tablets turns the reboot into a poweroff. I guess this may be necessary to make long power-presses turn into a poweroff somehow? Signed-off-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-16Merge tag 'ib-pdx86-backlight-6.4' into review-hansHans de Goede2-77/+328
Immutable branch between pdx86 and backlight due for the v6.4 merge window
2023-03-16platform/x86: x86-android-tablets: Add depends on PMIC_OPREGIONHans de Goede1-1/+1
Add a depends on PMIC_OPREGION to x86-android-tablets Kconfig to fix the following build error: ERROR: modpost: "intel_soc_pmic_exec_mipi_pmic_seq_element" [drivers/platform/x86/x86-android-tablets/x86-android-tablets.ko] undefined! Fixes: 9b1d2662b8c5 ("platform/x86: x86-android-tablets: Add touchscreen support for Lenovo Yoga Tab 3 Pro YT3-X90F") Reported-by: kernel test robot <[email protected]> Link: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-16backlight: apple_bl: Use acpi_video_get_backlight_type()Hans de Goede2-12/+0
On some MacBooks both the apple_bl and the apple-gmux backlight drivers may be able to export a /sys/class/backlight device. To avoid having 2 backlight devices for one LCD panel until now the apple-gmux driver has been calling apple_bl_unregister() to move the apple_bl backlight device out of the way when it loads. Similar problems exist on other x86 laptops and all backlight drivers which may be used on x86 laptops have moved to using acpi_video_get_backlight_type() to determine whether they should load or not. Switch apple_bl to this model too, so that it is consistent with all the other x86 backlight drivers. Besides code-simplification and consistency this has 2 other benefits: 1) It removes a race during boot where userspace will briefly see an apple_bl backlight and then have it disappear again, leading to e.g.: https://bbs.archlinux.org/viewtopic.php?id=269920 2) This allows user to switch between the drivers by passing acpi_backlight=apple_gmux or acpi_backlight=vendor on the kernel commandline. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Daniel Thompson <[email protected]> Acked-by: Lee Jones <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-16platform/x86: apple-gmux: return -EFAULT if copy failsDan Carpenter1-7/+6
The copy_to/from_user() functions return the number of bytes remaining to be copied, but we want to return -EFAULT to the user. Fixes: ce3fef2eb235 ("platform/x86: apple-gmux: add debugfs interface") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Orlando Chamberlain <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-16platform/x86: apple-gmux: Add acpi_video_get_backlight_type() checkHans de Goede1-27/+34
Make apple-gmux backlight registration honor the acpi_backlight=... kernel commandline option which is used to select the backlight control method on x86/ACPI devices. Reported-and-tested-by: Aditya Garg <[email protected]> Link: https://lore.kernel.org/platform-driver-x86/BM1PR01MB0931B467250831916F7C55B3B8A59@BM1PR01MB0931.INDPRD01.PROD.OUTLOOK.COM/ Signed-off-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-16platform/x86: apple-gmux: add debugfs interfaceOrlando Chamberlain1-0/+82
Allow reading and writing gmux ports from userspace. For example: echo 4 > /sys/kernel/debug/apple_gmux/selected_port cat /sys/kernel/debug/apple_gmux/selected_port_data | xxd -p Will show the gmux version information (00000005 in this case) Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Orlando Chamberlain <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
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