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2023-08-09x86/cpu: Fix Gracemont uarchPeter Zijlstra1-1/+1
Alderlake N is an E-core only product using Gracemont micro-architecture. It fits the pre-existing naming scheme perfectly fine, adhere to it. Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Rafael J. Wysocki <[email protected]> Acked-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-06-20platform/x86:intel/pmc: Add Meteor Lake IOE-M PMC related mapsXi Pardee2-0/+151
Add device ID and register maps for the PMC in IO expansion die M in Meteor Lake. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Add Meteor Lake IOE-P PMC related mapsXi Pardee2-0/+343
Add device ID and register maps for the PMC in IO expansion die P in Meteor Lake. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Use SSRAM to discover pwrm base address of primary PMCXi Pardee1-6/+13
On older platforms, the base address for PMC was hardcoded in the driver. Newer platforms can now retrieve the base address from SSRAM. Use SSRAM to discover pwrm base address on Meteor Lake platform. If this method fails, it will fall back to the hardcoded value. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Discover PMC devicesDavid E. Box5-14/+180
On platforms with multiple PMCs, additional PMC devices are discovered in the SSRAM device associated with the primary PMC. Add support for discovering PMC devices from SSRAM. Use PMC devid to assign the corresponding register map. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: David E. Box <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Enable debugfs multiple PMC supportXi Pardee1-66/+129
Enable debugfs support for multiple PMC. These debugfs attributes show information for all enabled PMCs. pch_ip_power_gating_status substate_status_registers substate_live_status_registers ltr_show ltr_ignore Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Add support to handle multiple PMCsXi Pardee8-141/+205
To support platforms with multiple PMCs, add a PMC device structure to support each PMC instance. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Combine core_init() and core_configure()Xi Pardee8-58/+85
Combine core_init() and core_configure() functions to have a cleaner setup for platforms. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Update maps for Meteor Lake P/M platformsXi Pardee2-10/+466
Fix the IP name errors in the register maps used by the following debugfs attributes in the Meteor Lake SOC-M PMC. pfear_sts lpm_sts ltr_show Fixes: c5ad454a12c6 ("platform/x86: intel/pmc/core: Add Meteor Lake support to pmc core driver") Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-13platform/x86/intel/pmc/mtl: Put devices in D3 during resumeDavid E. Box1-7/+20
An earlier commit placed some driverless devices in D3 during boot so that they don't block package cstate entry on Meteor Lake. Also place these devices in D3 after resume from suspend. Fixes: 336ba968d3e3 ("platform/x86/intel/pmc/mtl: Put GNA/IPU/VPU devices in D3") Signed-off-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-06-13platform/x86/intel/pmc: Add resume callbackDavid E. Box2-2/+15
Add a resume callback to perform platform specific functions during resume from suspend. Signed-off-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-06-08platform/x86:intel/pmc: Remove Meteor Lake S platform supportXi Pardee1-1/+0
commit c5ad454a12c6 ("platform/x86: intel/pmc/core: Add Meteor Lake support to pmc core driver") was supposed to add support for Meter Lake P/M and mistakenly added support for Meteor Lake S instead. Meteor Lake P/M support was added later and MTL-S support needs to be removed since its currently assigned to the wrong register maps. Fixes: c5ad454a12c6 ("platform/x86: intel/pmc/core: Add Meteor Lake support to pmc core driver") Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-04-25Merge tag 'pm-6.4-rc1' of ↵Linus Torvalds2-10/+11
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "These update several cpufreq drivers and the cpufreq core, add sysfs interface for exposing the time really spent in the platform low-power state during suspend-to-idle, update devfreq (core and drivers) and the pm-graph suite of tools and clean up code. Specifics: - Fix the frequency unit in cpufreq_verify_current_freq checks() Sanjay Chandrashekara) - Make mode_state_machine in amd-pstate static (Tom Rix) - Make the cpufreq core require drivers with target_index() to set freq_table (Viresh Kumar) - Fix typo in the ARM_BRCMSTB_AVS_CPUFREQ Kconfig entry (Jingyu Wang) - Use of_property_read_bool() for boolean properties in the pmac32 cpufreq driver (Rob Herring) - Make the cpufreq sysfs interface return proper error codes on obviously invalid input (qinyu) - Add guided autonomous mode support to the AMD P-state driver (Wyes Karny) - Make the Intel P-state driver enable HWP IO boost on all server platforms (Srinivas Pandruvada) - Add opp and bandwidth support to tegra194 cpufreq driver (Sumit Gupta) - Use of_property_present() for testing DT property presence (Rob Herring) - Remove MODULE_LICENSE in non-modules (Nick Alcock) - Add SM7225 to cpufreq-dt-platdev blocklist (Luca Weiss) - Optimizations and fixes for qcom-cpufreq-hw driver (Krzysztof Kozlowski, Konrad Dybcio, and Bjorn Andersson) - DT binding updates for qcom-cpufreq-hw driver (Konrad Dybcio and Bartosz Golaszewski) - Updates and fixes for mediatek driver (Jia-Wei Chang and AngeloGioacchino Del Regno) - Use of_property_present() for testing DT property presence in the cpuidle code (Rob Herring) - Drop unnecessary (void *) conversions from the PM core (Li zeming) - Add sysfs files to represent time spent in a platform sleep state during suspend-to-idle and make AMD and Intel PMC drivers use them Mario Limonciello) - Use of_property_present() for testing DT property presence (Rob Herring) - Add set_required_opps() callback to the 'struct opp_table', to make the code paths cleaner (Viresh Kumar) - Update the pm-graph siute of utilities to v5.11 with the following changes: * New script which allows users to install the latest pm-graph from the upstream github repo. * Update all the dmesg suspend/resume PM print formats to be able to process recent timelines using dmesg only. * Add ethtool output to the log for the system's ethernet device if ethtool exists. * Make the tool more robustly handle events where mangled dmesg or ftrace outputs do not include all the requisite data. - Make the sleepgraph utility recognize "CPU killed" messages (Xueqin Luo) - Remove unneeded SRCU selection in Kconfig because it's always set from devfreq core (Paul E. McKenney) - Drop of_match_ptr() macro from exynos-bus.c because this driver is always using the DT table for driver probe (Krzysztof Kozlowski) - Use the preferred of_property_present() instead of the low-level of_get_property() on exynos-bus.c (Rob Herring) - Use devm_platform_get_and_ioream_resource() in exyno-ppmu.c (Yang Li)" * tag 'pm-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (44 commits) platform/x86/intel/pmc: core: Report duration of time in HW sleep state platform/x86/intel/pmc: core: Always capture counters on suspend platform/x86/amd: pmc: Report duration of time in hw sleep state PM: Add sysfs files to represent time spent in hardware sleep state cpufreq: use correct unit when verify cur freq cpufreq: tegra194: add OPP support and set bandwidth cpufreq: amd-pstate: Make varaiable mode_state_machine static PM: core: Remove unnecessary (void *) conversions cpufreq: drivers with target_index() must set freq_table PM / devfreq: exynos-ppmu: Use devm_platform_get_and_ioremap_resource() OPP: Move required opps configuration to specialized callback OPP: Handle all genpd cases together in _set_required_opps() cpufreq: qcom-cpufreq-hw: Revert adding cpufreq qos dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCM2290 dt-bindings: cpufreq: cpufreq-qcom-hw: Sanitize data per compatible dt-bindings: cpufreq: cpufreq-qcom-hw: Allow just 1 frequency domain cpufreq: Add SM7225 to cpufreq-dt-platdev blocklist cpufreq: qcom-cpufreq-hw: fix double IO unmap and resource release on exit cpufreq: mediatek: Raise proc and sram max voltage for MT7622/7623 cpufreq: mediatek: raise proc/sram max voltage for MT8516 ...
2023-04-25Merge tag 'platform-drivers-x86-v6.4-1' of ↵Linus Torvalds2-3/+33
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver updates from Hans de Goede: - AMD PMC and PMF drivers: - Numerous bugfixes - Intel Speed Select Technology (ISST): - TPMI (Topology Aware Register and PM Capsule Interface) support for ISST support on upcoming processor models - Various other improvements / new hw support - tools/intel-speed-select: TPMI support + other improvements - Intel In Field Scan (IFS): - Add Array Bist test support - New drivers: - intel_bytcrc_pwrsrc Crystal Cove PMIC pwrsrc / reset-reason driver - lenovo-ymc Yoga Mode Control driver for reporting SW_TABLET_MODE - msi-ec Driver for MSI laptop EC features like battery charging limits - apple-gmux: - Support for new MMIO based models (T2 Macs) - Honor acpi_backlight= auto-detect-code + kernel cmdline option to switch between gmux and apple_bl backlight drivers and remove own custom handling for this - x86-android-tablets: Refactor / cleanup + new hw support - Miscellaneous other cleanups / fixes * tag 'platform-drivers-x86-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (178 commits) platform/x86: x86-android-tablets: Add accelerometer support for Yoga Tablet 2 1050/830 series platform/x86: x86-android-tablets: Add "yogabook-touch-kbd-digitizer-switch" pdev for Lenovo Yoga Book platform/x86: x86-android-tablets: Add Wacom digitizer info for Lenovo Yoga Book platform/x86: x86-android-tablets: Update Yoga Book HiDeep touchscreen comment platform/x86: thinkpad_acpi: Fix Embedded Controller access on X380 Yoga platform/x86/intel/sdsi: Change mailbox timeout platform/x86/intel/pmt: Ignore uninitialized entries platform/x86: amd: pmc: provide user message where s0ix is not supported platform/x86/amd: pmc: Fix memory leak in amd_pmc_stb_debugfs_open_v2() mlxbf-bootctl: Add sysfs file for BlueField boot fifo platform/x86: amd: pmc: Remove __maybe_unused from amd_pmc_suspend_handler() platform/x86/intel/pmc/mtl: Put GNA/IPU/VPU devices in D3 platform/x86/amd: pmc: Move out of BIOS SMN pair for STB init platform/x86/amd: pmc: Utilize SMN index 0 for driver probe platform/x86/amd: pmc: Move idlemask check into `amd_pmc_idlemask_read` platform/x86/amd: pmc: Don't dump data after resume from s0i3 on picasso platform/x86/amd: pmc: Hide SMU version and program attributes for Picasso platform/x86/amd: pmc: Don't try to read SMU version on Picasso platform/x86/amd/pmf: Move out of BIOS SMN pair for driver probe platform/x86: intel-uncore-freq: Add client processors ...
2023-04-20platform/x86/intel/pmc: core: Report duration of time in HW sleep stateMario Limonciello2-0/+6
intel_pmc_core displays a warning when the module parameter `warn_on_s0ix_failures` is set and a suspend didn't get to a HW sleep state. Report this to the standard kernel reporting infrastructure so that userspace software can query after the suspend cycle is done. Reviewed-by: Hans de Goede <[email protected]> Suggested-by: Ilpo Järvinen <[email protected]> Reviewed-by: David E. Box <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2023-04-20platform/x86/intel/pmc: core: Always capture counters on suspendMario Limonciello2-10/+5
Currently counters are only captured during suspend when the warn_on_s0ix_failures module parameter is set. In order to relay this counter information to the kernel reporting infrastructure adjust it so that the counters are always captured. warn_on_s0ix_failures will be utilized solely for messaging by the driver instead. Reviewed-by: Hans de Goede <[email protected]> Reviewed-by: David E. Box <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2023-04-11platform/x86/intel/pmc/mtl: Put GNA/IPU/VPU devices in D3David E. Box1-0/+31
On Meteor Lake, the GNA, IPU, and VPU devices are booted in D0 power state and will block the SoC from going into the deepest Package C-state if a driver is not present. Put each device in D3hot if no driver is found. Signed-off-by: David E. Box <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-03-27platform/x86/intel/pmc: Alder Lake PCH slp_s0_residency fixRajvi Jingar1-1/+12
For platforms with Alder Lake PCH (Alder Lake S and Raptor Lake S) the slp_s0_residency attribute has been reporting the wrong value. Unlike other platforms, ADL PCH does not have a counter for the time that the SLP_S0 signal was asserted. Instead, firmware uses the aggregate of the Low Power Mode (LPM) substate counters as the S0ix value. Since the LPM counters run at a different frequency, this lead to misreporting of the S0ix time. Add a check for Alder Lake PCH and adjust the frequency accordingly when display slp_s0_residency. Fixes: bbab31101f44 ("platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver") Signed-off-by: Rajvi Jingar <[email protected]> Signed-off-by: David E. Box <[email protected]> Reviewed-by: Rajneesh Bhardwaj <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-03-07platform/x86: intel: pmc: core: Convert to platform remove callback ↵Uwe Kleine-König1-3/+2
returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-02-02platform/x86: intel/pmc: Switch to use acpi_evaluate_dsm_typed()Andy Shevchenko1-3/+3
The acpi_evaluate_dsm_typed() provides a way to check the type of the object evaluated by _DSM call. Use it instead of open coded variant. Signed-off-by: Andy Shevchenko <[email protected]> Reviewed-by: Rajneesh Bhardwaj <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-01-12platform/x86: intel/pmc/core: Add Meteor Lake mobile supportGayatri Kammela1-0/+1
Add Meteor Lake mobile support to pmc core driver. Meteor Lake mobile parts reuse all the Meteor Lake PCH IPs. Cc: David E Box <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc/core: Add Meteor Lake support to pmc core driverGayatri Kammela4-2/+72
Add Meteor Lake client and mobile support to pmc core driver. This patch adds legacy support. Cc: David E Box <[email protected]> Suggested-by: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Sukumar Ghorai <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc: Relocate Alder Lake PCH supportGayatri Kammela4-316/+345
Create adl.c for Alder Lake PCH specific structures and init(). This file supports Alder Lake, Raptor Lake and Raptor Lake S platforms There are no functional changes involved. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc: Relocate Tiger Lake PCH supportGayatri Kammela4-264/+285
Create tgl.c for Tiger Lake PCH specific structures and init(). This file supports Tiger Lake, Elkhart Lake, Rocket Lake, Alder Lake mobile, Alder Lake N and Raptor Lake P platforms. There are no functional changes involved. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc: Relocate Ice Lake PCH supportXi Pardee4-46/+60
Create icl.c for Ice Lake PCH specific structures and init(). This file supports Ice Lake, Ice Lake NNPI and Jasper Lake platforms. There are no functional changes involved. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc: Relocate Cannon Lake Point PCH supportXi Pardee4-200/+219
Create cnp.c for Cannon Lake Point PCH specific structures and init(). This file supports Cannon Lake and Comet Lake platforms. There are no functional changes involved. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc: Relocate Sunrise Point PCH supportRajvi Jingar4-130/+148
Create spt.c for Sunrise Point PCH specific structures and init(). This file supports Sky Lake and Kaby Lake platforms. There are no functional changes involved. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc: Move variable declarations and definitions to ↵Xi Pardee2-12/+16
header and core.c Move the msr_map variable declaration to core.h and move the pmc_lpm_modes definition to core.c. This is a prepartory patch for redesigning the pmc core driver as the variables will be used in multiple PCH specific files. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc: Replace all the reg_map with init functionsGayatri Kammela2-37/+90
The current implementation of pmc core driver has the reg_map assigned to the CPUID of each platform. Replace the reg_map with init functions that are defined for each platform. This is a preparatory patch for redesigning the pmc core driver. Cc: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-11-16platform/x86/intel: pmc: Fix repeated word in commentJilin Yuan1-1/+1
Delete the redundant word 'to'. Signed-off-by: Jilin Yuan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2022-11-15platform/x86/intel: pmc: Don't unconditionally attach Intel PMC when virtualizedRoger Pau Monné1-0/+9
The current logic in the Intel PMC driver will forcefully attach it when detecting any CPU on the intel_pmc_core_platform_ids array, even if the matching ACPI device is not present. There's no checking in pmc_core_probe() to assert that the PMC device is present, and hence on virtualized environments the PMC device probes successfully, even if the underlying registers are not present. Before commit 21ae43570940 ("platform/x86: intel_pmc_core: Substitute PCI with CPUID enumeration") the driver would check for the presence of a specific PCI device, and that prevented the driver from attaching when running virtualized. Fix by only forcefully attaching the PMC device when not running virtualized. Note that virtualized platforms can still get the device to load if the appropriate ACPI device is present on the tables provided to the VM. Make an exception for the Xen initial domain, which does have full hardware access, and hence can attach to the PMC if present. Fixes: 21ae43570940 ("platform/x86: intel_pmc_core: Substitute PCI with CPUID enumeration") Signed-off-by: Roger Pau Monné <[email protected]> Acked-by: David E. Box <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-10-24platform/x86/intel: pmc/core: Add Raptor Lake support to pmc core driverGayatri Kammela1-0/+2
Add Raptor Lake client parts (both RPL and RPL_S) support to pmc core driver. Raptor Lake client parts reuse all the Alder Lake PCH IPs. Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: David Box <[email protected]> Acked-by: Rajneesh Bhardwaj <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-06-27platform/x86: intel/pmc: Add Alder Lake N support to PMC core driverGayatri Kammela1-0/+1
Add Alder Lake N (ADL-N) to the list of the platforms that Intel's PMC core driver supports. Alder Lake N reuses all the TigerLake PCH IPs. Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: David E. Box <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Reviewed-by: Rajneesh Bhardwaj <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2022-06-10platform/x86/intel: pmc: Support Intel Raptorlake PGeorge D Sworo1-0/+1
Add Raptorlake P to the list of the platforms that intel_pmc_core driver supports for pmc_core device. Raptorlake P PCH is based on Alderlake P PCH. Signed-off-by: George D Sworo <[email protected]> Reviewed-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2022-04-27platform/x86/intel: pmc/core: Use kobj_to_dev()Minghao Chi1-1/+1
Use kobj_to_dev() instead of open-coding it. Reported-by: Zeal Robot <[email protected]> Signed-off-by: Minghao Chi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2022-04-27platform/x86/intel: pmc/core: change pmc_lpm_modes to staticTom Rix1-1/+1
Sparse reports this issue core.c: note: in included file: core.h:239:12: warning: symbol 'pmc_lpm_modes' was not declared. Should it be static? Global variables should not be defined in headers. This only works because core.h is only included by core.c. Single file use variables should be static, so change its storage-class specifier to static. Signed-off-by: Tom Rix <[email protected]> Reviewed-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2021-12-23platform/x86: intel_pmc_core: fix memleak on registration failureJohan Hovold1-1/+1
In case device registration fails during module initialisation, the platform device structure needs to be freed using platform_device_put() to properly free all resources (e.g. the device name). Fixes: 938835aa903a ("platform/x86: intel_pmc_core: do not create a static struct device") Cc: [email protected] # 5.9 Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Greg Kroah-Hartman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2021-08-20platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake PCHDavid E. Box1-3/+3
Alder PCH uses the same Gigabit Ethernet (GBE) device as Tiger Lake PCH which cannot achieve PC10 without ignoring the PMC GBE LTR. Add this work around for Alder Lake PCH as well. Cc: Chao Qin <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Tested-by: You-Sheng Yang <[email protected]> Acked-by: Rajneesh Bhardwaj <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Signed-off-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/9168e8bd687f2d0d5eb0ed116e08d0764eadf7b3.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <[email protected]>
2021-08-20platform/x86/intel: pmc/core: Add Alder Lake low power mode support for pmc coreGayatri Kammela2-0/+207
Alder Lake has 14 status registers that are memory mapped. These registers show the status of the low power mode requirements. The registers are latched on every C10 entry or exit and on every s0ix.y entry/exit. Accessing these registers is useful for debugging any low power related activities. Thus, add debugfs entry to access low power mode status registers. Cc: Chao Qin <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: David Box <[email protected]> Tested-by: You-Sheng Yang <[email protected]> Acked-by: Rajneesh Bhardwaj <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Link: https://lore.kernel.org/r/d27ec98589a5aaa569bbce0e937ed03779fc0a22.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <[email protected]>
2021-08-20platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR) support ↵Gayatri Kammela2-0/+41
to Alder Lake Add support to show the Latency Tolerance Reporting for the IPs on the Alder Lake PCH as reported by the PMC. This LTR support on Alder Lake is slightly different from the Cannon lake PCH that is being reused by all platforms till Tiger Lake. Cc: Chao Qin <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: David Box <[email protected]> Tested-by: You-Sheng Yang <[email protected]> Acked-by: Rajneesh Bhardwaj <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Link: https://lore.kernel.org/r/5ca3ea090b53a9bf918b055447ab5c8ef2925cc4.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <[email protected]>
2021-08-20platform/x86/intel: pmc/core: Add Alderlake support to pmc core driverGayatri Kammela2-0/+70
Add Alder Lake client and mobile support to pmc core driver. Cc: Chao Qin <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: David Box <[email protected]> Tested-by: You-Sheng Yang <[email protected]> Acked-by: Rajneesh Bhardwaj <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Link: https://lore.kernel.org/r/8b32e168f8e69dd00aabfb2e4383db78f22b123b.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <[email protected]>
2021-08-20platform/x86: intel_pmc_core: Move to intel sub-directoryKate Hsuan5-0/+2319
Move Intel PMC core driver to intel sub-directory to improve readability. Signed-off-by: Kate Hsuan <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Reviewed-by: Rajneesh Bhardwaj <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
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