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2023-01-12phy: qcom-qmp-usb: rework regs layout arraysDmitry Baryshkov2-26/+29
Use symbolic names for the values inside reg layout arrays. New register names are added following the PCS register layout that is used by the particular PHY. Note: ipq8074 tables appear to use a mixture of v2 and v3 registers. This might need additional fixes. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-usb: remove QPHY_PCS_MISC_TYPEC_CTRL regDmitry Baryshkov1-3/+0
The QPHY_PCS_MISC_TYPEC_CTRL register is not used, remove it from register layout. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-usb: remove QPHY_PCS_LFPS_RXTERM_IRQ_STATUS regDmitry Baryshkov2-6/+1
The QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register is not used, remove it from register layout. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-ufs: rename regs layout arraysDmitry Baryshkov2-16/+21
Rename regs layouts to follow the QMP PHY version. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-ufs: rework regs layout arraysDmitry Baryshkov3-9/+17
Use symbolic names for the values inside reg layout arrays. New register names are added following the PCS register layout that is used by the particular PHY. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-ufs: split UFS-specific v2 PCS registers to a separate headerDmitry Baryshkov4-20/+30
Follow other QMP headers, split and rename UFS-specific PCS registers to ease comparing regs differences. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-pcie-msm8996: rework regs layout arraysDmitry Baryshkov1-3/+3
Use symbolic names for the values inside reg layout arrays. New register names are added following the PCS register layout that is used by the particular PHY. Note: ipq8074 tables appear to use a mixture of v2 and v3 registers. This might need additional fixes. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-pcie: rename regs layout arraysDmitry Baryshkov2-26/+30
Rename regs layouts to follow the QMP PHY version. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-pcie: rework regs layout arraysDmitry Baryshkov2-16/+20
Use symbolic names for the values inside reg layout arrays. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp: remove duplicate v5_5nm register definitionsDmitry Baryshkov1-5/+0
Remove duplicate defines from phy-qcom-qmp-qserdes-txrx-v5_5nm.h Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp: fix typo in QSERDES_COM_CMN_RSVD5 valueDmitry Baryshkov1-1/+1
Fix typo in QSERDES_COM_CMN_RSVD5 register definition. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-ufs: provide symbol clocksDmitry Baryshkov1-0/+57
Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src, ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock provider to let other devices link these clocks through the DT. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qualcomm: pcie2: register as clock providerDmitry Baryshkov1-1/+5
Register pcie2 PHY as a clock provider to enable using it in the DT-based clock lookup. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-pcie: add support for sm8350 platformDmitry Baryshkov1-1/+119
Add support for a single-lane and two-lane PCIe PHYs found on Qualcomm SM8350 platform. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-pcie: rename the sm8450 gen3 PHY config tablesDmitry Baryshkov1-9/+9
SM8350 PHY config tables are mostly the same as SM8450 gen3 PHY config tables. Rename generic tables to remove x1 suffix. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-12phy: qcom-qmp-pcie: split sm8450 gen3 PHY config tablesDmitry Baryshkov1-6/+20
SM8350 PHY config tables are mostly the same as SM8450 gen3 PHY config tables. Split these tables to be used by SM8350 config. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2023-01-11phy: ti: fix Kconfig warning and operator precedenceRandy Dunlap1-2/+2
Fix Kconfig depends operator precedence to prevent a Kconfig warning: WARNING: unmet direct dependencies detected for MUX_MMIO Depends on [n]: MULTIPLEXER [=m] && OF [=n] Selected by [m]: - PHY_AM654_SERDES [=m] && (OF [=n] && ARCH_K3 || COMPILE_TEST [=y]) && COMMON_CLK [=y] Fixes: 71e2f5c5c224 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC") Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Randy Dunlap <[email protected]> Cc: Vinod Koul <[email protected]> Cc: Kishon Vijay Abraham I <[email protected]> Cc: [email protected] Cc: Arnd Bergmann <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-12-19Merge tag 'phy-for-6.2' of ↵Linus Torvalds30-2479/+3234
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "This tme we have again a big pile of qcom-qmp-* changes, one new driver and bunch of new hardware support. New hardware support: - Allwinner H616 USB PHY and A100 DPHY support - TI J721s2, J784s4 and J721e support - Freescale i.MX8MP PCIe PHY support - New driver for Renesas Ethernet SERDES supporting R-Car S4-8 - Qualcomm SM8450 PCIe1 PHY support in EP mode - Qualcomm SC8280XP PCIe PHY support (including x4 mode) - Fixed Qualcomm SC8280XP USB4-USB3-DP PHY DT bindings Updates: - A big pile of updates on qcom-qmp-* drivers following the driver split and reorganization merged earlier - Phy order of API calls documentation update" * tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (174 commits) phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support dt-bindings: phy-j721e-wiz: add j721s2 compatible string phy: use devm_platform_get_and_ioremap_resource() phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property phy: qcom-qmp-pcie: drop redundant clock allocation phy: qcom-qmp-usb: drop redundant clock allocation phy: qcom-qmp: drop unused type header phy: qcom-qmp-usb: drop sc8280xp reference-clock source dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: drop reference-clock source phy: qcom-qmp-combo: add support for updated sc8280xp binding phy: qcom-qmp-combo: rename DP_PHY register pointer phy: qcom-qmp-combo: rename common-register pointers phy: qcom-qmp-combo: clean up DP clock callbacks phy: qcom-qmp-combo: separate clock and provider registration phy: qcom-qmp-combo: add clock registration helper ...
2022-12-13Merge tag 'media/v6.2-1' of ↵Linus Torvalds1-4/+27
git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media Pull media updates from Mauro Carvalho Chehab: - DVB core changes to avoid refcount troubles and UAF - DVB API/core has gained support for DVB-C2 and DVB-S2X - New sensor drivers: ov08x40, ov4689.c, st-vgxy61 and tc358746.c - Removal of an unused sensor driver: s5k4ecgx - Move microchip_csi2dc to a new directory, named after the manufacturer - Add media controller support to Microship drivers - Old Atmel/Microship drivers that don't use media controler got moved to staging - New drivers added for Renesas RZ/G2L CRU and MIPI CSI-2 support - Allwinner A31 camera sensor driver code was now split into a bridge and a separate processor driver - Added a virtual stateless decoder driver in order to test core support for stateless drivers and test userspace apps using it - removed platform-based support for ov9650, as this is not used anymore - atomisp now uses videobuf2 and supports normal mmap mode - the imx7-media-csi driver got promoted from staging - rcar-vin driver has gained support for gen3 UDS (Up Down Scaler) - most i2c drivers now use I2C .probe_new() kAPI - lots of drivers fixes, cleanups and improvements * tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (544 commits) media: s5c73m3: Switch to GPIO descriptors media: i2c: s5k5baf: switch to using gpiod API media: i2c: s5k6a3: switch to using gpiod API media: imx: remove code for non-existing config IMX_GPT_ICAP media: si470x: Fix use-after-free in si470x_int_in_callback() media: staging: stkwebcam: Restore MEDIA_{USB,CAMERA}_SUPPORT dependencies media: coda: Add check for kmalloc media: coda: Add check for dcoda_iram_alloc dt-bindings: media: s5c73m3: Fix reset-gpio descriptor media: dt-bindings: allwinner: h6-vpu-g2: Add IOMMU reference property media: s5k4ecgx: Delete driver media: s5k4ecgx: Switch to GPIO descriptors media: Switch to use dev_err_probe() helper headers: Remove some left-over license text in include/uapi/linux/v4l2-* headers: Remove some left-over license text in include/uapi/linux/dvb/ media: usb: pwc-uncompress: Use flex array destination for memcpy() media: s5p-mfc: Fix to handle reference queue during finishing media: s5p-mfc: Clear workbit to handle error condition media: s5p-mfc: Fix in register read and write for H264 media: imx: Use get_mbus_config instead of parsing upstream DT endpoints ...
2022-11-24phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module supportMatt Ranostay1-0/+16
Add support for j721s2-wiz-10g device which is similar to j721e-wiz-10g but uses clock-names interface versus explicitly defining clock nodes within device tree node. Signed-off-by: Matt Ranostay <[email protected]> Reviewed-by: Roger Quadros <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: use devm_platform_get_and_ioremap_resource()Minghao Chi1-3/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Minghao Chi <[email protected]> Signed-off-by: ye xingchen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variantSamuel Holland1-1/+142
A100 features an updated DPHY, which moves PLL control inside the DPHY register space (previously the PLL was controlled from the CCU). It also requires a modified analog power-on sequence. This "combo PHY" can also be used as an LVDS PHY, but that is not yet supported by the driver. Signed-off-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hookSamuel Holland1-24/+35
The A100 variant uses the same values for the timing registers, and it uses the same final power-on sequence, but it needs a different analog register configuration in the middle. Support this by moving the variant-specific parts to a hook provided by the variant. Signed-off-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit lastSamuel Holland1-4/+4
The A100 variant of the DPHY requires configuring the analog registers before setting the global enable bit. Since this order also works on the other variants, always use it, to minimize the differences between them. Reviewed-by: Paul Kocialkowski <[email protected]> Signed-off-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optionalSamuel Holland1-2/+24
While all variants of the DPHY likely support RX mode, the new variant in the A100 is not used in this direction by the BSP, and it has some analog register changes, so its RX power-on sequence is unknown. To be safe, limit RX support to variants where the power-on sequence is known. Signed-off-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-pcie: drop redundant clock allocationJohan Hovold1-5/+3
Since the QMP driver split, there is no reason to allocate the fixed-rate pipe clock structure separately from the driver data. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-usb: drop redundant clock allocationJohan Hovold1-5/+3
Since the QMP driver split, there is no reason to allocate the fixed-rate pipe clock structure separately from the driver data. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp: drop unused type headerJohan Hovold4-8/+0
The PHY type defines are no longer used in the PCIe, UFS and USB QMP drivers so drop the corresponding include. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-usb: drop sc8280xp reference-clock sourceJohan Hovold1-8/+12
The source clock for the reference clock is not used by the PHY directly and should not be described by the devicetree (instead this relationship should be modelled in the clock driver). Drop the driver management of the reference-clock source for SC8280XP. Once the other clock drivers have been updated, the corresponding change can be done also for the other QMP v4 platforms. Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: add support for updated sc8280xp bindingJohan Hovold1-11/+134
Add support for the new SC8280XP binding. Note that the binding does not try to describe every register subregion and instead the driver holds the corresponding offsets. Also note that (possibly) unlike on earlier platforms, the TX registers are used by both the USB and DP implementation. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: rename DP_PHY register pointerJohan Hovold1-69/+70
The DP_PHY registers have erroneously been referred to as "PCS" registers since DisplayPort support was added to the QMP drivers (including in the devicetree binding). Rename the corresponding pointer to match the register names. Note that the repeated "dp" in the field name is intentional and this DP register block is called "DP_PHY" (not just "PHY"). Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: rename common-register pointersJohan Hovold1-12/+12
The common registers are shared by the USB and DP parts of the PHY so drop the misleading "dp" prefix from the corresponding pointers. Note that the "DP" prefix could also be dropped from the corresponding defines, but leave that in place for now. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: clean up DP clock callbacksJohan Hovold1-19/+14
Clean up the DP clock callbacks somewhat by dropping the redundant "qcom" prefix and removing line breaks after type specifiers. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: separate clock and provider registrationJohan Hovold1-24/+20
In preparation for supporting devicetree bindings which do not use child nodes, separate clock registration from clock-provider registration. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: add clock registration helperJohan Hovold1-5/+17
In preparation for supporting devicetree bindings which do not use child nodes, add a clock registration helper to handle the registration of both the USB and DP clocks. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: drop redundant clock allocationJohan Hovold1-5/+2
Since the QMP driver split, there is no reason to allocate the fixed-rate pipe clock structure separately from the driver data. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: drop redundant clock structureJohan Hovold1-35/+17
Drop the unnecessary DP clock structure and instead store the clocks directly in the driver data. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: generate pipe clock nameJohan Hovold1-6/+3
In preparation for supporting devicetree bindings which do not use child nodes, generate also the USB3 pipe clock name based on the platform device name as is done for the DP clocks. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: restructure PHY creationJohan Hovold1-41/+48
In preparation for supporting devicetree bindings which do not use child nodes, move the PHY creation to probe() proper and parse the serdes, dp_com and dp_serdes resources in a dedicated legacy devicetree helper. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: drop v4 reference-clock sourceJohan Hovold1-1/+1
The source clock for the reference clock should not be described by the devicetree and instead this relationship should be modelled in the clock driver. Drop the management of the source clock from the driver for SC8180X and SC8280XP. Note that support for the former is not yet in mainline. Also note that the binding has never been updated to describe the v4 clocks for SC8180X. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: clean up DP callback namesJohan Hovold1-41/+41
Clean up and unify the DP callbacks by dropping the redundant "qcom" and "phy" prefix and infix and by using a common naming scheme ("qmp" + version + callback name). Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: clean up probe initialisationJohan Hovold1-34/+27
Stop abusing the driver data pointer and instead pass the driver state structure directly to the initialisation helpers during probe. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: clean up device-tree parsingJohan Hovold1-54/+28
Since the QMP driver split there will be precisely two child nodes so drop the obsolete iteration construct. While at it, drop the verbose error logging that would have been printed also on probe deferrals. Note that there is no need to check if there are additional child nodes (the kernel is not a devicetree validator), but let's return an error if either child node is missing. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: merge driver dataJohan Hovold1-376/+312
The QMP combo driver manages a single PHY (even if it provides two interfaces for USB and DP, respectively) so merge the old qcom_qmp and qmp_phy structures and drop the PHY array. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: merge USB and DP configurationsJohan Hovold1-125/+57
It does not really make any sense to keep separate configuration structures for the USB and DP parts of the same PHY so merge them. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: drop lanes config parameterJohan Hovold1-42/+20
Since the QMP driver split there is really no need for the 'lanes' configuration parameter as all of these USB-C PHYs support dual-lane SuperSpeed USB and quad-lane (uni-directional) DP (even if the driver still only supports CC1 orientation using lanes 2 and 3). Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: add DP configuration tablesJohan Hovold1-21/+24
In preparation for merging the USB and DP configurations, add dedicated pointers for the DP serdes and tx tables to the configurations. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: rename sc8280xp configJohan Hovold1-2/+2
In preparation for merging the USB and DP configurations, drop the "combo" infix from the SC8280XP combined configuration for consistency with the other platforms. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: clean up DP configurationsJohan Hovold1-20/+20
In preparation for merging the USB and DP configurations, align the initialisations of the DP function pointers. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2022-11-24phy: qcom-qmp-combo: add dedicated DP iomem pointersJohan Hovold1-120/+126
In preparation for merging the driver data, add separate iomem pointers for the DP part of the PHY. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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