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2018-10-20Merge branch 'remotes/lorenzo/pci/iproc'Bjorn Helgaas1-8/+0
- Remove iproc PAXC slot check to allow VF support (Jitendra Bhivare) * remotes/lorenzo/pci/iproc: PCI: iproc: Remove PAXC slot check to allow VF support
2018-10-20Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas4-27/+220
- Support 100MHz/200MHz refclocks for i.MX6 (Lucas Stach) - Add initial power management for i.MX7 (Leonard Crestez) - Add PME_Turn_Off support for i.MX7 (Leonard Crestez) - Fix qcom runtime power management error handling (Bjorn Andersson) - Update TI dra7xx unaligned access errata workaround for host mode as well as endpoint mode (Vignesh R) - Fix kirin section mismatch warning (Nathan Chancellor) * remotes/lorenzo/pci/dwc: PCI: imx: Add PME_Turn_Off support ARM: dts: imx7d: Add turnoff reset dt-bindings: imx6q-pcie: Add turnoff reset for imx7d reset: imx7: Add PCIE_CTRL_APPS_TURNOFF PCI: kirin: Fix section mismatch warning PCI: dwc: pci-dra7xx: Enable errata i870 for both EP and RC mode dt-bindings: PCI: dra7xx: Add bindings for unaligned access in host mode PCI: qcom: Fix error handling in runtime PM support PCI: imx: Initial imx7d pm support PCI: imx6: Support MPLL reconfiguration for 100MHz and 200MHz refclock
2018-10-20Merge branch 'remotes/lorenzo/pci/controller-misc'Bjorn Helgaas12-325/+764
- Remove redundant controller tests for "device_type == pci" (Rob Herring) - Document R-Car E3 (R8A77990) bindings (Tho Vu) - Add device tree support for R-Car r8a7744 (Biju Das) - Drop unused mvebu PCIe capability code (Thomas Petazzoni) - Add shared PCI bridge emulation code (Thomas Petazzoni) - Convert mvebu to use shared PCI bridge emulation (Thomas Petazzoni) - Add aardvark Root Port emulation (Thomas Petazzoni) * remotes/lorenzo/pci/controller-misc: PCI: aardvark: Implement emulated root PCI bridge config space PCI: mvebu: Convert to PCI emulated bridge config space PCI: mvebu: Drop unused PCI express capability code PCI: Introduce PCI bridge emulated config space common logic dt-bindings: PCI: rcar: Add device tree support for r8a7744 dt-bindings: PCI: rcar: Add device tree support for r8a7744 DT: pci: rcar-pci: document R8A77990 bindings PCI: Remove unnecessary check of device_type == pci
2018-10-20Merge branch 'remotes/lorenzo/pci/cadence'Bjorn Helgaas2-14/+19
- Fix Cadence PHY handling during probe (Alan Douglas) - Signal Cadence Endpoint interrupts via AXI region 0 instead of last region (Alan Douglas) - Write Cadence Endpoint MSI interrupts with 32 bits of data (Alan Douglas) * remotes/lorenzo/pci/cadence: PCI: cadence: Write MSI data with 32bits PCI: cadence: Use AXI region 0 to signal interrupts from EP PCI: cadence: Correct probe behaviour when failing to get PHY
2018-10-20Merge branch 'pci/virtualization'Bjorn Helgaas3-1/+20
- Cache VF config space size to optimize enumeration of many VFs (KarimAllah Ahmed) - Remove unnecessary <linux/pci-ats.h> include (Bjorn Helgaas) * pci/virtualization: PCI/IOV: Remove unnecessary include of <linux/pci-ats.h> PCI/IOV: Use VF0 cached config space size for other VFs
2018-10-20Merge branch 'pci/peer-to-peer'Bjorn Helgaas3-0/+823
- Add PCI support for peer-to-peer DMA (Logan Gunthorpe) - Add sysfs group for PCI peer-to-peer memory statistics (Logan Gunthorpe) - Add PCI peer-to-peer DMA scatterlist mapping interface (Logan Gunthorpe) - Add PCI configfs/sysfs helpers for use by peer-to-peer users (Logan Gunthorpe) - Add PCI peer-to-peer DMA driver writer's documentation (Logan Gunthorpe) - Add block layer flag to indicate driver support for PCI peer-to-peer DMA (Logan Gunthorpe) - Map Infiniband scatterlists for peer-to-peer DMA if they contain P2P memory (Logan Gunthorpe) - Register nvme-pci CMB buffer as PCI peer-to-peer memory (Logan Gunthorpe) - Add nvme-pci support for PCI peer-to-peer memory in requests (Logan Gunthorpe) - Use PCI peer-to-peer memory in nvme (Stephen Bates, Steve Wise, Christoph Hellwig, Logan Gunthorpe) * pci/peer-to-peer: nvmet: Optionally use PCI P2P memory nvmet: Introduce helper functions to allocate and free request SGLs nvme-pci: Add support for P2P memory in requests nvme-pci: Use PCI p2pmem subsystem to manage the CMB IB/core: Ensure we map P2P memory correctly in rdma_rw_ctx_[init|destroy]() block: Add PCI P2P flag for request queue PCI/P2PDMA: Add P2P DMA driver writer's documentation docs-rst: Add a new directory for PCI documentation PCI/P2PDMA: Introduce configfs/sysfs enable attribute helpers PCI/P2PDMA: Add PCI p2pmem DMA mappings to adjust the bus offset PCI/P2PDMA: Add sysfs group to display p2pmem stats PCI/P2PDMA: Support peer-to-peer memory
2018-10-20Merge branch 'pci/msi'Bjorn Helgaas1-3/+6
- Avoid panic when drivers enable MSI/MSI-X twice (Tonghao Zhang) * pci/msi: PCI/MSI: Warn and return error if driver enables MSI/MSI-X twice
2018-10-20Merge branch 'pci/misc'Bjorn Helgaas5-68/+44
- Remove unused Netronome NFP32xx Device IDs (Jakub Kicinski) - Use bitmap_zalloc() for dma_alias_mask (Andy Shevchenko) - Add switch fall-through annotations (Gustavo A. R. Silva) - Remove unused Switchtec quirk variable (Joshua Abraham) - Fix pci.c kernel-doc warning (Randy Dunlap) - Remove trivial PCI wrappers for DMA APIs (Christoph Hellwig) - Add Intel GPU device IDs to spurious interrupt quirk (Bin Meng) - Run Switchtec DMA aliasing quirk only on NTB endpoints to avoid useless dmesg errors (Logan Gunthorpe) - Update Switchtec NTB documentation (Wesley Yung) - Remove redundant "default n" from Kconfig (Bartlomiej Zolnierkiewicz) * pci/misc: PCI: pcie: Remove redundant 'default n' from Kconfig NTB: switchtec_ntb: Update switchtec documentation with prerequisites for NTB PCI: Fix Switchtec DMA aliasing quirk dmesg noise PCI: Add macro for Switchtec quirk declarations PCI: Add Device IDs for Intel GPU "spurious interrupt" quirk PCI: Remove pci_set_dma_max_seg_size() PCI: Remove pci_set_dma_seg_boundary() PCI: Remove pci_unmap_addr() wrappers for DMA API PCI / ACPI: Mark expected switch fall-through PCI: Remove set but unused variable PCI: Fix pci.c kernel-doc parameter warning PCI: Allocate dma_alias_mask with bitmap_zalloc() PCI: Remove unused NFP32xx IDs
2018-10-20Merge branch 'pci/hotplug'Bjorn Helgaas44-1484/+1254
- Differentiate between pciehp surprise and safe removal (Lukas Wunner) - Remove unnecessary pciehp includes (Lukas Wunner) - Drop pciehp hotplug_slot_ops wrappers (Lukas Wunner) - Tolerate PCIe Slot Presence Detect being hardwired to zero to workaround broken hardware, e.g., the Wilocity switch/wireless device (Lukas Wunner) - Unify pciehp controller & slot structs (Lukas Wunner) - Constify hotplug_slot_ops (Lukas Wunner) - Drop hotplug_slot_info (Lukas Wunner) - Embed hotplug_slot struct into users instead of allocating it separately (Lukas Wunner) - Initialize PCIe port service drivers directly instead of relying on initcall ordering (Keith Busch) - Restore PCI config state after a slot reset (Keith Busch) - Save/restore DPC config state along with other PCI config state (Keith Busch) - Reference count devices during AER handling to avoid race issue with concurrent hot removal (Keith Busch) - If an Upstream Port reports ERR_FATAL, don't try to read the Port's config space because it is probably unreachable (Keith Busch) - During error handling, use slot-specific reset instead of secondary bus reset to avoid link up/down issues on hotplug ports (Keith Busch) - Restore previous AER/DPC handling that does not remove and re-enumerate devices on ERR_FATAL (Keith Busch) - Notify all drivers that may be affected by error recovery resets (Keith Busch) - Always generate error recovery uevents, even if a driver doesn't have error callbacks (Keith Busch) - Make PCIe link active reporting detection generic (Keith Busch) - Support D3cold in PCIe hierarchies during system sleep and runtime, including hotplug and Thunderbolt ports (Mika Westerberg) - Handle hpmemsize/hpiosize kernel parameters uniformly, whether slots are empty or occupied (Jon Derrick) - Remove duplicated include from pci/pcie/err.c and unused variable from cpqphp (YueHaibing) - Remove driver pci_cleanup_aer_uncorrect_error_status() calls (Oza Pawandeep) - Uninline PCI bus accessors for better ftracing (Keith Busch) - Remove unused AER Root Port .error_resume method (Keith Busch) - Use kfifo in AER instead of a local version (Keith Busch) - Use threaded IRQ in AER bottom half (Keith Busch) - Use managed resources in AER core (Keith Busch) - Reuse pcie_port_find_device() for AER injection (Keith Busch) - Abstract AER interrupt handling to disconnect error injection (Keith Busch) - Refactor AER injection callbacks to simplify future improvments (Keith Busch) * pci/hotplug: PCI/AER: Refactor error injection fallbacks PCI/AER: Abstract AER interrupt handling PCI/AER: Reuse existing pcie_port_find_device() interface PCI/AER: Use managed resource allocations PCI/AER: Use threaded IRQ for bottom half PCI/AER: Use kfifo_in_spinlocked() to insert locked elements PCI/AER: Use kfifo for tracking events instead of reimplementing it PCI/AER: Remove error source from AER struct aer_rpc PCI/AER: Remove unused aer_error_resume() PCI: Uninline PCI bus accessors for better ftracing PCI/AER: Remove pci_cleanup_aer_uncorrect_error_status() calls PCI: pnv_php: Use kmemdup() PCI: cpqphp: Remove set but not used variable 'physical_slot' PCI/ERR: Remove duplicated include from err.c PCI: Equalize hotplug memory and io for occupied and empty slots PCI / ACPI: Whitelist D3 for more PCIe hotplug ports ACPI / property: Allow multiple property compatible _DSD entries PCI/PME: Implement runtime PM callbacks PCI: pciehp: Implement runtime PM callbacks PCI/portdrv: Add runtime PM hooks for port service drivers PCI/portdrv: Resume upon exit from system suspend if left runtime suspended PCI: pciehp: Do not handle events if interrupts are masked PCI: pciehp: Disable hotplug interrupt during suspend PCI / ACPI: Enable wake automatically for power managed bridges PCI: Do not skip power-managed bridges in pci_enable_wake() PCI: Make link active reporting detection generic PCI: Unify device inaccessible PCI/ERR: Always report current recovery status for udev PCI/ERR: Simplify broadcast callouts PCI/ERR: Run error recovery callbacks for all affected devices PCI/ERR: Handle fatal error recovery PCI/ERR: Use slot reset if available PCI/AER: Don't read upstream ports below fatal errors PCI/AER: Take reference on error devices PCI/DPC: Save and restore config state PCI: portdrv: Restore PCI config state on slot reset PCI: portdrv: Initialize service drivers directly PCI: hotplug: Document TODOs PCI: hotplug: Embed hotplug_slot PCI: hotplug: Drop hotplug_slot_info PCI: hotplug: Constify hotplug_slot_ops PCI: pciehp: Reshuffle controller struct for clarity PCI: pciehp: Rename controller struct members for clarity PCI: pciehp: Unify controller and slot structs PCI: pciehp: Tolerate Presence Detect hardwired to zero PCI: pciehp: Drop hotplug_slot_ops wrappers PCI: pciehp: Drop unnecessary includes PCI: pciehp: Differentiate between surprise and safe removal PCI: Simplify disconnected marking
2018-10-20Merge branch 'pci/enumeration'Bjorn Helgaas2-1/+17
- Remove x86 and arm64 node-local allocation for host bridge structures (Punit Agrawal) - Pay attention to device-specific _PXM node values (Jonathan Cameron) - Support new Immediate Readiness bit (Felipe Balbi) * pci/enumeration: PCI: Add support for Immediate Readiness ACPI/PCI: Pay attention to device-specific _PXM node values x86/PCI: Remove node-local allocation when initialising host controller arm64: PCI: Remove node-local allocations when initialising host controller
2018-10-18PCI/AER: Refactor error injection fallbacksKeith Busch1-28/+38
Move the bus ops fallback into separate functions. No functional change here. Signed-off-by: Keith Busch <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2018-10-18PCI/AER: Abstract AER interrupt handlingKeith Busch3-7/+5
The aer_inject module was directly calling aer_irq(). This required the AER driver export its private IRQ handler for no other reason than to support error injection. A driver should not have to expose its private interfaces, so use the IRQ subsystem to route injection to the AER driver, and make aer_irq() a private interface. This provides additional benefits: First, directly calling the IRQ handler bypassed the IRQ subsytem so the injection wasn't really synthesizing what happens if a shared AER interrupt occurs. The error injection had to provide the callback data directly, which may be racing with a removal that is freeing that structure. The IRQ subsystem can handle that race. Finally, using the IRQ subsystem automatically reacts to threaded IRQs, keeping the error injection abstracted from that implementation detail. Signed-off-by: Keith Busch <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2018-10-18PCI/AER: Reuse existing pcie_port_find_device() interfaceKeith Busch2-21/+5
The port services driver already provides a method to find the pcie_device for a service. Export that function, use it from the aer_inject module, and remove the duplicate functionality. Signed-off-by: Keith Busch <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2018-10-18PCI/AER: Use managed resource allocationsKeith Busch1-12/+5
Use the managed device resource allocations for the service data so the AER driver doesn't need to manage it, further simplifying this driver. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Keith Busch <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2018-10-18PCI: pcie: Remove redundant 'default n' from KconfigBartlomiej Zolnierkiewicz1-4/+0
'default n' is the default value for any bool or tristate Kconfig setting so there is no need to write it explicitly. Also since commit f467c5640c29 ("kconfig: only write '# CONFIG_FOO is not set' for visible symbols") the Kconfig behavior is the same regardless of 'default n' being present or not: ... One side effect of (and the main motivation for) this change is making the following two definitions behave exactly the same: config FOO bool config FOO bool default n With this change, neither of these will generate a '# CONFIG_FOO is not set' line (assuming FOO isn't selected/implied). That might make it clearer to people that a bare 'default n' is redundant. ... Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2018-10-18PCI: aardvark: Implement emulated root PCI bridge config spaceZachary Zhang2-3/+127
The PCI controller in the Marvell Armada 3720 does not implement a software-accessible root port PCI bridge configuration space. This causes a number of problems when using PCIe switches or when the Max Payload size needs to be aligned between the root complex and the endpoint. Implementing an emulated root PCI bridge, like is already done in the pci-mvebu driver for older Marvell platforms allows to solve those issues, and also to support features such as ASR, PME, VC, HP. Signed-off-by: Zachary Zhang <[email protected]> [Thomas: convert to the common emulated PCI bridge logic.] Signed-off-by: Thomas Petazzoni <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-18PCI: mvebu: Convert to PCI emulated bridge config spaceThomas Petazzoni2-270/+101
Convert the pci-mvebu driver to use the pci-bridge-emul logic, that helps emulating a root port PCI bridge configuration space. Signed-off-by: Thomas Petazzoni <[email protected]> [[email protected]: updated commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-18PCI: mvebu: Drop unused PCI express capability codeThomas Petazzoni1-14/+0
Commit dc0352ab0b2a0 ("PCI: mvebu: Add PCI Express root complex capability block") added support for emulating the PCI Express capability block. As part of this, the pcie_sltcap, pcie_devctl and pcie_rtctl fields were added to the mvebu_sw_pci_bridge structure, and used when reading the corresponding PCI Express capability block registers. However, those structure members are never set to any value other than zero. This makes them unneeded because: - pcie_devctl is used to OR *value, so with pcie_devctl always zero, it has no effect. - for pcie_sltcap and pcie_rtstl, the mvebu_sw_pci_bridge_read() function always returns 0 for registers that are not explicitly handled. In preparation for reworking the PCI bridge emulation logic in pci-mvebu, let's simplify the code by dropping those structure members. Signed-off-by: Thomas Petazzoni <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-18PCI: Introduce PCI bridge emulated config space common logicThomas Petazzoni4-0/+536
Some PCI host controllers do not expose a configuration space for the root port PCI bridge. Due to this, the Marvell Armada 370/38x/XP PCI controller driver (pci-mvebu) emulates a root port PCI bridge configuration space, and uses that to (among other things) dynamically create the memory windows that correspond to the PCI MEM and I/O regions. Since we now need to add a very similar logic for the Marvell Armada 37xx PCI controller driver (pci-aardvark), instead of duplicating the code, we create in this commit a common logic called pci-bridge-emul. The idea of this logic is to emulate a root port PCI bridge configuration space by providing configuration space read/write operations, and faking behind the scenes the configuration space of a PCI bridge. A PCI host controller driver simply has to call pci_bridge_emul_conf_read() and pci_bridge_emul_conf_write() to read/write the configuration space of the bridge. By default, the PCI bridge configuration space is simply emulated by a chunk of memory, but the PCI host controller can override the behavior of the read and write operations on a per-register basis to do additional actions if needed. We take care of complying with the behavior of the PCI configuration space registers in terms of bits that are read-write, read-only, reserved and write-1-to-clear. Signed-off-by: Thomas Petazzoni <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Reviewed-by: Russell King <[email protected]>
2018-10-18PCI: vmd: Detach resources after stopping root busJon Derrick1-1/+1
The VMD removal path calls pci_stop_root_busi(), which tears down the pcie tree, including detaching all of the attached drivers. During driver detachment, devices may use pci_release_region() to release resources. This path relies on the resource being accessible in resource tree. By detaching the child domain from the parent resource domain prior to stopping the bus, we are preventing the list traversal from finding the resource to be freed. If we instead detach the resource after stopping the bus, we will have properly freed the resource and detaching is simply accounting at that point. Without this order, the resource is never freed and is orphaned on VMD removal, leading to a warning: [ 181.940162] Trying to free nonexistent resource <e5a10000-e5a13fff> Fixes: 2c2c5c5cd213 ("x86/PCI: VMD: Attach VMD resources to parent domain's resource tree") Signed-off-by: Jon Derrick <[email protected]> [[email protected]: updated commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Keith Busch <[email protected]>
2018-10-17PCI/P2PDMA: Introduce configfs/sysfs enable attribute helpersLogan Gunthorpe1-0/+82
Users of the P2PDMA infrastructure will typically need a way for the user to tell the kernel to use P2P resources. Typically this will be a simple on/off boolean operation but sometimes it may be desirable for the user to specify the exact device to use for the P2P operation. Add new helpers for attributes which take a boolean or a PCI device. Any boolean as accepted by strtobool() turn P2P on or off (such as 'y', 'n', '1', '0', etc). Specifying a full PCI device name/BDF will select the specific device. Signed-off-by: Logan Gunthorpe <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]>
2018-10-17PCI/P2PDMA: Add PCI p2pmem DMA mappings to adjust the bus offsetLogan Gunthorpe1-0/+43
The DMA address used when mapping PCI P2P memory must be the PCI bus address. Thus, introduce pci_p2pmem_map_sg() to map the correct addresses when using P2P memory. Memory mapped in this way does not need to be unmapped and thus if we provided pci_p2pmem_unmap_sg() it would be empty. This breaks the expected balance between map/unmap but was left out as an empty function doesn't really provide any benefit. In the future, if this call becomes necessary it can be added without much difficulty. For this, we assume that an SGL passed to these functions contain all P2P memory or no P2P memory. Signed-off-by: Logan Gunthorpe <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]>
2018-10-17PCI/P2PDMA: Add sysfs group to display p2pmem statsLogan Gunthorpe1-0/+54
Add a sysfs group to display statistics about P2P memory that is registered in each PCI device. Attributes in the group display the total amount of P2P memory, the amount available and whether it is published or not. Signed-off-by: Logan Gunthorpe <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]>
2018-10-17PCI: mediatek: Add loadable kernel module supportHonghui Zhang2-5/+57
Implement remove() callback function for the Mediatek PCIe controller driver to add loadable kernel module support. Save the PCIe's GIC IRQ at probe so that it can be retrieved to call dispose_irq() to tear down the IRQ upon module removal. Signed-off-by: Honghui Zhang <[email protected]> [[email protected]: updated commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Ryder Lee <[email protected]>
2018-10-17PCI: mediatek: Add system PM support for MT2712 and MT7622Honghui Zhang1-0/+50
In order to reduce the PCIe power consumption in system suspend, the PCI bus physical layer should be gated. On system resume, the PCIe link should be re-established and the related control register values should be restored. Define suspend_noirq & resume_noirq callback functions to implement PM system syspend hooks for the PCI host controller. Signed-off-by: Honghui Zhang <[email protected]> [[email protected]: updated commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Ryder Lee <[email protected]>
2018-10-17PCI: mediatek: Fixup MSI enablement logic by enabling MSI before clocksHonghui Zhang1-71/+72
Commit 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and MT7622") added MSI support but enabled MSI in the wrong place, at a step in the probe sequence where clocks were not still enabled. Fix this issue by calling mtk_pcie_enable_msi() in mtk_pcie_startup_port_v2() since clocks are enabled when mtk_pcie_startup_port_v2() is called. To avoid forward declaration of mtk_pcie_enable_msi(), move the mtk_pcie_startup_port_v2() function definition in the file. Fixes: 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and MT7622") Signed-off-by: Honghui Zhang <[email protected]> [[email protected]: squashed commit and adapted log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Ryder Lee <[email protected]>
2018-10-17PCI: mediatek: Convert to use pci_host_probe()Honghui Zhang1-29/+8
Part of mtk_pcie_register_host() is an open-coded version of pci_host_probe(). So instead of duplicating this code, use pci_host_probe() directly and remove mtk_pcie_register_host(). Signed-off-by: Honghui Zhang <[email protected]> [[email protected]: commit log changes] Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Ryder Lee <[email protected]>
2018-10-17PCI: mediatek: Remove the redundant dev->pm_domain checkHonghui Zhang1-12/+6
There is no need to check whether device have a PM domain attached before calling the PM runtime methods. Remove it. Signed-off-by: Honghui Zhang <[email protected]> [[email protected]: commit log changes] Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Ryder Lee <[email protected]>
2018-10-17PCI: keystone: Cleanup macros defined in pci-keystone.cKishon Vijay Abraham I1-25/+16
No functional change. Cleanup macros defined in pci-keystone.c by removing unused macros, grouping the macros and aligning it properly. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Reorder header file in alphabetical orderKishon Vijay Abraham I1-4/+4
No functional change. Reorder header file in alphabetical order. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Add debug error message for all errorsKishon Vijay Abraham I1-9/+23
commit 025dd3daeda77f61a280da87ae701 ("PCI: keystone: Add error IRQ handler") added dev_err() message only for ERR_AXI and ERR_FATAL. Add debug error message for ERR_SYS, ERR_NONFATAL, ERR_CORR and ERR_AER here. While at that avoid using ERR_IRQ_STATUS_RAW and use ERR_IRQ_STATUS instead. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get ↵Kishon Vijay Abraham I1-2/+1
interrupt status Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get interrupt status. ERR_IRQ_STATUS_RAW has the status of the interrupts before masking whereas ERR_IRQ_STATUS has the status of the interrupts after masking. Since all the interrupts are unmasked here, use ERR_IRQ_STATUS. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Cleanup ks_pcie_link_up()Kishon Vijay Abraham I2-8/+7
ks_pcie_link_up() uses registers from the designware core to get the status of the link. Move the register defines to pcie-designware.h and cleanup ks_pcie_link_up(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Cleanup set_dbi_mode() and get_dbi_mode()Kishon Vijay Abraham I1-5/+7
No functional change. Use BIT() macro for DBI_CS2 and cleanup set_dbi_mode() and get_dbi_mode(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Cleanup outbound window configurationKishon Vijay Abraham I1-15/+17
Outbound translation window is configured in order to access the PCIe card's MEM space. Cleanup outbound translation configuration here by using BIT() macros, adding a macro for window size and using lower_32_bits/upper_32_bits macros for configuring the 64 bit offset in the outbound translation region. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Get number of outbound windows from DTKishon Vijay Abraham I1-2/+11
Instead of having a fixed outbound window count, get the number of outbound windows from the device tree. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Cleanup configuration space accessKishon Vijay Abraham I1-50/+20
Cleanup configuration space access by removing ks_pcie_cfg_setup() which has an unncessary check of "if (bus == 0)" which will never be the case of *_other_conf() and adding macros for configuring the CFG_SETUP register required for accessing the configuration space of the device. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Invoke runtime PM APIs to enable clockKishon Vijay Abraham I1-16/+12
Invoke runtime PM APIs to enable clocks and remove explicit clock enabling using clk_prepare_enable(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Cleanup PHY handlingKishon Vijay Abraham I1-16/+106
Cleanup PHY handling by using devm_phy_optional_get() to get PHYs if the PHYs are optional, creating a device link between the PHY device and the controller device and disable PHY on error cases here. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Use SYSCON APIs to get device ID from control moduleKishon Vijay Abraham I1-13/+32
Control module registers should be read using syscon APIs. pci-keystone.c uses platform_get_resource() to get control module registers. Fix it here by using syscon APIs to get device id from control module. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Use uniform function naming conventionKishon Vijay Abraham I1-110/+111
No functional change. Some function names begin with ks_dw_pcie_* and some function names begin with ks_pcie_*. Modify it so that all function names begin with ks_pcie_*. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Remove redundant platform_set_drvdata() invocationKishon Vijay Abraham I1-2/+0
No functional change. Remove redundant platform_set_drvdata() invocation in ks_pcie_probe(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Merge pci-keystone-dw.c and pci-keystone.cKishon Vijay Abraham I4-541/+489
No functional change. Having two different files for keystone PCI driver doesn't serve any purpose. Merge pci-keystone-dw.c and pci-keystone.c into a single pci-keystone.c file and remove pci-keystone.h. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Remove unused argument from ks_dw_pcie_host_init()Kishon Vijay Abraham I3-5/+3
No functional change. Remove unused "msi_intc_np" argument from ks_dw_pcie_host_init(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Do not initiate link training multiple timesKishon Vijay Abraham I1-6/+4
commit 886bc5ceb5cc3ad4b219502d72 ("PCI: designware: Add generic dw_pcie_wait_for_link()") while adding a generic dw_pcie_wait_for_link() performed a special handling (initiate link training multiple times) for keystone which is not required. This also resulted in unncessarily waiting for more time to establish the link even when no PCI device is connected. Remove it and make it look similar to other dwc based PCIe drivers. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Move dw_pcie_setup_rc() out of ks_pcie_establish_link()Kishon Vijay Abraham I1-3/+2
No functional change. Move dw_pcie_setup_rc() out of ks_pcie_establish_link() so that ks_pcie_establish_linki() can be used only to start the link. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Use quirk to set MRRS for PCI host bridgeKishon Vijay Abraham I1-22/+15
Reuse the already existing quirk to set MRRS for PCI host bridge instead of explicitly setting MRRS in ks_pcie_host_init(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-17PCI: keystone: Use quirk to limit MRRS for K2GKishon Vijay Abraham I1-0/+3
PCI controller in K2G also has a limitation that memory read request size (MRRS) must not exceed 256 bytes. Use the quirk to limit MRRS (added for K2HK, K2L and K2E) for K2G as well. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-10-15PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCIHonghui Zhang1-1/+1
commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") erroneously set the class type for MT7622 to PCI_CLASS_BRIDGE_HOST. The PCIe controller of MT7622 integrates a Root Port that has type 1 configuration space header and related bridge windows. The HW default value of this bridge's class type is invalid. Fix its class type and set it to PCI_CLASS_BRIDGE_PCI to match the hardware implementation. Fixes: 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") Signed-off-by: Honghui Zhang <[email protected]> [[email protected]: reworked the commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Ryder Lee <[email protected]>
2018-10-15PCI: mediatek: Fix mtk_pcie_find_port() endpoint/port matching logicHonghui Zhang1-0/+11
The Mediatek's host controller has two slots, each with its own control registers. The host driver needs to identify what slot is connected to what port in order to access the device's configuration space. Current code retrieving slot connected to a given endpoint device. Assuming each slot is connected to one endpoint device as below: host bridge bus 0 --> __________|_______ | | | | slot 0 slot 1 bus 1 -->| bus 2 --> | | | EP 0 EP 1 During PCI enumeration, system software will scan all the PCI devices on every bus starting from devfn 0. Using PCI_SLOT(devfn) for matching an endpoint to its slot is erroneous in that the devfn does not contain the hierarchical bus numbering in it. In order to match an endpoint with its slot (and related port), the PCI tree must be walked up to the root bus (where the root ports are situated) and then the PCI_SLOT(devfn) matching logic can be correctly applied for matching. This patch fixes the mtk_pcie_find_port() slot matching logic by adding appropriate PCI tree walking code to retrieve the slot/port a given endpoint is connected to. Signed-off-by: Honghui Zhang <[email protected]> [[email protected]: rewrote the commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Ryder Lee <[email protected]>
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