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2023-10-24PCI/MSI: Use FIELD_GET/PREP()Ilpo Järvinen1-4/+6
Instead of custom masking and shifting, use FIELD_GET/PREP() with register fields. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-24PCI/DPC: Use defines with DPC reason fieldsIlpo Järvinen1-10/+17
Add new defines for DPC reason fields and use them instead of literals. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> [bhelgaas: shorten comments] Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-24PCI/DPC: Use defined fields with DPC_CTL registerIlpo Järvinen1-3/+7
Instead of using a literal to clear bits, add PCI_EXP_DPC_CTL_EN_MASK and use the usual pattern to modify a bitfield. While at it, rearrange RMW code more logically together. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-24PCI/DPC: Use FIELD_GET()Bjorn Helgaas2-3/+4
Use FIELD_GET() to remove dependencies on the field position, i.e., the shift value. No functional change intended. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-24PCI: hotplug: Use FIELD_GET/PREP()Ilpo Järvinen3-4/+7
Instead of handcrafted shifts to handle register fields, use FIELD_GET/FIELD_PREP(). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-24PCI: dwc: Use FIELD_GET/PREP()Ilpo Järvinen2-6/+11
Convert open-coded variants of PCI field access into FIELD_GET/PREP() to make the code easier to understand. Add two missing defines into pci_regs.h. Logically, the Max No-Snoop Latency Register is a separate word sized register in the PCIe spec, but the pre-existing LTR defines in pci_regs.h with dword long values seem to consider the registers together (the same goes for the only user). Thus, follow the custom and make the new values also take both word long LTR registers as a joint dword register. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-23PCI/P2PDMA: Remove redundant gotoTadeusz Struk1-1/+0
Remove redundant goto in pci_alloc_p2pmem(). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Tadeusz Struk <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Logan Gunthorpe <[email protected]>
2023-10-23PCI: rcar-gen4: Add endpoint mode supportYoshihiro Shimoda2-4/+164
Add R-Car Gen4 PCIe controller for endpoint mode. This controller is based on Synopsys DesignWare PCIe. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-23PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host modeYoshihiro Shimoda3-0/+393
Add R-Car Gen4 PCIe controller support for host mode. This controller is based on Synopsys DesignWare PCIe. However, this particular controller has a number of vendor-specific registers, and as such, requires initialization code like mode setting and retraining and so on. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-23PCI: dwc: endpoint: Introduce .pre_init() and .deinit()Yoshihiro Shimoda2-1/+13
Renesas R-Car Gen4 PCIe controllers require vendor-specific initialization before .init(). To use dw->dbi and dw->num-lanes in the initialization code, introduce .pre_init() into struct dw_pcie_ep_ops. While at it, also introduce .deinit() to disable the controller by using vendor-specific de-initialization. Note that the ep_init in the struct dw_pcie_ep_ops should be renamed to init later. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-23PCI: dwc: Expose dw_pcie_write_dbi2() to moduleYoshihiro Shimoda1-0/+1
Since no PCIe controller drivers call this, this change is not required for now. But, Renesas R-Car Gen4 PCIe controller driver will call this and if the controller driver is built as a kernel module, the following build error happens: ERROR: modpost: "dw_pcie_write_dbi2" [drivers/pci/controller/dwc/pcie-rcar-gen4-host-drv.ko] undefined! So, expose dw_pcie_write_dbi2() for it. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-20PCI: dwc: Expose dw_pcie_ep_exit() to moduleYoshihiro Shimoda1-0/+1
Since no PCIe controller drivers call this, this change is not required for now. But, Renesas R-Car Gen4 PCIe controller driver will call this and if the controller driver is built as a kernel module, the following build error happens: ERROR: modpost: "dw_pcie_ep_exit" [drivers/pci/controller/dwc/pcie-rcar-gen4-ep-drv.ko] undefined! So, expose dw_pcie_ep_exit() for it. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-20PCI: dwc: Add EDMA_UNROLL capability flagYoshihiro Shimoda2-3/+10
Renesas R-Car Gen4 PCIe controllers have an unexpected register value in the eDMA CTRL register. So, add a new capability flag "EDMA_UNROLL" which would force the unrolled eDMA mapping for the problematic device. Suggested-by: Serge Semin <[email protected]> Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-20PCI: dwc: endpoint: Add multiple PFs support for dbi2Yoshihiro Shimoda2-8/+25
The commit 24ede430fa49 ("PCI: designware-ep: Add multiple PFs support for DWC") added .func_conf_select() to get the configuration space of different PFs and assumed that the offsets between dbi and dbi2 would be the same. However, Renesas R-Car Gen4 PCIe controllers have different offsets of function 1: dbi (+0x1000) and dbi2 (+0x800). To get the offset for dbi2, add .get_dbi2_offset() and dw_pcie_ep_get_dbi2_offset(). Note: - .func_conf_select() should be renamed later. - dw_pcie_ep_get_dbi2_offset() will call .func_conf_select() if .get_dbi2_offset() doesn't exist for backward compatibility. - dw_pcie_writeX_{dbi/dbi2} APIs accepted the func_no argument, so that these offset calculations are contained in the API definitions itself as it should. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]>
2023-10-20PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW settingYoshihiro Shimoda1-6/+0
dw_pcie_setup() is already setting PCI_EXP_LNKCAP_MLW to pcie->num_lanes in the PCI_EXP_LNKCAP register for programming maximum link width. Hence, remove the redundant setting here. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]> Cc: Thierry Reding <[email protected]> Cc: Jonathan Hunter <[email protected]>
2023-10-20PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handlingYoshihiro Shimoda1-1/+8
Update dw_pcie_link_set_max_link_width() to set PCI_EXP_LNKCAP_MLW. In accordance with the DW PCIe RC/EP HW manuals [1,2,3,...] aside with the PORT_LINK_CTRL_OFF.LINK_CAPABLE and GEN2_CTRL_OFF.NUM_OF_LANES[8:0] field there is another one which needs to be updated. It's LINK_CAPABILITIES_REG.PCIE_CAP_MAX_LINK_WIDTH. If it isn't done at the very least the maximum link-width capability CSR won't expose the actual maximum capability. [1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 4.60a, March 2015, p.1032 [2] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 4.70a, March 2016, p.1065 [3] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 4.90a, March 2016, p.1057 ... [X] DesignWare Cores PCI Express Controller Databook - DWC PCIe Endpoint, Version 5.40a, March 2019, p.1396 [X+1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 5.40a, March 2019, p.1266 Suggested-by: Serge Semin <[email protected]> Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-20PCI: dwc: Add dw_pcie_link_set_max_link_width()Yoshihiro Shimoda1-45/+41
This is a preparation before adding the Max-Link-width capability setup which would in its turn complete the max-link-width setup procedure defined by Synopsys in the HW-manual. Seeing there is a max-link-speed setup method defined in the DW PCIe core driver it would be good to have a similar function for the link width setup. That's why we need to define a dedicated function first from already implemented but incomplete link-width setting up code. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-20PCI: Add T_PVPERL macroYoshihiro Shimoda1-0/+3
According to the PCIe CEM r5.0, sec 2.9.2, Power stable to PERST# inactive interval is 100 ms as minimum. Add a macro so that the PCIe controller drivers can make use of it. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Reviewed-by: Serge Semin <[email protected]>
2023-10-18PCI: Disable ATS for specific Intel IPU E2000 devicesBartosz Pawlowski1-0/+19
Due to a hardware issue in A and B steppings of Intel IPU E2000, it expects wrong endianness in ATS invalidation message body. This problem can lead to outdated translations being returned as valid and finally cause system instability. To prevent such issues, add quirk_intel_e2000_no_ats() to disable ATS for vulnerable IPU E2000 devices. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bartosz Pawlowski <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Reviewed-by: Alexander Lobakin <[email protected]>
2023-10-18PCI: Extract ATS disabling to a helper functionBartosz Pawlowski1-7/+9
Introduce quirk_no_ats() helper function to provide a standard way to disable ATS capability in PCI quirks. Suggested-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bartosz Pawlowski <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]>
2023-10-18PCI: cadence: Use FIELD_GET()Ilpo Järvinen1-4/+5
Convert open-coded variants of PCI field access into FIELD_GET() to make the code easier to understand. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-17PCI: Use FIELD_GET() to extract Link WidthIlpo Järvinen2-6/+4
Use FIELD_GET() to extract PCIe Negotiated and Maximum Link Width fields instead of custom masking and shifting. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> [bhelgaas: drop duplicate include of <linux/bitfield.h>] Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]>
2023-10-14PCI: hv: Annotate struct hv_dr_state with __counted_byKees Cook1-1/+1
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct hv_dr_state. [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: "Gustavo A. R. Silva" <[email protected]> Acked-by: Wei Liu <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Dexuan Cui <[email protected]> Cc: Haiyang Zhang <[email protected]> Cc: "K. Y. Srinivasan" <[email protected]> Cc: Krzysztof Wilczyński <[email protected]> Cc: Lorenzo Pieralisi <[email protected]> Cc: Rob Herring <[email protected]> Cc: Wei Liu <[email protected]> Cc: [email protected] Cc: [email protected]
2023-10-14PCI: qcom: Enable ASPM for platforms supporting 1.9.0 opsManivannan Sadhasivam1-0/+28
ASPM is supported by Qcom host controllers/bridges on most of the recent platforms and so the devices tested so far. But for enabling ASPM by default (without using Kconfig, kernel command-line or sysfs), BIOS has to enable ASPM on both host bridge and downstream devices during boot. Unfortunately, none of the BIOS available on Qcom platforms enables ASPM. Due to this, the platforms making use of Qcom SoCs draw high power during runtime. To fix this power draw issue, users have to enable ASPM using Kconfig, kernel command-line, sysfs or the BIOS has to start enabling ASPM. The latter may happen in the future, but that won't address the issue on current platforms. Also, asking users to enable a feature to get the power management right would provide an unpleasant out-of-the-box experience. So the apt solution is to enable ASPM in the controller driver itself. And this is being accomplished by calling pci_enable_link_state() in the newly introduced host_post_init() callback for all the devices connected to the bus. This function enables all supported link low power states for both host bridge and the downstream devices. Due to limited testing, ASPM is only enabled for platforms making use of ops_1_9_0 callbacks. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]>
2023-10-14PCI: dwc: Add host_post_init() callbackManivannan Sadhasivam2-0/+4
This callback can be used by the platform drivers to do configuration once all the devices are scanned. Like changing LNKCTL of all downstream devices to enable ASPM etc... Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]>
2023-10-14PCI: tegra194: Use Mbps_to_icc() macro for setting icc speedManivannan Sadhasivam1-2/+2
PCIe speed returned by the PCIE_SPEED2MBS_ENC() macro is in Mbps. So instead of converting it to MBps explicitly and using the MBps_to_icc() macro, let's use the Mbps_to_icc() macro to pass the value directly. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Cc: Vidya Sagar <[email protected]>
2023-10-14PCI: qcom-ep: Use PCIE_SPEED2MBS_ENC() macro for encoding link speedManivannan Sadhasivam1-25/+6
Instead of hardcoding the link speed in MBps, use existing PCIE_SPEED2MBS_ENC() macro that does the encoding of the link speed for us. Also, let's Wrap it with QCOM_PCIE_LINK_SPEED_TO_BW() macro to do the conversion to ICC speed. This eliminates the need for a switch case in qcom_pcie_icc_update() and also works for future Gen speeds without any code modifications. Suggested-by: Bjorn Helgaas <[email protected]> Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]>
2023-10-14PCI: qcom: Use PCIE_SPEED2MBS_ENC() macro for encoding link speedManivannan Sadhasivam1-18/+6
Instead of hardcoding the link speed in MBps, use existing PCIE_SPEED2MBS_ENC() macro that does the encoding of the link speed for us. Also, let's Wrap it with QCOM_PCIE_LINK_SPEED_TO_BW() macro to do the conversion to ICC speed. This eliminates the need for a switch case in qcom_pcie_icc_update() and also works for future Gen speeds without any code modifications. Suggested-by: Bjorn Helgaas <[email protected]> Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]>
2023-10-10PCI: xgene: Do PCI error check on own line & keep return valueIlpo Järvinen1-3/+4
Instead of an "if" condition with a line split, use the usual error handling pattern with a separate variable to improve readability. pci_generic_config_read32() already returns either PCIBIOS_SUCCESSFUL or PCIBIOS_DEVICE_NOT_FOUND so it is enough to simply return its return value when ret != PCIBIOS_SUCCESSFUL. No functional changes intended. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI: Do error check on own line to split long "if" conditionsIlpo Järvinen3-9/+12
Placing PCI error code check inside "if" condition usually results in need to split lines. Combined with additional conditions the "if" condition becomes messy. Convert to the usual error handling pattern with an additional variable to improve code readability. In addition, reverse the logic in pci_find_vsec_capability() to get rid of &&. No functional changes intended. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> [bhelgaas: PCI_POSSIBLE_ERROR()] Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI/ASPM: Convert printk() to pr_*() and add includeIlpo Järvinen1-2/+3
Convert printk(KERN_INFO ...) to pr_info() and add the correct include for it. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI/ASPM: Remove unnecessary includesIlpo Järvinen1-2/+0
aspm.c does not use anything from delay.h nor jiffies.h so remove the includes. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI/ASPM: Use FIELD_MAX() instead of literalsIlpo Järvinen1-7/+7
Convert 0x3ff literals in encode_l12_threshold() to FIELD_MAX(PCI_L1SS_CTL1_LTR_L12_TH_VALUE) that explains the purpose of the literal. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI/ASPM: Use time constantsIlpo Järvinen1-6/+8
Use defined constants to convert between time units. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI/ASPM: Return U32_MAX instead of bit magic constructIlpo Järvinen1-2/+3
Instead of returning a bit obscure -1U, make code's intent of returning the maximum representable value more obvious by returning U32_MAX. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI/ASPM: Use FIELD_GET/PREP() to access PCIe capability fieldsIlpo Järvinen1-13/+18
Replace open-coded variants to access PCIe capability registers fields with FIELD_GET/PREP(). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-10PCI: mvebu: Use FIELD_PREP() with Link WidthIlpo Järvinen1-1/+1
mvebu_pcie_setup_hw() setups the Maximum Link Width field in the Link Capabilities registers using an open-coded variant of FIELD_PREP() with a literal in shift. Improve readability by using FIELD_PREP(PCI_EXP_LNKCAP_MLW, ...). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]>
2023-10-10PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fieldsIlpo Järvinen1-5/+4
Use FIELD_GET() to extract PCIe Negotiated Link Width field instead of custom masking and shifting. Similarly, change custom code that misleadingly used PCI_EXP_LNKSTA_NLW_SHIFT to prepare value for PCI_EXP_LNKCAP write to use FIELD_PREP() with correct field define (PCI_EXP_LNKCAP_MLW). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ilpo Järvinen <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]>
2023-10-10PCI: keystone: Don't discard .probe() callbackUwe Kleine-König1-2/+2
The __init annotation makes the ks_pcie_probe() function disappear after booting completes. However a device can also be bound later. In that case, we try to call ks_pcie_probe(), but the backing memory is likely already overwritten. The right thing to do is do always have the probe callback available. Note that the (wrong) __refdata annotation prevented this issue to be noticed by modpost. Fixes: 0c4ffcfe1fbc ("PCI: keystone: Add TI Keystone PCIe driver") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: [email protected]
2023-10-10PCI: keystone: Don't discard .remove() callbackUwe Kleine-König1-2/+2
With CONFIG_PCIE_KEYSTONE=y and ks_pcie_remove() marked with __exit, the function is discarded from the driver. In this case a bound device can still get unbound, e.g via sysfs. Then no cleanup code is run resulting in resource leaks or worse. The right thing to do is do always have the remove callback available. Note that this driver cannot be compiled as a module, so ks_pcie_remove() was always discarded before this change and modpost couldn't warn about this issue. Furthermore the __ref annotation also prevents a warning. Fixes: 0c4ffcfe1fbc ("PCI: keystone: Add TI Keystone PCIe driver") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: [email protected]
2023-10-10PCI: kirin: Don't discard .remove() callbackUwe Kleine-König1-2/+2
With CONFIG_PCIE_KIRIN=y and kirin_pcie_remove() marked with __exit, the function is discarded from the driver. In this case a bound device can still get unbound, e.g via sysfs. Then no cleanup code is run resulting in resource leaks or worse. The right thing to do is do always have the remove callback available. This fixes the following warning by modpost: drivers/pci/controller/dwc/pcie-kirin: section mismatch in reference: kirin_pcie_driver+0x8 (section: .data) -> kirin_pcie_remove (section: .exit.text) (with ARCH=x86_64 W=1 allmodconfig). Fixes: 000f60db784b ("PCI: kirin: Add support for a PHY layer") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: [email protected]
2023-10-10PCI: exynos: Don't discard .remove() callbackUwe Kleine-König1-2/+2
With CONFIG_PCI_EXYNOS=y and exynos_pcie_remove() marked with __exit, the function is discarded from the driver. In this case a bound device can still get unbound, e.g via sysfs. Then no cleanup code is run resulting in resource leaks or worse. The right thing to do is do always have the remove callback available. This fixes the following warning by modpost: WARNING: modpost: drivers/pci/controller/dwc/pci-exynos: section mismatch in reference: exynos_pcie_driver+0x8 (section: .data) -> exynos_pcie_remove (section: .exit.text) (with ARCH=x86_64 W=1 allmodconfig). Fixes: 340cba6092c2 ("pci: Add PCIe driver for Samsung Exynos") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Alim Akhtar <[email protected]> Cc: [email protected]
2023-10-10PCI: layerscape-ep: Set 64-bit DMA maskGuanhua Gao1-0/+2
Set DMA mask and coherent DMA mask to enable 64-bit addressing. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guanhua Gao <[email protected]> Signed-off-by: Hou Zhiqiang <[email protected]> Signed-off-by: Frank Li <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Acked-by: Manivannan Sadhasivam <[email protected]> Acked-by: Roy Zang <[email protected]>
2023-10-06PCI/sysfs: Enable 'boot_vga' attribute via pci_is_vga()Sui Jingfeng1-4/+3
Enable the 'boot_vga' sysfs attribute via pci_is_vga(). This exposes 'boot_vga' for old PCI_CLASS_NOT_DEFINED_VGA (0x0001) devices as well as for the PCI_CLASS_DISPLAY_VGA (0x0300) devices where it was previously exposed. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Sui Jingfeng <[email protected]> [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas <[email protected]> Cc: "Maciej W. Rozycki" <[email protected]>
2023-10-06PCI/VGA: Select VGA devices earlierSui Jingfeng1-6/+8
Select VGA devices in vga_arb_device_init() and pci_notify() instead of in vga_arbiter_add_pci_device(). This is a trivial optimization for adding devices. It's a bigger optimization for the removal case because pci_notify() won't call vga_arbiter_del_pci_device() for non-VGA devices, so it won't have to search the vga_list for them. https://lore.kernel.org/r/[email protected] Signed-off-by: Sui Jingfeng <[email protected]> [bhelgaas: commit log, split from functional change] Signed-off-by: Bjorn Helgaas <[email protected]>
2023-10-06PCI/VGA: Use pci_is_vga() to identify VGA devicesSui Jingfeng1-1/+1
Use pci_is_vga() to identify VGA devices, so the arbiter will handle old PCI_CLASS_NOT_DEFINED_VGA (0x0001) devices as well as the PCI_CLASS_DISPLAY_VGA (0x0300) devices it previously handled. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Sui Jingfeng <[email protected]> [bhelgaas: commit log, split functional change from optimization] Signed-off-by: Bjorn Helgaas <[email protected]> Cc: "Maciej W. Rozycki" <[email protected]>
2023-10-06PCI: Replace unnecessary UTF-8 in KconfigLiu Song1-1/+1
The CONFIG_PCI_P2PDMA Kconfig help text contains a Cyrillic small "Dze" (ѕ). When menuconfig renders it, it looks like "Enable ~U drivers" instead of "Enables drivers". Replace it by a plain "s" so the help text is displayed correctly by menuconfig. Uwe Kleine-König <[email protected]> later posted the same patch at https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Tested-by: Randy Dunlap <[email protected]> Signed-off-by: Liu Song <[email protected]> [bhelgaas: commit log, add Uwe's report] Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Randy Dunlap <[email protected]>
2023-10-06Merge tag 'pci-v6.6-fixes-2' of ↵Linus Torvalds4-19/+43
git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI fixes from Bjorn Helgaas: - Fix a qcom register offset that broke IPQ8074 PCIe controller enumeration (Sricharan Ramabadhran) - Handle interrupt parsing failures when creating a device tree node to avoid using uninitialized data (Lizhi Hou) - Clean up if adding PCI device node fails when creating a device tree node to avoid a memory leak (Lizhi Hou) - If a link is down, mark all downstream devices as "disconnected" so we don't wait for them on resume (Mika Westerberg) * tag 'pci-v6.6-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: PCI/PM: Mark devices disconnected if upstream PCIe link is down on resume PCI: of: Destroy changeset when adding PCI device node fails PCI: of_property: Handle interrupt parsing failures PCI: qcom: Fix IPQ8074 enumeration
2023-10-05PCI: endpoint: Use IS_ERR_OR_NULL() helper functionRuan Jinjie1-6/+6
Use the IS_ERR_OR_NULL() helper instead of open-coding a NULL and an error pointer checks to simplify the code and improve readability. No functional changes are intended. [kwilczynski: commit log] Signed-off-by: Ruan Jinjie <[email protected]> Signed-off-by: Krzysztof Wilczyński <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]>
2023-10-05PCI: Make pci_assign_unassigned_resources() non-initRandy Dunlap1-1/+1
Fix a section mismatch warning on Sparc 32-bit: WARNING: modpost: vmlinux: section mismatch in reference: leon_pci_init+0xf8 (section: .text) -> pci_assign_unassigned_resources (section: .init.text) This is due to this comment from arch/sparc/kernel/leon_pci.c: The LEON architecture does not rely on a BIOS or bootloader to setup PCI for us. The Linux generic routines are used to setup resources, reset values of configuration-space register settings are preserved. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Randy Dunlap <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: [email protected]
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