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2020-08-05Merge branch 'pci/switchtec'Bjorn Helgaas1-8/+8
- Add __iomem and __user tags to switchtec driver (Logan Gunthorpe) * pci/switchtec: PCI: switchtec: Add missing __iomem tag to fix sparse warnings PCI: switchtec: Add missing __iomem and __user tags to fix sparse warnings
2020-08-05Merge branch 'pci/virtualization'Bjorn Helgaas2-1/+21
- Remove redundant variable init in xen (Colin Ian King) - Add pci_pri_supported() to check device or associated PF for PRI support (Ashok Raj) - Mark AMD Navi10 GPU rev 0x00 ATS as broken (Kai-Heng Feng) - Release IVRS table in AMD ACS quirk (Hanjun Guo) * pci/virtualization: PCI: Release IVRS table in AMD ACS quirk PCI: Mark AMD Navi10 GPU rev 0x00 ATS as broken PCI/ATS: Add pci_pri_supported() to check device or associated PF xen: Remove redundant initialization of irq
2020-08-05Merge branch 'pci/peer-to-peer'Bjorn Helgaas1-6/+15
- Allow P2PDMA on AMD Zen and newer CPUs (Logan Gunthorpe) * pci/peer-to-peer: PCI/P2PDMA: Allow P2PDMA on AMD Zen and newer CPUs
2020-08-05Merge branch 'pci/msi'Bjorn Helgaas1-13/+9
- Forward MSI-X error code in pci_alloc_irq_vectors_affinity() (Piotr Stankiewicz) * pci/msi: PCI/MSI: Forward MSI-X error code in pci_alloc_irq_vectors_affinity()
2020-08-05Merge branch 'pci/misc'Bjorn Helgaas18-81/+43
- Convert PCIe capability PCIBIOS errors to errno (Bolarinwa Olayemi Saheed) - Align PCIe capability and PCI accessor return values (Bolarinwa Olayemi Saheed) - Replace http:// links with https:// (Alexander A. Klimov) - Replace lkml.org, spinics, gmane with lore.kernel.org (Bjorn Helgaas) - Update panic message to mention kzalloc(), not kmalloc() (Liao Pingfang) - Move PCI_VENDOR_ID_REDHAT definition to pci_ids.h (Huacai Chen) - Remove unused pci_lost_interrupt() (Heiner Kallweit) * pci/misc: PCI: Remove unused pci_lost_interrupt() PCI: Move PCI_VENDOR_ID_REDHAT definition to pci_ids.h PCI: Fix error in panic message PCI: Replace lkml.org, spinics, gmane with lore.kernel.org PCI: Replace http:// links with https:// PCI: Align PCIe capability and PCI accessor return values PCI: Convert PCIe capability PCIBIOS errors to errno
2020-08-05Merge branch 'pci/hotplug'Bjorn Helgaas2-5/+7
- Fix pci_create_slot() reference count leak in failure path (Qiushi Wu) - Make rpadlpar functions static (Wei Yongjun) * pci/hotplug: PCI: rpadlpar: Make functions static PCI: Fix pci_create_slot() reference count leak
2020-08-05Merge branch 'pci/error'Bjorn Helgaas5-36/+62
- Use pci_channel_state_t instead of enum pci_channel_state (Luc Van Oostenryck) - Simplify __aer_print_error() (Bjorn Helgaas) - Log AER correctable errors as warning, not error (Matt Jolly) - Rename pci_aer_clear_device_status() to pcie_clear_device_status() (Bjorn Helgaas) - Clear PCIe Device Status errors only if OS owns AER (Jonathan Cameron) * pci/error: PCI/ERR: Clear PCIe Device Status errors only if OS owns AER PCI/ERR: Rename pci_aer_clear_device_status() to pcie_clear_device_status() PCI/AER: Log correctable errors as warning, not error PCI/AER: Simplify __aer_print_error() PCI: Use 'pci_channel_state_t' instead of 'enum pci_channel_state'
2020-08-05Merge branch 'pci/enumeration'Bjorn Helgaas9-156/+159
- Fix pci_cfg_wait queue locking problem (Xiang Zheng, Bjorn Helgaas) - Keep device in system even if driver attach fails (Rajat Jain) - Cache ACS capability offset in device (Rajat Jain) - Treat "external-facing" devices themselves as internal, not external (Rajat Jain) - Announce device after early fixups (Tiezhu Yang) * pci/enumeration: PCI: Announce device after early fixups PCI: Treat "external-facing" devices themselves as internal PCI: Cache ACS capability offset in device PCI: Reorder pci_enable_acs() and dependencies PCI: Add device even if driver attach failed PCI: Fix pci_cfg_wait queue locking problem
2020-08-05PCI: Fix kerneldoc warningsKrzysztof Kozlowski14-11/+18
Fix kerneldoc warnings, e.g., $ make W=1 drivers/pci/ drivers/pci/ats.c:196: warning: Function parameter or member 'pdev' not described in 'pci_enable_pri' drivers/pci/ats.c:196: warning: Function parameter or member 'reqs' not described in 'pci_enable_pri' ... Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-08-05PCI: xilinx-cpm: Add Versal CPM Root Port driverBharat Kumar Gogada3-0/+623
Add support for Versal CPM as Root Port. The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated block for CPM along with the integrated bridge can function as PCIe Root Port. Bridge error and legacy interrupts in Versal CPM are handled using Versal CPM specific interrupt line. [bhelgaas: fold in kerneldoc fix from https://lore.kernel.org/linux-acpi/[email protected]/] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bharat Kumar Gogada <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Rob Herring <[email protected]>
2020-08-04Merge tag 'uninit-macro-v5.9-rc1' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux Pull uninitialized_var() macro removal from Kees Cook: "This is long overdue, and has hidden too many bugs over the years. The series has several "by hand" fixes, and then a trivial treewide replacement. - Clean up non-trivial uses of uninitialized_var() - Update documentation and checkpatch for uninitialized_var() removal - Treewide removal of uninitialized_var()" * tag 'uninit-macro-v5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: compiler: Remove uninitialized_var() macro treewide: Remove uninitialized_var() usage checkpatch: Remove awareness of uninitialized_var() macro mm/debug_vm_pgtable: Remove uninitialized_var() usage f2fs: Eliminate usage of uninitialized_var() macro media: sur40: Remove uninitialized_var() usage KVM: PPC: Book3S PR: Remove uninitialized_var() usage clk: spear: Remove uninitialized_var() usage clk: st: Remove uninitialized_var() usage spi: davinci: Remove uninitialized_var() usage ide: Remove uninitialized_var() usage rtlwifi: rtl8192cu: Remove uninitialized_var() usage b43: Remove uninitialized_var() usage drbd: Remove uninitialized_var() usage x86/mm/numa: Remove uninitialized_var() usage docs: deprecated.rst: Add uninitialized_var()
2020-08-04PCI: Set bridge map_irq and swizzle_irq to default functionsRob Herring21-37/+5
The majority of DT based host drivers use the default .map_irq() and .swizzle_irq() functions, so let's initialize the function pointers to the default and drop setting them in the host drivers. Drivers like iProc which don't support legacy interrupts need to set .map_irq() back to NULL. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Cc: Lorenzo Pieralisi <[email protected]> Cc: Bjorn Helgaas <[email protected]>
2020-08-04PCI: Move DT resource setup into devm_pci_alloc_host_bridge()Rob Herring23-143/+36
Now that pci_parse_request_of_pci_ranges() callers just setup pci_host_bridge.windows and dma_ranges directly and don't need the bus range returned, we can just initialize them when allocating the pci_host_bridge struct. With this, pci_parse_request_of_pci_ranges() becomes a static function. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Cc: Lorenzo Pieralisi <[email protected]> Cc: Bjorn Helgaas <[email protected]>
2020-08-04PCI: rcar-gen2: Convert to use modern host bridge probe functionsRob Herring1-126/+46
The rcar-gen2 host driver still uses the old Arm PCI setup function pci_common_init_dev(). Let's update it to use the modern devm_pci_alloc_host_bridge(), pci_parse_request_of_pci_ranges() and pci_host_probe() functions. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Yoshihiro Shimoda <[email protected]> Cc: Lorenzo Pieralisi <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: [email protected]
2020-08-03Merge tag 'acpi-5.9-rc1' of ↵Linus Torvalds2-6/+14
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI updates from Rafael Wysocki: "These eliminate significant AML processing overhead related to using operation regions in system memory, update the ACPICA code in the kernel to upstream revision 20200717 (including a fix to prevent operation region reference counts from overflowing in some cases), remove the last bits of the (long deprecated) ACPI procfs interface and do some assorted cleanups. Specifics: - Eliminate significant AML processing overhead related to using operation regions in system memory by reworking the management of memory mappings in the ACPI code to defer unmap operations (to do them outside of the ACPICA locks, among other things) and making the memory operation reagion handler avoid releasing memory mappings created by it too early (Rafael Wysocki). - Update the ACPICA code in the kernel to upstream revision 20200717: * Prevent operation region reference counts from overflowing in some cases (Erik Kaneda). * Replace one-element array with flexible-array (Gustavo A. R. Silva). - Fix ACPI PCI hotplug reference counting (Rafael Wysocki). - Drop last bits of the ACPI procfs interface (Thomas Renninger). - Drop some redundant checks from the code parsing ACPI tables related to NUMA (Hanjun Guo). - Avoid redundant object evaluation in the ACPI device properties handling code (Heikki Krogerus). - Avoid unecessary memory overhead related to storing the signatures of the ACPI tables recognized by the kernel (Ard Biesheuvel). - Add missing newline characters when printing module parameter values in some places (Xiongfeng Wang). - Update the link to the ACPI specifications in some places (Tiezhu Yang). - Use the fallthrough pseudo-keyword in the ACPI code (Gustavo A. R. Silva). - Drop redundant variable initialization from the APEI code (Colin Ian King). - Drop uninitialized_var() from the ACPI PAD driver (Jason Yan). - Replace HTTP links with HTTPS ones in the ACPI code (Alexander A. Klimov)" * tag 'acpi-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (22 commits) ACPI: APEI: remove redundant assignment to variable rc ACPI: NUMA: Remove the useless 'node >= MAX_NUMNODES' check ACPI: NUMA: Remove the useless sub table pointer check ACPI: tables: Remove the duplicated checks for acpi_parse_entries_array() ACPICA: Update version to 20200717 ACPICA: Do not increment operation_region reference counts for field units ACPICA: Replace one-element array with flexible-array ACPI: Replace HTTP links with HTTPS ones ACPI: Use valid link to the ACPI specification ACPI: OSL: Clean up the removal of unused memory mappings ACPI: OSL: Use deferred unmapping in acpi_os_unmap_iomem() ACPI: OSL: Use deferred unmapping in acpi_os_unmap_generic_address() ACPICA: Preserve memory opregion mappings ACPI: OSL: Implement deferred unmapping of ACPI memory ACPI: Use fallthrough pseudo-keyword PCI: hotplug: ACPI: Fix context refcounting in acpiphp_grab_context() ACPI: tables: avoid relocations for table signature array ACPI: PAD: Eliminate usage of uninitialized_var() macro ACPI: sysfs: add newlines when printing module parameters ACPI: EC: add newline when printing 'ec_event_clearing' module parameter ...
2020-08-03Merge tag 'sched-core-2020-08-03' of ↵Linus Torvalds1-1/+4
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler updates from Ingo Molnar: - Improve uclamp performance by using a static key for the fast path - Add the "sched_util_clamp_min_rt_default" sysctl, to optimize for better power efficiency of RT tasks on battery powered devices. (The default is to maximize performance & reduce RT latencies.) - Improve utime and stime tracking accuracy, which had a fixed boundary of error, which created larger and larger relative errors as the values become larger. This is now replaced with more precise arithmetics, using the new mul_u64_u64_div_u64() helper in math64.h. - Improve the deadline scheduler, such as making it capacity aware - Improve frequency-invariant scheduling - Misc cleanups in energy/power aware scheduling - Add sched_update_nr_running tracepoint to track changes to nr_running - Documentation additions and updates - Misc cleanups and smaller fixes * tag 'sched-core-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (54 commits) sched/doc: Factorize bits between sched-energy.rst & sched-capacity.rst sched/doc: Document capacity aware scheduling sched: Document arch_scale_*_capacity() arm, arm64: Fix selection of CONFIG_SCHED_THERMAL_PRESSURE Documentation/sysctl: Document uclamp sysctl knobs sched/uclamp: Add a new sysctl to control RT default boost value sched/uclamp: Fix a deadlock when enabling uclamp static key sched: Remove duplicated tick_nohz_full_enabled() check sched: Fix a typo in a comment sched/uclamp: Remove unnecessary mutex_init() arm, arm64: Select CONFIG_SCHED_THERMAL_PRESSURE sched: Cleanup SCHED_THERMAL_PRESSURE kconfig entry arch_topology, sched/core: Cleanup thermal pressure definition trace/events/sched.h: fix duplicated word linux/sched/mm.h: drop duplicated words in comments smp: Fix a potential usage of stale nr_cpus sched/fair: update_pick_idlest() Select group with lowest group_util when idle_cpus are equal sched: nohz: stop passing around unused "ticks" parameter. sched: Better document ttwu() sched: Add a tracepoint to track rq->nr_running ...
2020-08-03Merge tag 'irq-urgent-2020-08-02' of ↵Linus Torvalds1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Ingo Molnar: "Fix a recent IRQ affinities regression, add in a missing debugfs printout that helps the debugging of IRQ affinity logic bugs, and fix a memory leak" * tag 'irq-urgent-2020-08-02' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: genirq/debugfs: Add missing irqchip flags genirq/affinity: Make affinity setting if activated opt-in irqdomain/treewide: Free firmware node after domain removal
2020-08-03Merge tag 'arm64-upstream' of ↵Linus Torvalds1-4/+5
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 and cross-arch updates from Catalin Marinas: "Here's a slightly wider-spread set of updates for 5.9. Going outside the usual arch/arm64/ area is the removal of read_barrier_depends() series from Will and the MSI/IOMMU ID translation series from Lorenzo. The notable arm64 updates include ARMv8.4 TLBI range operations and translation level hint, time namespace support, and perf. Summary: - Removal of the tremendously unpopular read_barrier_depends() barrier, which is a NOP on all architectures apart from Alpha, in favour of allowing architectures to override READ_ONCE() and do whatever dance they need to do to ensure address dependencies provide LOAD -> LOAD/STORE ordering. This work also offers a potential solution if compilers are shown to convert LOAD -> LOAD address dependencies into control dependencies (e.g. under LTO), as weakly ordered architectures will effectively be able to upgrade READ_ONCE() to smp_load_acquire(). The latter case is not used yet, but will be discussed further at LPC. - Make the MSI/IOMMU input/output ID translation PCI agnostic, augment the MSI/IOMMU ACPI/OF ID mapping APIs to accept an input ID bus-specific parameter and apply the resulting changes to the device ID space provided by the Freescale FSL bus. - arm64 support for TLBI range operations and translation table level hints (part of the ARMv8.4 architecture version). - Time namespace support for arm64. - Export the virtual and physical address sizes in vmcoreinfo for makedumpfile and crash utilities. - CPU feature handling cleanups and checks for programmer errors (overlapping bit-fields). - ACPI updates for arm64: disallow AML accesses to EFI code regions and kernel memory. - perf updates for arm64. - Miscellaneous fixes and cleanups, most notably PLT counting optimisation for module loading, recordmcount fix to ignore relocations other than R_AARCH64_CALL26, CMA areas reserved for gigantic pages on 16K and 64K configurations. - Trivial typos, duplicate words" Link: http://lkml.kernel.org/r/[email protected] Link: http://lkml.kernel.org/r/[email protected] * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (82 commits) arm64: use IRQ_STACK_SIZE instead of THREAD_SIZE for irq stack arm64/mm: save memory access in check_and_switch_context() fast switch path arm64: sigcontext.h: delete duplicated word arm64: ptrace.h: delete duplicated word arm64: pgtable-hwdef.h: delete duplicated words bus: fsl-mc: Add ACPI support for fsl-mc bus/fsl-mc: Refactor the MSI domain creation in the DPRC driver of/irq: Make of_msi_map_rid() PCI bus agnostic of/irq: make of_msi_map_get_device_domain() bus agnostic dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus of/device: Add input id to of_dma_configure() of/iommu: Make of_map_rid() PCI agnostic ACPI/IORT: Add an input ID to acpi_dma_configure() ACPI/IORT: Remove useless PCI bus walk ACPI/IORT: Make iort_msi_map_rid() PCI agnostic ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic ACPI/IORT: Make iort_match_node_callback walk the ACPI namespace for NC arm64: enable time namespace support arm64/vdso: Restrict splitting VVAR VMA arm64/vdso: Handle faults on timens page ...
2020-08-03PCI: Remove dev_err() when handing an error from platform_get_irq()Krzysztof Wilczyński21-82/+29
There is no need to call the dev_err() function directly to print a custom message when handling an error from either the platform_get_irq() or platform_get_irq_byname() functions as both are going to display an appropriate error message in case of a failure. This change is as per suggestions from Coccinelle, e.g., drivers/pci/controller/dwc/pcie-armada8k.c:252:2-9: line 252 is redundant because platform_get_irq() already prints an error [bhelgaas: squashed into one commit] Suggested-by: Bjorn Helgaas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Wilczyński <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Ley Foon Tan <[email protected]> # altera Acked-by: Jesper Nilsson <[email protected]> # dwc
2020-08-03PCI: j721e: Add TI J721E PCIe driverKishon Vijay Abraham I5-2/+527
Add support for PCIe controller in J721E SoC. The controller uses the Cadence PCIe core programmed by pcie-cadence*.c. The PCIe controller will work in both host mode and device mode. Some of the features of the controller are: *) Supports both RC mode and EP mode *) Supports MSI and MSI-X support *) Supports upto GEN3 speed mode *) Supports SR-IOV capability *) Ability to route all transactions via SMMU (support will be added in a later patch). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2020-08-03Merge branches 'acpi-mm', 'acpi-tables', 'acpi-apei' and 'acpi-misc'Rafael J. Wysocki1-3/+3
* acpi-mm: ACPI: OSL: Clean up the removal of unused memory mappings ACPI: OSL: Use deferred unmapping in acpi_os_unmap_iomem() ACPI: OSL: Use deferred unmapping in acpi_os_unmap_generic_address() ACPICA: Preserve memory opregion mappings ACPI: OSL: Implement deferred unmapping of ACPI memory * acpi-tables: ACPI: NUMA: Remove the useless 'node >= MAX_NUMNODES' check ACPI: NUMA: Remove the useless sub table pointer check ACPI: tables: Remove the duplicated checks for acpi_parse_entries_array() ACPI: tables: avoid relocations for table signature array * acpi-apei: ACPI: APEI: remove redundant assignment to variable rc * acpi-misc: ACPI: Replace HTTP links with HTTPS ones ACPI: Use valid link to the ACPI specification ACPI: Use fallthrough pseudo-keyword
2020-08-03Merge branches 'acpi-proc', 'acpi-sysfs', 'acpi-pad', 'acpi-ec', 'acpi-pci' ↵Rafael J. Wysocki1-3/+11
and 'acpi-prop' * acpi-proc: ACPI: procfs: Remove last dirs after being marked deprecated for a decade * acpi-sysfs: ACPI: sysfs: add newlines when printing module parameters * acpi-pad: ACPI: PAD: Eliminate usage of uninitialized_var() macro * acpi-ec: ACPI: EC: add newline when printing 'ec_event_clearing' module parameter * acpi-pci: PCI: hotplug: ACPI: Fix context refcounting in acpiphp_grab_context() * acpi-prop: ACPI: property: use cached name in acpi_fwnode_get_named_child_node()
2020-07-31PCI: switchtec: Add missing __iomem tag to fix sparse warningsLogan Gunthorpe1-1/+1
Fix a missing __iomem tag in the init_pfn() function. This fixes a sparse warning of the form: $ make C=2 drivers/pci/switch/ drivers/pci/switch/switchtec.c:... incorrect type assignment(different address spaces) Fixes: 080b47def5e5 ("MicroSemi Switchtec management interface driver") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Logan Gunthorpe <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-07-31PCI: switchtec: Add missing __iomem and __user tags to fix sparse warningsLogan Gunthorpe1-7/+7
Fix a number of missing __iomem and __user tags in the ioctl functions of the switchtec driver. This fixes a number of sparse warnings of the form: $ make C=2 drivers/pci/switch/ drivers/pci/switch/switchtec.c:... incorrect type in ... (different address spaces) Fixes: 52eabba5bcdb ("switchtec: Add IOCTLs to the Switchtec driver") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Logan Gunthorpe <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-07-30Merge tag 'pci-v5.8-fixes-3' of ↵Linus Torvalds1-0/+13
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fix from Bjorn Helgaas: "Disable ASPM on ASM1083/1085 PCIe-to-PCI bridge (Robert Hancock)" * tag 'pci-v5.8-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI/ASPM: Disable ASPM on ASMedia ASM1083/1085 PCIe-to-PCI bridge
2020-07-30PCI: rpadlpar: Make functions staticWei Yongjun1-3/+3
The sparse tool report build warnings as follows: drivers/pci/hotplug/rpadlpar_core.c:355:5: warning: symbol 'dlpar_remove_pci_slot' was not declared. Should it be static? drivers/pci/hotplug/rpadlpar_core.c:461:12: warning: symbol 'rpadlpar_io_init' was not declared. Should it be static? drivers/pci/hotplug/rpadlpar_core.c:473:6: warning: symbol 'rpadlpar_io_exit' was not declared. Should it be static? Those functions are not used outside of this file, so mark them static. Also mark rpadlpar_io_exit() as __exit. Link: https://lore.kernel.org/r/[email protected] Reported-by: Hulk Robot <[email protected]> Signed-off-by: Wei Yongjun <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-07-30PCI/P2PDMA: Allow P2PDMA on AMD Zen and newer CPUsLogan Gunthorpe1-6/+15
Allow P2PDMA if the CPU vendor is AMD and family is 0x17 (Zen) or greater. [bhelgaas: commit log, simplify #if/#else/#endif] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Logan Gunthorpe <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Cc: Huang Rui <[email protected]>
2020-07-29PCI/ASPM: Disable ASPM on ASMedia ASM1083/1085 PCIe-to-PCI bridgeRobert Hancock1-0/+13
Recently ASPM handling was changed to allow ASPM on PCIe-to-PCI/PCI-X bridges. Unfortunately the ASMedia ASM1083/1085 PCIe to PCI bridge device doesn't seem to function properly with ASPM enabled. On an Asus PRIME H270-PRO motherboard, it causes errors like these: pcieport 0000:00:1c.0: AER: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Transmitter ID) pcieport 0000:00:1c.0: AER: device [8086:a292] error status/mask=00003000/00002000 pcieport 0000:00:1c.0: AER: [12] Timeout pcieport 0000:00:1c.0: AER: Corrected error received: 0000:00:1c.0 pcieport 0000:00:1c.0: AER: can't find device of ID00e0 In addition to flooding the kernel log, this also causes the machine to wake up immediately after suspend is initiated. The device advertises ASPM L0s and L1 support in the Link Capabilities register, but the ASMedia web page for ASM1083 [1] claims "No PCIe ASPM support". Windows 10 (build 2004) enables L0s, but it also logs correctable PCIe errors. Add a quirk to disable ASPM for this device. [1] https://www.asmedia.com.tw/eng/e_show_products.php?cate_index=169&item=114 [bhelgaas: commit log] Fixes: 66ff14e59e8a ("PCI/ASPM: Allow ASPM on links to PCIe-to-PCI/PCI-X Bridges") Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=208667 Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Robert Hancock <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-07-29PCI: Release IVRS table in AMD ACS quirkHanjun Guo1-0/+2
The acpi_get_table() should be coupled with acpi_put_table() if the mapped table is not used at runtime to release the table mapping. In pci_quirk_amd_sb_acs(), IVRS table is just used for checking AMD IOMMU is supported, not used at runtime, so put the table after using it. Fixes: 15b100dfd1c9 ("PCI: Claim ACS support for AMD southbridge devices") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hanjun Guo <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-07-29PCI: Announce device after early fixupsTiezhu Yang1-3/+3
Announce the device, e.g., pci 0000:00:00.0: [8086:5910] type 00 class 0x060000 after running early fixups, so the log message reflects any device type or class code fixups. [bhelgaas: commit log] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Tiezhu Yang <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-07-29PCI: Mark AMD Navi10 GPU rev 0x00 ATS as brokenKai-Heng Feng1-1/+4
We are seeing AMD Radeon Pro W5700 doesn't work when IOMMU is enabled: iommu ivhd0: AMD-Vi: Event logged [IOTLB_INV_TIMEOUT device=63:00.0 address=0x42b5b01a0] iommu ivhd0: AMD-Vi: Event logged [IOTLB_INV_TIMEOUT device=63:00.0 address=0x42b5b01c0] The error also makes graphics driver fail to probe the device. It appears to be the same issue as commit 5e89cd303e3a ("PCI: Mark AMD Navi14 GPU rev 0xc5 ATS as broken") addresses, and indeed the same ATS quirk can workaround the issue. See-also: 5e89cd303e3a ("PCI: Mark AMD Navi14 GPU rev 0xc5 ATS as broken") See-also: d28ca864c493 ("PCI: Mark AMD Stoney Radeon R7 GPU ATS as broken") See-also: 9b44b0b09dec ("PCI: Mark AMD Stoney GPU ATS as broken") Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=208725 Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kai-Heng Feng <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Alex Deucher <[email protected]> Cc: [email protected]
2020-07-29PCI: Remove unused pci_lost_interrupt()Heiner Kallweit1-50/+0
388c8c16abaf ("PCI: add routines for debugging and handling lost interrupts") added pci_lost_interrupt() that apparently never has had a single user. Remove it. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2020-07-28of/irq: Make of_msi_map_rid() PCI bus agnosticLorenzo Pieralisi1-1/+1
There is nothing PCI bus specific in the of_msi_map_rid() implementation other than the requester ID tag for the input ID space. Rename requester ID to a more generic ID so that the translation code can be used by all busses that require input/output ID translations. No functional change intended. Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Rob Herring <[email protected]> Cc: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2020-07-28of/irq: make of_msi_map_get_device_domain() bus agnosticDiana Craciun1-1/+1
of_msi_map_get_device_domain() is PCI specific but it need not be and can be easily changed to be bus agnostic in order to be used by other busses by adding an IRQ domain bus token as an input parameter. Signed-off-by: Diana Craciun <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> # pci/msi.c Cc: Bjorn Helgaas <[email protected]> Cc: Rob Herring <[email protected]> Cc: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2020-07-28ACPI/IORT: Make iort_msi_map_rid() PCI agnosticLorenzo Pieralisi1-1/+1
There is nothing PCI specific in iort_msi_map_rid(). Rename the function using a bus protocol agnostic name, iort_msi_map_id(), and convert current callers to it. Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Cc: Will Deacon <[email protected]> Cc: Hanjun Guo <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Sudeep Holla <[email protected]> Cc: Robin Murphy <[email protected]> Cc: "Rafael J. Wysocki" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2020-07-28ACPI/IORT: Make iort_get_device_domain IRQ domain agnosticLorenzo Pieralisi1-1/+2
iort_get_device_domain() is PCI specific but it need not be, since it can be used to retrieve IRQ domain nexus of any kind by adding an irq_domain_bus_token input to it. Make it PCI agnostic by also renaming the requestor ID input to a more generic ID name. Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> # pci/msi.c Cc: Will Deacon <[email protected]> Cc: Hanjun Guo <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Sudeep Holla <[email protected]> Cc: Robin Murphy <[email protected]> Cc: "Rafael J. Wysocki" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
2020-07-28PCI: cadence: Add MSI-X support to Endpoint driverAlan Douglas2-1/+117
Implement ->set_msix() and ->get_msix() callback functions in order to configure MSIX capability in the PCIe endpoint controller. Add cdns_pcie_ep_send_msix_irq() to send MSIX interrupts to Host. cdns_pcie_ep_send_msix_irq() gets the MSIX table address (virtual address) from "struct cdns_pcie_epf" that gets initialized in ->set_bar() call back function. [[email protected]: Re-implement MSIX support in accordance with the re-designed core MSI-X interfaces] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alan Douglas <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2020-07-28PCI: hv: Make some functions staticWei Yongjun1-7/+8
sparse report build warning as follows: drivers/pci/controller/pci-hyperv.c:941:5: warning: symbol 'hv_read_config_block' was not declared. Should it be static? drivers/pci/controller/pci-hyperv.c:1021:5: warning: symbol 'hv_write_config_block' was not declared. Should it be static? drivers/pci/controller/pci-hyperv.c:1090:5: warning: symbol 'hv_register_block_invalidate' was not declared. Should it be static? Those functions are not used outside of this file, so mark them static. Link: https://lore.kernel.org/r/[email protected] Reported-by: Hulk Robot <[email protected]> Signed-off-by: Wei Yongjun <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2020-07-28PCI: tegra: Remove PLL power suppliesThierry Reding1-8/+2
The Tegra PCI controller driver doesn't need to control the PLL power supplies directly, but rather uses the pads provided by the XUSB pad controller, which in turn is responsible for supplying power to the PLLs. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Thierry Reding <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]>
2020-07-27PCI: dwc: hisi: Remove non-ECAM HiSilicon hip05/hip06 driverRob Herring1-219/+0
The HiSilicon non-ECAM PCIe has been broken since March 2016 commit 7e57fd1444bf ("PCI: designware: Move Root Complex setup code to dw_pcie_setup_rc()"). The reason is this commit moved the iATU setup code from dw_pcie_host_init() to dw_pcie_setup_rc(), but the hisi driver never calls dw_pcie_setup_rc(). The result is the PCI memory space is never configured and the driver can't work. It's also clear it has an iATU as the config space accesses use it. There's also no dts file using either "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie". Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Cc: Zhou Wang <[email protected]> Cc: Lorenzo Pieralisi <[email protected]> Cc: Bjorn Helgaas <[email protected]>
2020-07-27PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID registerKishon Vijay Abraham I1-2/+7
Commit 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe controller") in order to update Vendor ID, directly wrote to PCI_VENDOR_ID register. However PCI_VENDOR_ID in root port configuration space is read-only register and writing to it will have no effect. Use local management register to configure Vendor ID and Subsystem Vendor ID. Link: https://lore.kernel.org/r/[email protected] Fixes: 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe controller") Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]>
2020-07-27PCI: cadence: Add new *ops* for CPU addr fixupKishon Vijay Abraham I4-13/+24
Cadence driver uses "mem" memory resource to obtain the offset of configuration space address region, memory space address region and message space address region. The obtained offset is used to program the Address Translation Unit (ATU). However certain platforms like TI's J721E SoC require the absolute address to be programmed in the ATU and not just the offset. Add new *ops* for CPU addr fixup for the platform drivers to provide the correct address to be programmed in the ATU. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2020-07-27PCI: cadence: Allow pci_host_bridge to have custom pci_opsKishon Vijay Abraham I1-1/+2
Certain platforms like TI's J721E allows only 32-bit configuration space access. In such cases pci_generic_config_read and pci_generic_config_write cannot be used. Add support in Cadence core to let pci_host_bridge have custom pci_ops. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2020-07-27PCI: cadence: Add support to start link and verify link statusKishon Vijay Abraham I3-1/+72
Add cdns_pcie_ops to start link and verify link status. The registers to start link and to check link status is in Platform specific PCIe wrapper. Add support for platform specific drivers to add callback functions for the PCIe Cadence core to start link and verify link status. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]>
2020-07-27PCI: cadence: Convert all r/w accessors to perform only 32-bit accessesKishon Vijay Abraham I2-18/+62
Certain platforms like TI's J721E using Cadence PCIe IP can perform only 32-bit accesses for reading or writing to Cadence registers. Convert all read and write accesses to 32-bit in Cadence PCIe driver in preparation for adding PCIe support in TI's J721E SoC. Also add spin lock to disable interrupts while modifying PCI_STATUS register while raising legacy interrupt since PCI_STATUS is accessible by both remote RC and EP and time between read and write should be minimized. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2020-07-27PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error pathKishon Vijay Abraham I2-12/+3
commit bd22885aa188 ("PCI: cadence: Refactor driver to use as a core library") while refactoring the Cadence PCIe driver to be used as library, removed pm_runtime_get_sync() from cdns_pcie_ep_setup() and cdns_pcie_host_setup() but missed to remove the corresponding pm_runtime_put_sync() in the error path. Fix it here. Link: https://lore.kernel.org/r/[email protected] Fixes: bd22885aa188 ("PCI: cadence: Refactor driver to use as a core library") Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]>
2020-07-27PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" propertyKishon Vijay Abraham I2-17/+263
Cadence PCIe core driver (host mode) uses "cdns,no-bar-match-nbits" property to configure the number of bits passed through from PCIe address to internal address in Inbound Address Translation register. This only used the NO MATCH BAR. However standard PCI dt-binding already defines "dma-ranges" to describe the address ranges accessible by PCIe controller. Add support in Cadence PCIe host driver to parse dma-ranges and configure the inbound regions for BAR0, BAR1 and NO MATCH BAR. Cadence IP specifies maximum size for BAR0 as 256GB, maximum size for BAR1 as 2 GB. This adds support to take the next biggest region in "dma-ranges" and find the smallest BAR that each of the regions fit in and if there is no BAR big enough to hold the region, split the region to see if it can be fitted using multiple BARs. "dma-ranges" of J721E will be dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; Since there is no BAR which can hold 2^48 size, NO_MATCH_BAR will be used here. Legacy device tree binding compatibility is maintained by retaining support for "cdns,no-bar-match-nbits". Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]>
2020-07-27PCI: hv: Fix a timing issue which causes kdump to fail occasionallyWei Hu1-34/+37
Kdump could fail sometime on Hyper-V guest because the retry in hv_pci_enter_d0() releases child device structures in hv_pci_bus_exit(). Although there is a second asynchronous device relations message sending from the host, if this message arrives to the guest after hv_send_resource_allocated() is called, the retry would fail. Fix the problem by moving retry to hv_pci_probe() and start the retry from hv_pci_query_relations() call. This will cause a device relations message to arrive to the guest synchronously; the guest would then be able to rebuild the child device structures before calling hv_send_resource_allocated(). Link: https://lore.kernel.org/r/[email protected] Fixes: c81992e7f4aa ("PCI: hv: Retry PCI bus D0 entry on invalid device state") Signed-off-by: Wei Hu <[email protected]> [[email protected]: fixed a comment and commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Michael Kelley <[email protected]>
2020-07-24Merge tag 'pci-v5.8-fixes-2' of ↵Linus Torvalds1-21/+9
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into master Pull PCI fixes from Bjorn Helgaas: - Reject invalid IRQ 0 command line argument for virtio_mmio because IRQ 0 now generates warnings (Bjorn Helgaas) - Revert "PCI/PM: Assume ports without DLL Link Active train links in 100 ms", which broke nouveau (Bjorn Helgaas) * tag 'pci-v5.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: Revert "PCI/PM: Assume ports without DLL Link Active train links in 100 ms" virtio-mmio: Reject invalid IRQ 0 command line argument
2020-07-24PCI/ATS: Add pci_pri_supported() to check device or associated PFAshok Raj1-0/+15
For SR-IOV, the PF PRI is shared between the PF and any associated VFs, and the PRI Capability is allowed for PFs but not for VFs. Searching for the PRI Capability on a VF always fails, even if its associated PF supports PRI. Add pci_pri_supported() to check whether device or its associated PF supports PRI. [bhelgaas: commit log, avoid "!!"] Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ashok Raj <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Lu Baolu <[email protected]> Acked-by: Joerg Roedel <[email protected]> Cc: [email protected] # v4.4+