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2015-01-30PCI: tegra: Convert to use generic config accessorsRob Herring1-52/+3
Convert the Tegra host PCI driver to use the generic config access functions. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thierry Reding <treding@nvidia.com> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Alexandre Courbot <gnurou@gmail.com> CC: linux-tegra@vger.kernel.org
2015-01-30PCI: rcar: Convert to use generic config accessorsRob Herring1-48/+3
Convert the rcar-gen2 host PCI driver to use the generic config access functions. This changes the I/O accessors from io(read|write)X to readX/writeX variants which are equivalent on ARM. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> CC: Simon Horman <horms@verge.net.au> CC: linux-sh@vger.kernel.org
2015-01-30PCI: generic: Convert to use generic config accessorsRob Herring1-48/+3
Convert the generic host PCI driver to use the generic config access functions. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Will Deacon <will.deacon@arm.com> CC: linux-arm-kernel@lists.infradead.org
2015-01-29PCI: versatile: Add DT-based ARM Versatile PB PCIe host driverRob Herring3-0/+242
This converts the Versatile PCI host code to a platform driver using the commom DT parsing and setup. The driver uses only an empty ARM pci_sys_data struct and does not use pci_common_init_dev init function. The old host code will be removed in a subsequent commit when Versatile is completely converted to DT. I've tested this on QEMU with the sym53c8xx driver in both i/o and memory mapped modes. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> CC: Russell King <linux@arm.linux.org.uk> CC: Peter Maydell <peter.maydell@linaro.org>
2015-01-27Merge branches 'pci/host-keystone', 'pci/host-tegra', 'pci/host-xgene' and ↵Bjorn Helgaas3-4/+4
'pci/host-xilinx' into next * pci/host-keystone: PCI: keystone: Fix misspelling of current function in debug output * pci/host-tegra: PCI: tegra: Remove unnecessary tegra_pcie_fixup_bridge() * pci/host-xgene: PCI: xgene: Include clk.h instead of clk-private.h * pci/host-xilinx: PCI: xilinx: Fix harmless format string warning
2015-01-27PCI: designware: Reject MSI-X IRQsLucas Stach1-0/+3
The DesignWare PCIe MSI hardware does not support MSI-X IRQs. Setting those up failed as a side effect of a bug which was fixed by 91f8ae823f2b ("PCI: designware: Setup and clear exactly one MSI at a time"). Now that this bug is fixed, MSI-X IRQs need to be rejected explicitly; otherwise devices trying to use them may end up with incorrectly working interrupts. Fixes: 91f8ae823f2b ("PCI: designware: Setup and clear exactly one MSI at a time") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jg1.han@samsung.com> CC: stable@vger.kernel.org # v3.18+
2015-01-23PCI: xgene: Include clk.h instead of clk-private.hStephen Boyd1-1/+1
This driver should be including clk.h as it's a clock consumer, not a clock provider that needs to register clocks early. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Tanmay Inamdar <tinamdar@apm.com>
2015-01-23PCI: xilinx: Fix harmless format string warningArnd Bergmann1-2/+2
The xilinx PCIe driver prints a register value whose type is propagated to the type returned by the GENMASK() macro. Unfortunately, that type has recently changed as the result of a bug fix, so now we get a warning about the type: drivers/pci/host/pcie-xilinx.c: In function 'xilinx_pcie_clear_err_interrupts': drivers/pci/host/pcie-xilinx.c:154:3: warning: format '%d' expects argument of type 'int', but argument 4 has type 'long unsigned int' [-Wformat=] Change the code so we always print the number as an 'unsigned long' type to avoid the warning. The original code was fine on 32-bit architectures but not on 64-bit. Now it works as expected on both. Fixes: 00b4d9a1412 ("bitops: Fix shift overflow in GENMASK macros") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-09PCI: keystone: Fix misspelling of current function in debug outputJulia Lawall1-1/+1
Replace a misspelled function name by %s and then __func__. The function name contains pcie, not pci as in the string. This was done using Coccinelle, including the use of Levenshtein distance, as proposed by Rasmus Villemoes. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com>
2014-12-29Merge branches 'pci/host-keystone', 'pci/host-layerscape', 'pci/host-rcar' ↵Bjorn Helgaas4-17/+3
and 'pci/host-tegra' into next * pci/host-keystone: PCI: keystone: Fix error handling of irq_of_parse_and_map() * pci/host-layerscape: PCI: layerscape: Fix platform_no_drv_owner.cocci warnings * pci/host-rcar: PCI: rcar: Fix error handling of irq_of_parse_and_map() * pci/host-tegra: PCI: tegra: Remove unnecessary tegra_pcie_fixup_bridge()
2014-12-27ARM/PCI: Move to generic PCI domainsLorenzo Pieralisi3-19/+2
Most if not all ARM PCI host controller device drivers either ignore the domain field in the pci_sys_data structure or just increment it every time a host controller is probed, using it as a domain counter. Therefore, instead of relying on pci_sys_data to stash the domain number in a standard location, ARM pcibios code can be moved to the newly introduced generic PCI domains code, implemented in commits: 41e5c0f81d3e ("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()") 670ba0c8883b ("PCI: Add generic domain handling") ARM code is made to select PCI_DOMAINS_GENERIC by default, which builds core PCI code that assigns the domain number through the generic function: void pci_bus_assign_domain_nr(...) that relies on a DT property to define the domain number or falls back to a counter according to a predefined logic; its usage replaces the current domain assignment code in PCI host controllers present in the kernel. Tested-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Yijing Wang <wangyijing@huawei.com> Reviewed-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> # mvebu Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Arnd Bergmann <arnd@arndb.de> CC: Mohit Kumar <mohit.kumar@st.com>
2014-12-26PCI: tegra: Remove unnecessary tegra_pcie_fixup_bridge()Lucas Stach1-13/+0
The bridge setup is already done by generic code while scanning the buses. Do not duplicate (or potentially alter) this setup as a fixup. Tested-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
2014-12-26PCI: tegra: Remove unnecessary tegra_pcie_fixup_bridge()Lucas Stach1-13/+0
The bridge setup is already done by generic code while scanning the buses. Do not duplicate (or potentially alter) this setup as a fixup. Tested-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Thierry Reding <treding@nvidia.com>
2014-12-26PCI: layerscape: Fix platform_no_drv_owner.cocci warningsJulia Lawall1-1/+0
No need to set .owner here. The core will do it. Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-12-26PCI: rcar: Fix error handling of irq_of_parse_and_map()Dmitry Torokhov1-2/+2
Return value of irq_of_parse_and_map() is unsigned int, with 0 indicating failure, so testing for negative result never works. Signed-off-by: Dmitry Torokhov <dtor@chromium.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Phil Edworthy <phil.edworthy@renesas.com>
2014-12-26PCI: keystone: Fix error handling of irq_of_parse_and_map()Dmitry Torokhov1-1/+1
Return value of irq_of_parse_and_map() is unsigned int, with 0 indicating failure, so testing for negative result never works. Signed-off-by: Dmitry Torokhov <dtor@chromium.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Murali Karicheri <m-karicheri2@ti.com>
2014-12-14Merge tag 'driver-core-3.19-rc1' of ↵Linus Torvalds12-12/+0
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core update from Greg KH: "Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while" * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits) Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries" fs: debugfs: add forward declaration for struct device type firmware class: Deletion of an unnecessary check before the function call "vunmap" firmware loader: fix hung task warning dump devcoredump: provide a one-way disable function device: Add dev_<level>_once variants ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries ath: use seq_file api for ath9k debugfs files debugfs: add helper function to create device related seq_file drivers/base: cacheinfo: remove noisy error boot message Revert "core: platform: add warning if driver has no owner" drivers: base: support cpu cache information interface to userspace via sysfs drivers: base: add cpu_device_create to support per-cpu devices topology: replace custom attribute macros with standard DEVICE_ATTR* cpumask: factor out show_cpumap into separate helper function driver core: Fix unbalanced device reference in drivers_probe driver core: fix race with userland in device_add() sysfs/kernfs: make read requests on pre-alloc files use the buffer. sysfs/kernfs: allow attributes to request write buffer be pre-allocated. fs: sysfs: return EGBIG on write if offset is larger than file size ...
2014-12-10Merge tag 'pci-v3.19-changes' of ↵Linus Torvalds13-127/+245
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: "Here are the PCI changes intended for v3.19. I don't think there's anything very exciting here, but there was a lot of MSI-related stuff coming via Thomas. Details: NUMA - Allow numa_node override via sysfs (Prarit Bhargava) Resource management - Restore detection of read-only BARs (Myron Stowe) - Shrink decoding-disabled window while sizing BARs (Myron Stowe) - Add informational printk for invalid BARs (Myron Stowe) - Remove fixed parameter in pci_iov_resource_bar() (Myron Stowe) MSI - Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits (Yijing Wang) - Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()" (Yijing Wang) - s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq() (Yijing Wang) Virtualization - xen: Process failure for pcifront_(re)scan_root() (Chen Gang) - Make FLR and AF FLR reset warning messages different (Gavin Shan) Generic host bridge driver - Allocate config space windows after limiting bus number range (Lorenzo Pieralisi) - Convert to DT resource parsing API (Lorenzo Pieralisi) Freescale Layerscape - Add Freescale Layerscape PCIe driver (Minghuan Lian) NVIDIA Tegra - Do not build on 64-bit ARM (Thierry Reding) - Add Kconfig help text (Thierry Reding) Renesas R-Car - Make rcar_pci static (Jingoo Han) Samsung Exynos - Add exynos prefix to add_pcie_port(), pcie_init() (Jingoo Han) ST Microelectronics SPEAr13xx - Add spear prefix to add_pcie_port(), pcie_init() (Jingoo Han) - Make spear13xx_add_pcie_port() __init (Jingoo Han) - Remove unnecessary OOM message (Jingoo Han) TI DRA7xx - Add dra7xx prefix to add_pcie_port() (Jingoo Han) - Make dra7xx_add_pcie_port() __init (Jingoo Han) TI Keystone - Make ks_dw_pcie_msi_domain_ops static (Jingoo Han) - Remove unnecessary OOM message (Jingoo Han) Miscellaneous - Delete unnecessary NULL pointer checks (Markus Elfring) - Remove unused to_hotplug_slot() (Gavin Shan) - Whitespace cleanup (Jingoo Han) - Simplify if-return sequences (Quentin Lambert)" * tag 'pci-v3.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (28 commits) PCI: Remove fixed parameter in pci_iov_resource_bar() PCI: Add informational printk for invalid BARs PCI: tegra: Add Kconfig help text PCI: tegra: Do not build on 64-bit ARM PCI: spear: Remove unnecessary OOM message PCI: mvebu: Add a blank line after declarations PCI: designware: Add a blank line after declarations PCI: exynos: Remove unnecessary return statement PCI: imx6: Use tabs for indentation PCI: keystone: Remove unnecessary OOM message PCI: Remove unused and broken to_hotplug_slot() PCI: Make FLR and AF FLR reset warning messages different PCI: dra7xx: Add __init annotation to dra7xx_add_pcie_port() PCI: spear: Add __init annotation to spear13xx_add_pcie_port() PCI: spear: Rename add_pcie_port(), pcie_init() to spear13xx_add_pcie_port(), etc. PCI: dra7xx: Rename add_pcie_port() to dra7xx_add_pcie_port() PCI: layerscape: Add Freescale Layerscape PCIe driver PCI: Simplify if-return sequences PCI: Delete unnecessary NULL pointer checks PCI: Shrink decoding-disabled window while sizing BARs ...
2014-12-10Merge branch 'irq-irqdomain-for-linus' of ↵Linus Torvalds8-94/+64
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq domain updates from Thomas Gleixner: "The real interesting irq updates: - Support for hierarchical irq domains: For complex interrupt routing scenarios where more than one interrupt related chip is involved we had no proper representation in the generic interrupt infrastructure so far. That made people implement rather ugly constructs in their nested irq chip implementations. The main offenders are x86 and arm/gic. To distangle that mess we have now hierarchical irqdomains which seperate the various interrupt chips and connect them via the hierarchical domains. That keeps the domain specific details internal to the particular hierarchy level and removes the criss/cross referencing of chip internals. The resulting hierarchy for a complex x86 system will look like this: vector mapped: 74 msi-0 mapped: 2 dmar-ir-1 mapped: 69 ioapic-1 mapped: 4 ioapic-0 mapped: 20 pci-msi-2 mapped: 45 dmar-ir-0 mapped: 3 ioapic-2 mapped: 1 pci-msi-1 mapped: 2 htirq mapped: 0 Neither ioapic nor pci-msi know about the dmar interrupt remapping between themself and the vector domain. If interrupt remapping is disabled ioapic and pci-msi become direct childs of the vector domain. In hindsight we should have done that years ago, but in hindsight we always know better :) - Support for generic MSI interrupt domain handling We have more and more non PCI related MSI interrupts, so providing a generic infrastructure for this is better than having all affected architectures implementing their own private hacks. - Support for PCI-MSI interrupt domain handling, based on the generic MSI support. This part carries the pci/msi branch from Bjorn Helgaas pci tree to avoid a massive conflict. The PCI/MSI parts are acked by Bjorn. I have two more branches on top of this. The full conversion of x86 to hierarchical domains and a partial conversion of arm/gic" * 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits) genirq: Move irq_chip_write_msi_msg() helper to core PCI/MSI: Allow an msi_controller to be associated to an irq domain PCI/MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain PCI/MSI: Enhance core to support hierarchy irqdomain PCI/MSI: Move cached entry functions to irq core genirq: Provide default callbacks for msi_domain_ops genirq: Introduce msi_domain_alloc/free_irqs() asm-generic: Add msi.h genirq: Add generic msi irq domain support genirq: Introduce callback irq_chip.irq_write_msi_msg genirq: Work around __irq_set_handler vs stacked domains ordering issues irqdomain: Introduce helper function irq_domain_add_hierarchy() irqdomain: Implement a method to automatically call parent domains alloc/free genirq: Introduce helper irq_domain_set_info() to reduce duplicated code genirq: Split out flow handler typedefs into seperate header file genirq: Add IRQ_SET_MASK_OK_DONE to support stacked irqchip genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip genirq: Add more helper functions to support stacked irq_chip genirq: Introduce helper functions to support stacked irq_chip irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF ...
2014-12-01PCI: tegra: Use physical range for I/O mappingThierry Reding1-8/+20
Commit 0b0b0893d49b ("of/pci: Fix the conversion of IO ranges into IO resources") changed how I/O resources are parsed from DT. Rather than containing the physical address of the I/O region, the addresses will now be in I/O address space. On Tegra the union of all ranges is used to expose a top-level memory- mapped resource for the PCI host bridge. This helps to make /proc/iomem more readable. Combining both of the above, the union would now include the I/O space region. This causes a regression on Tegra20, where the physical base address of the PCIe controller (and therefore of the union) is located at physical address 0x80000000. Since I/O space starts at 0, the union will now include all of system RAM which starts at 0x00000000. This commit fixes this by keeping two copies of the I/O range: one that represents the range in the CPU's physical address space, the other for the range in the I/O address space. This allows the translation setup within the driver to reuse the physical addresses. The code registering the I/O region with the PCI core uses both ranges to establish the mapping. Fixes: 0b0b0893d49b ("of/pci: Fix the conversion of IO ranges into IO resources") Reported-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2014-11-23PCI/MSI: Rename mask/unmask_msi_irq treewideThomas Gleixner5-18/+18
The PCI/MSI irq chip callbacks mask/unmask_msi_irq have been renamed to pci_msi_mask/unmask_irq to mark them PCI specific. Rename all usage sites. The conversion helper functions are kept around to avoid conflicts in next and will be removed after merging into mainline. Coccinelle assisted conversion. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: x86@kernel.org Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Mohit Kumar <mohit.kumar@st.com> Cc: Simon Horman <horms@verge.net.au> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Yijing Wang <wangyijing@huawei.com>
2014-11-23PCI/MSI: Rename write_msi_msg() to pci_write_msi_msg()Jiang Liu4-4/+4
Rename write_msi_msg() to pci_write_msi_msg() to mark it as PCI specific. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Yingjoe Chen <yingjoe.chen@mediatek.com> Cc: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-11-21PCI: xilinx: Save MSI controller in pci_sys_dataYijing Wang1-15/+5
Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every PCI bus in .add_bus(). [bhelgaas: use xilinx_pcie_msi_chip, not xilinx_pcie_msi_controller] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-21PCI: mvebu: Save MSI controller in pci_sys_dataYijing Wang1-7/+4
Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every PCI bus in .add_bus(). Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-21PCI: rcar: Save MSI controller in pci_sys_dataYijing Wang1-10/+3
Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every PCI bus in .add_bus(). [bhelgaas: use struct rcar_msi.chip, not ctrl] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-21PCI: designware: Save MSI controller in pci_sys_dataYijing Wang1-11/+5
Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every PCI bus in .add_bus(). [bhelgaas: use dw_pcie_msi_chip, not dw_pcie_msi_controller] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-21PCI: tegra: Save MSI controller in pci_sys_dataYijing Wang1-10/+4
Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every PCI bus in .add_bus(). [bhelgaas: use struct tegra_msi.chip, not ctrl] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-15Merge branches 'pci/host-designware', 'pci/host-dra7xx', 'pci/host-exynos', ↵Bjorn Helgaas13-127/+245
'pci/host-generic', 'pci/host-imx6', 'pci/host-keystone', 'pci/host-layerscape', 'pci/host-mvebu', 'pci/host-rcar', 'pci/host-spear' and 'pci/host-tegra' into next * pci/host-designware: PCI: designware: Add a blank line after declarations * pci/host-dra7xx: PCI: dra7xx: Add __init annotation to dra7xx_add_pcie_port() PCI: dra7xx: Rename add_pcie_port() to dra7xx_add_pcie_port() * pci/host-exynos: PCI: exynos: Remove unnecessary return statement PCI: exynos: Add exynos prefix to add_pcie_port()/pcie_init() * pci/host-generic: PCI: generic: Convert to DT resource parsing API PCI: generic: Allocate config space windows after limiting bus number range * pci/host-imx6: PCI: imx6: Use tabs for indentation * pci/host-keystone: PCI: keystone: Remove unnecessary OOM message PCI: keystone: Make ks_dw_pcie_msi_domain_ops static * pci/host-layerscape: PCI: layerscape: Add Freescale Layerscape PCIe driver * pci/host-mvebu: PCI: mvebu: Add a blank line after declarations * pci/host-rcar: PCI: rcar: Make rcar_pci static * pci/host-spear: PCI: spear: Remove unnecessary OOM message PCI: spear: Add __init annotation to spear13xx_add_pcie_port() PCI: spear: Rename add_pcie_port(), pcie_init() to spear13xx_add_pcie_port(), etc. * pci/host-tegra: PCI: tegra: Add Kconfig help text PCI: tegra: Do not build on 64-bit ARM
2014-11-13PCI: tegra: Add Kconfig help textThierry Reding1-0/+3
Add a standard help text to the Kconfig entry for the Tegra PCIe host controller driver. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: tegra: Do not build on 64-bit ARMThierry Reding1-1/+1
32-bit and 64-bit ARM use very different infrastructure to register a PCI host bridge. The Tegra PCIe host controller driver currently only supports the 32-bit ARM infrastructure, so prevent it from being built on 64-bit ARM where it will break. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: spear: Remove unnecessary OOM messageJingoo Han1-3/+1
The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. This patch fixes the following checkpatch warning: WARNING: Possible unnecessary 'out of memory' message Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2014-11-13PCI: mvebu: Add a blank line after declarationsJingoo Han1-0/+2
This patch fixes the following checkpatch warning: WARNING: Missing a blank line after declarations [bhelgaas: drop mvebu_pcie_add_bus() change because it's going away anyway] Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
2014-11-13PCI: designware: Add a blank line after declarationsJingoo Han1-0/+1
This patch fixes the following checkpatch warning: WARNING: Missing a blank line after declarations Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: exynos: Remove unnecessary return statementJingoo Han1-8/+0
This patch fixes the following checkpatch warning: WARNING: void function return statements are not generally useful Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: imx6: Use tabs for indentationJingoo Han1-2/+2
This patch fixes the following checkpatch error: ERROR: code indent should use tabs where possible Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: keystone: Remove unnecessary OOM messageJingoo Han1-3/+2
The site-specific OOM messages are unnecessary because they duplicate the MM subsystem generic OOM message. This patch fixes the following checkpatch warning: WARNING: Possible unnecessary 'out of memory' message Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: xgene: Assign resources to bus before adding new devicesDuc Dang1-1/+6
The X-Gene PCIe driver assumes pci_scan_root_bus() assigns resources as proposed in [1]. But we dropped patch [1] because it would break some architectures, which means the X-Gene PCIe driver is currently broken. Add calls to scan the bus, assign resources, and add devices in the X-Gene driver to fix this. [bhelgaas: changelog] [1] http://lkml.kernel.org/r/1412000971-9242-11-git-send-email-Liviu.Dudau@arm.com Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: dra7xx: Add __init annotation to dra7xx_add_pcie_port()Jingoo Han1-2/+2
Add __init annotation to dra7xx_add_pcie_port(), because dra7xx_add_pcie_port() is called only by dra7xx_pcie_probe() which is marked __init. This patch fixes a section mismatch warning: WARNING: drivers/pci/host/built-in.o(.text.unlikely+0xcc): Section mismatch in reference from the function dra7xx_add_pcie_port() to the function .init.text:dw_pcie_host_init() Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-13PCI: spear: Add __init annotation to spear13xx_add_pcie_port()Jingoo Han1-2/+2
Add __init annotation to spear13xx_add_pcie_port(), because spear13xx_add_pcie_port() is called only by spear13xx_pcie_probe(), which is marked __init. This fixes a section mismatch warning: WARNING: drivers/pci/host/built-in.o(.text.unlikely+0x94): Section mismatch in reference from the function spear13xx_add_pcie_port() to the function .init.text:dw_pcie_host_init() Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2014-11-13PCI: spear: Rename add_pcie_port(), pcie_init() to ↵Jingoo Han1-4/+5
spear13xx_add_pcie_port(), etc. The add_pcie_port() and pcie_init() functions are SPEAr13xx-specific. Add spear13xx prefix to avoid collision in global name space. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2014-11-13PCI: dra7xx: Rename add_pcie_port() to dra7xx_add_pcie_port()Jingoo Han1-3/+3
The add_pcie_port() function is dra7xx-specific. Add dra7xx prefix to avoid collision in global name space. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-13PCI: layerscape: Add Freescale Layerscape PCIe driverMinghuan Lian3-0/+188
Add support for Freescale Layerscape PCIe controller. This driver re-uses the Synopsis DesignWare core code. [bhelgaas: add Kconfig dependency on CONFIG_ARM] Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-11-12PCI/MSI: Rename "struct msi_chip" to "struct msi_controller"Yijing Wang8-19/+21
"msi_chip" isn't very descriptive, so rename it to "msi_controller". That tells a little more about what it does and is already used in device tree bindings. No functional change. [bhelgaas: changelog, change *only* the struct name so it's reviewable] Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-11-05PCI: generic: Convert to DT resource parsing APILorenzo Pieralisi1-93/+27
In order to consolidate DT configuration for PCI host controllers in the kernel, a new API, of_pci_get_host_bridge_resources(), was developed to allow parsing and assigning IO/BUS/MEM resources from DT, removing duplicated code present in the majority of PCI host driver implementations. Convert the existing PCI generic host controller driver to the new API. Most of the code parsing ranges and creating resources is now delegated to the of_pci_get_host_bridge_resources() API. The PCI host controller code filters the resulting resource list and maps IO space by using the newly introduced pci_ioremap_iospace() API. New code supports only one IO resource per generic host controller, which should cater for all existing host controller configurations. [bhelgaas: changelog] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Will Deacon <will.deacon@arm.com>
2014-11-05PCI: generic: Allocate config space windows after limiting bus number rangeLorenzo Pieralisi1-5/+5
The number of config space windows allocated for the host bridge depends on how many bus numbers are below the bridge. Instead of first allocating the windows and then limiting the bus resource, this patch reshuffles the code so that if any limitation is applied to the bus resource, it is taken into account in the windows allocation. [bhelgaas: changelog] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Will Deacon <will.deacon@arm.com>
2014-11-03Merge branch 'platform/remove_owner' of ↵Greg Kroah-Hartman12-12/+0
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into driver-core-next Remove all .owner fields from platform drivers
2014-10-29PCI: imx6: Wait for clocks to stabilize after ref_enRichard Zhu1-3/+10
For boards without a reset GPIO we skip the delay between enabling the pcie_ref_clk and touching the RC registers for configuration. This hangs the system if there isn't a proper delay to ensure the clocks are settled in the DW PCIe core. Also iMX6Q always needs an additional 10us delay to make sure the reset is propagated through the core, as we don't have an explicitly controlled reset input on this SoC. This fixes a problem with 3fce0e882f61 ("PCI: imx6: Delay enabling reference clock for SS until it stabilizes"): the kernel doesn't boot on systems that don't pass the PCI GPIO reset in the DTB. This regression affects mx6 nitrogen boards. [bhelgaas: add regression info in changelog] Fixes: 3fce0e882f61 ("PCI: imx6: Delay enabling reference clock for SS until it stabilizes") Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Richard Zhu <richard.zhu@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
2014-10-23PCI: rcar: Make rcar_pci staticJingoo Han1-1/+1
Make rcar_pci static because it is used only in this file. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-23PCI: keystone: Make ks_dw_pcie_msi_domain_ops staticJingoo Han1-1/+1
Make ks_dw_pcie_msi_domain_ops static because it is used only in this file. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Santosh Shilimkar<ssantosh@kernel.org>
2014-10-23PCI: exynos: Add exynos prefix to add_pcie_port()/pcie_init()Jingoo Han1-5/+5
The add_pcie_port() and pcie_init() functions are Exynos-specific. Add exynos prefix to avoid collision in global name space. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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