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path: root/drivers/pci/controller/dwc
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2019-11-28Merge branch 'pci/trivial'Bjorn Helgaas1-3/+3
- Fix typos and comments (Bjorn Helgaas) - Fix Kconfig whitespace errors (Krzysztof Kozlowski) * pci/trivial: PCI: Fix indentation PCI: Fix typos PCI: Remove useless comments and tidy others PCI: Remove unnecessary includes # Conflicts: # drivers/pci/probe.c
2019-11-28Merge branch 'remotes/lorenzo/pci/mmio-dma-ranges'Bjorn Helgaas1-20/+9
- Consolidate DT "dma-ranges" parsing and convert all host drivers to use shared parsing (Rob Herring) * remotes/lorenzo/pci/mmio-dma-ranges: PCI: Make devm_of_pci_get_host_bridge_resources() static PCI: rcar: Use inbound resources for setup PCI: iproc: Use inbound resources for setup PCI: xgene: Use inbound resources for setup PCI: v3-semi: Use inbound resources for setup PCI: ftpci100: Use inbound resources for setup PCI: of: Add inbound resource parsing to helpers PCI: versatile: Enable COMPILE_TEST PCI: versatile: Remove usage of PHYS_OFFSET PCI: versatile: Use pci_parse_request_of_pci_ranges() PCI: xilinx-nwl: Use pci_parse_request_of_pci_ranges() PCI: xilinx: Use pci_parse_request_of_pci_ranges() PCI: xgene: Use pci_parse_request_of_pci_ranges() PCI: v3-semi: Use pci_parse_request_of_pci_ranges() PCI: rockchip: Drop storing driver private outbound resource data PCI: rockchip: Use pci_parse_request_of_pci_ranges() PCI: mobiveil: Use pci_parse_request_of_pci_ranges() PCI: mediatek: Use pci_parse_request_of_pci_ranges() PCI: iproc: Use pci_parse_request_of_pci_ranges() PCI: faraday: Use pci_parse_request_of_pci_ranges() PCI: dwc: Use pci_parse_request_of_pci_ranges() PCI: altera: Use pci_parse_request_of_pci_ranges() PCI: aardvark: Use pci_parse_request_of_pci_ranges() PCI: Export pci_parse_request_of_pci_ranges() resource: Add a resource_list_first_type helper # Conflicts: # drivers/pci/controller/pcie-rcar.c
2019-11-28Merge branch 'remotes/lorenzo/pci/uniphier'Bjorn Helgaas1-0/+10
- Set uniphier to host (RC) mode always (Kunihiko Hayashi) * remotes/lorenzo/pci/uniphier: PCI: uniphier: Set mode register to host mode
2019-11-28Merge branch 'remotes/lorenzo/pci/tegra'Bjorn Helgaas1-4/+2
- Fix Tegra CLKREQ dependency programming (Vidya Sagar) * remotes/lorenzo/pci/tegra: PCI: tegra: Fix CLKREQ dependency programming
2019-11-28Merge branch 'remotes/lorenzo/pci/meson'Bjorn Helgaas1-27/+109
- Fix meson PERST# GPIO polarity problem (Remi Pommarel) - Add DT bindings for Amlogic Meson G12A (Neil Armstrong) - Fix meson clock names to match DT bindings (Neil Armstrong) - Add meson support for Amlogic G12A SoC with separate shared PHY (Neil Armstrong) - Add meson extended PCIe PHY functions for Amlogic G12A USB3+PCIe combo PHY (Neil Armstrong) - Add arm64 DT for Amlogic G12A PCIe controller node (Neil Armstrong) - Add commented-out description of VIM3 USB3/PCIe mux in arm64 DT (Neil Armstrong) * remotes/lorenzo/pci/meson: arm64: dts: khadas-vim3: add commented support for PCIe arm64: dts: meson-g12a: Add PCIe node phy: meson-g12a-usb3-pcie: Add support for PCIe mode PCI: amlogic: meson: Add support for G12A PCI: amlogic: Fix probed clock names dt-bindings: pci: amlogic, meson-pcie: Add G12A bindings PCI: amlogic: Fix reset assertion via gpio descriptor
2019-11-28Merge branch 'remotes/lorenzo/pci/layerscape'Bjorn Helgaas1-0/+1
- Add layerscape LS1028a support (Xiaowei Bao) * remotes/lorenzo/pci/layerscape: PCI: layerscape: Add LS1028a support dt-bindings: pci: layerscape-pci: add compatible strings "fsl, ls1028a-pcie"
2019-11-28Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas1-5/+6
- Fix dwc find_next_bit() usage (Niklas Cassel) * remotes/lorenzo/pci/dwc: PCI: dwc: Fix find_next_bit() usage
2019-11-28Merge branch 'pci/resource'Bjorn Helgaas5-5/+5
- Protect pci_reassign_bridge_resources() against concurrent addition/removal (Benjamin Herrenschmidt) - Fix bridge dma_ranges resource list cleanup (Rob Herring) - Add PCI_STD_NUM_BARS for the number of standard BARs (Denis Efremov) - Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters to control the MMIO and prefetchable MMIO window sizes of hotplug bridges independently (Nicholas Johnson) - Fix MMIO/MMIO_PREF window assignment that assigned more space than desired (Nicholas Johnson) - Only enforce bus numbers from bridge EA if the bridge has EA devices downstream (Subbaraya Sundeep) * pci/resource: PCI: Do not use bus number zero from EA capability PCI: Avoid double hpmemsize MMIO window assignment PCI: Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters PCI: Add PCI_STD_NUM_BARS for the number of standard BARs PCI: Fix missing bridge dma_ranges resource list cleanup PCI: Protect pci_reassign_bridge_resources() against concurrent addition/removal
2019-11-21PCI: Fix indentationKrzysztof Kozlowski1-3/+3
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig [bhelgaas: do same in vmd.c] Link: https://lore.kernel.org/r/20191120134036.14502-1-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-11-21PCI: uniphier: Set mode register to host modeKunihiko Hayashi1-0/+10
Set the mode register to host(RC) mode so that the host controller mode is set-up consistently across SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> [lorenzo.pieralisi@arm.com: updated log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-11-21PCI: Remove unused includes and superfluous struct declarationKrzysztof Wilczynski1-0/+1
Remove <linux/pci.h> and <linux/msi.h> from being included directly as part of the include/linux/of_pci.h, and remove superfluous declaration of struct of_phandle_args. Move users of include <linux/of_pci.h> to include <linux/pci.h> and <linux/msi.h> directly rather than rely on both being included transitively through <linux/of_pci.h>. Link: https://lore.kernel.org/r/20190903113059.2901-1-kw@linux.com Signed-off-by: Krzysztof Wilczynski <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org>
2019-11-20PCI: of: Add inbound resource parsing to helpersRob Herring1-1/+2
Extend devm_of_pci_get_host_bridge_resources() and pci_parse_request_of_pci_ranges() helpers to also parse the inbound addresses from DT 'dma-ranges' and populate a resource list with the translated addresses. This will help ensure 'dma-ranges' is always parsed in a consistent way. Tested-by: Srinath Mannam <srinath.mannam@broadcom.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> # for AArdvark Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Srinath Mannam <srinath.mannam@broadcom.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Will Deacon <will@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Toan Le <toan@os.amperecomputing.com> Cc: Ley Foon Tan <lftan@altera.com> Cc: Tom Joseph <tjoseph@cadence.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Cc: Simon Horman <horms@verge.net.au> Cc: Shawn Lin <shawn.lin@rock-chips.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: rfi@lists.rocketboards.org Cc: linux-mediatek@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org
2019-11-08PCI: layerscape: Add LS1028a supportXiaowei Bao1-0/+1
Add support for the LS1028a PCIe controller. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <Andrew.Murray@arm.com> Acked-by: Minghuan Lian <minghuan.Lian@nxp.com>
2019-10-29PCI: dwc: Use pci_parse_request_of_pci_ranges()Rob Herring1-20/+8
Convert the Designware host bridge to use the common pci_parse_request_of_pci_ranges(). Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Andrew Murray <andrew.murray@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
2019-10-18PCI: tegra: Fix CLKREQ dependency programmingVidya Sagar1-4/+2
Corrects the programming to provide REFCLK to the downstream device when there is no CLKREQ sideband signal routing present from root port to the endpont. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
2019-10-15PCI: dwc: Fix find_next_bit() usageNiklas Cassel1-5/+6
find_next_bit() takes a parameter of size long, and performs arithmetic that assumes that the argument is of size long. Therefore we cannot pass a u32, since this will cause find_next_bit() to read outside the stack buffer and will produce the following print: BUG: KASAN: stack-out-of-bounds in find_next_bit+0x38/0xb0 Fixes: 1b497e6493c4 ("PCI: dwc: Fix uninitialized variable in dw_handle_msi_irq()") Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2019-10-15PCI: amlogic: meson: Add support for G12ANeil Armstrong1-23/+105
Add support for the Amlogic G12A SoC using a separate shared PHY. This adds support for fetching a PHY phandle and call the PHY init, reset and power on/off calls instead of writing in the PHY register or toggling the PHY reset line. The MIPI clock and the PHY memory resource are only required for the Amlogic AXG SoC PCIe PHY setup, thus these elements are ignored for the Amlogic G12A having a separate shared PHY. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-10-15PCI: amlogic: Fix probed clock namesNeil Armstrong1-3/+3
Fix the clock names used in the probe function according to the bindings. Fixes: 9c0ef6d34fdb ("PCI: amlogic: Add the Amlogic Meson PCIe controller driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-10-15PCI: amlogic: Fix reset assertion via gpio descriptorRemi Pommarel1-2/+2
Normally asserting reset signal on gpio would be achieved with: gpiod_set_value_cansleep(reset_gpio, 1); Meson PCI driver set reset value to '0' instead of '1' as it takes into account the PERST# signal polarity. The polarity should be taken care in the device tree instead. This fixes the reset assertion meaning and moves out the polarity configuration in DT (please note that there is no DT currently using this driver). Signed-off-by: Remi Pommarel <repk@triplefau.lt> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
2019-10-14PCI: Add PCI_STD_NUM_BARS for the number of standard BARsDenis Efremov5-5/+5
Code that iterates over all standard PCI BARs typically uses PCI_STD_RESOURCE_END. However, that requires the unusual test "i <= PCI_STD_RESOURCE_END" rather than something the typical "i < PCI_STD_NUM_BARS". Add a definition for PCI_STD_NUM_BARS and change loops to use the more idiomatic C style to help avoid fencepost errors. Link: https://lore.kernel.org/r/20190927234026.23342-1-efremov@linux.com Link: https://lore.kernel.org/r/20190927234308.23935-1-efremov@linux.com Link: https://lore.kernel.org/r/20190916204158.6889-3-efremov@linux.com Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Sebastian Ott <sebott@linux.ibm.com> # arch/s390/ Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> # video/fbdev/ Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> # pci/controller/dwc/ Acked-by: Jack Wang <jinpu.wang@cloud.ionos.com> # scsi/pm8001/ Acked-by: Martin K. Petersen <martin.petersen@oracle.com> # scsi/pm8001/ Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # memstick/
2019-09-23Merge branch 'lorenzo/pci/tegra'Bjorn Helgaas7-42/+1854
- Fix Tegra OF node reference leak (Nishka Dasgupta) - Add #defines for PCIe Data Link Feature and Physical Layer 16.0 GT/s features (Vidya Sagar) - Disable MSI for Tegra Root Ports since they don't support using MSI for all Root Port events (Vidya Sagar) - Group DesignWare write-protected register writes together (Vidya Sagar) - Move DesignWare capability search interfaces so they can be used by both host and endpoint drivers (Vidya Sagar) - Add DesignWare extended capability search interfaces (Vidya Sagar) - Export dw_pcie_wait_for_link() so drivers can be modules (Vidya Sagar) - Add "snps,enable-cdm-check" DT binding for Configuration Dependent Module (CDM) register checking (Vidya Sagar) - Add DesignWare support for "snps,enable-cdm-check" CDM checking (Vidya Sagar) - Add "supports-clkreq" DT binding for host drivers to decide whether to advertise low power features (Vidya Sagar) - Add DT binding for Tegra194 (Vidya Sagar) - Add DT binding for Tegra194 P2U (PIPE to UPHY) block (Vidya Sagar) - Add support for Tegra194 P2U (PIPE to UPHY) (Vidya Sagar) - Add support for Tegra194 host controller (Vidya Sagar) - Add Tegra support for sideband PERST# and CLKREQ# for C5 (Vidya Sagar) - Add Tegra support for slot regulators for p2972-0000 platform (Vidya Sagar) * lorenzo/pci/tegra: arm64: tegra: Add PCIe slot supply information in p2972-0000 platform arm64: tegra: Add configuration for PCIe C5 sideband signals PCI: tegra: Add support to enable slot regulators PCI: tegra: Add support to configure sideband pins dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries dt-bindings: PCI: tegra: Add sideband pins configuration entries PCI: tegra: Add Tegra194 PCIe support phy: tegra: Add PCIe PIPE2UPHY support dt-bindings: PHY: P2U: Add Tegra194 P2U block dt-bindings: PCI: tegra: Add device tree support for Tegra194 dt-bindings: Add PCIe supports-clkreq property PCI: dwc: Add support to enable CDM register check dt-bindings: PCI: designware: Add binding for CDM register check PCI: dwc: Export dw_pcie_wait_for_link() API PCI: dwc: Add extended configuration space capability search API PCI: dwc: Move config space capability search API PCI: dwc: Group DBI registers writes requiring unlocking PCI: Disable MSI for Tegra root ports PCI: Add #defines for some of PCIe spec r4.0 features PCI: tegra: Fix OF node reference leak
2019-09-23Merge branch 'remotes/lorenzo/pci/misc'Bjorn Helgaas4-9/+8
- Propagate regulator_get_optional() errors so callers can distinguish real errors from optional regulators that are absent (Thierry Reding) - Propagate devm_of_phy_get() errors so callers can distinguish real errors from optional PHYs that are absent (Thierry Reding) - Add Andrew Murray as PCI native driver reviewer (Lorenzo Pieralisi) * remotes/lorenzo/pci/misc: MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer PCI: iproc: Propagate errors for optional PHYs PCI: histb: Propagate errors for optional regulators PCI: armada8x: Propagate errors for optional PHYs PCI: imx6: Propagate errors for optional regulators PCI: exynos: Propagate errors for optional PHYs PCI: rockchip: Propagate errors for optional regulators
2019-09-23Merge branch 'remotes/lorenzo/pci/layerscape'Bjorn Helgaas3-3/+21
- Mark Layerscape endpoint BARs 2 and 4 as 64-bit (Xiaowei Bao) - Add CONFIG_PCI_LAYERSCAPE_EP so EP/RC can be built separately (Xiaowei Bao) * remotes/lorenzo/pci/layerscape: PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately PCI: layerscape: Add the bar_fixed_64bit property to the endpoint driver
2019-09-23Merge branch 'remotes/lorenzo/pci/imx'Bjorn Helgaas1-0/+33
- Reduce i.MX 6Quad DBI register length to avoid aborts from accessing invalid registers (Stefan Agner) * remotes/lorenzo/pci/imx: PCI: imx6: Limit DBI register length
2019-09-23Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas2-3/+5
- Make kirin_dw_pcie_ops constant (Nishka Dasgupta) - Make DesignWare "num-lanes" property optional and remove from relevant DTs (Hou Zhiqiang) * remotes/lorenzo/pci/dwc: arm64: dts: fsl: Remove num-lanes property from PCIe nodes ARM: dts: ls1021a: Remove num-lanes property from PCIe nodes PCI: dwc: Return directly when num-lanes is not found dt-bindings: PCI: designware: Remove the num-lanes from Required properties PCI: kirin: Make structure kirin_dw_pcie_ops constant
2019-09-20PCI: tegra: Add support to enable slot regulatorsVidya Sagar1-0/+83
Add support to get regulator information of 3.3V and 12V supplies of a PCIe slot from the respective controller's device-tree node and enable those supplies. This is required in platforms like p2972-0000 where the supplies to x16 slot owned by C5 controller need to be enabled before attempting to enumerate the devices. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
2019-09-20PCI: tegra: Add support to configure sideband pinsVidya Sagar1-2/+10
Add support to configure sideband signal pins when the information is present in the respective controller device-tree node. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [bhelgaas: fold in YueHaibing's fix for build error without CONFIG_PINCTRL; https://lore.kernel.org/r/20190920014807.38288-1-yuehaibing@huawei.com] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
2019-09-16PCI: dwc: Add validation that PCIe core is set to correct modeJonathan Chocron2-0/+24
Some PCIe controllers can be set to either Host or EP according to some early boot FW. To make sure there is no discrepancy (e.g. FW configured the port to EP mode while the DT specifies it as a host bridge or vice versa), a check has been added for each mode. Signed-off-by: Jonathan Chocron <jonnyc@amazon.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2019-09-16PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driverJonathan Chocron2-0/+377
This driver is DT based and utilizes the DesignWare APIs. It allows using a smaller ECAM range for a larger bus range - usually an entire bus uses 1MB of address space, but the driver can use it for a larger number of buses. This is achieved by using a HW mechanism which allows changing the BUS part of the "final" outgoing config transaction. There are 2 HW regs, one which is basically a bitmask determining which bits to take from the AXI transaction itself and another which holds the complementary part programmed by the driver. All link initializations are handled by the boot FW. Signed-off-by: Jonathan Chocron <jonnyc@amazon.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-09-08PCI: tegra: Add Tegra194 PCIe supportVidya Sagar4-1/+1653
Add support for Synopsys DesignWare core IP based PCIe host controller present in the Tegra194 SoC. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
2019-09-04PCI: histb: Propagate errors for optional regulatorsThierry Reding1-2/+2
regulator_get_optional() can fail for a number of reasons besides probe deferral. It can for example return -ENOMEM if it runs out of memory as it tries to allocate data structures. Propagating only -EPROBE_DEFER is problematic because it results in these legitimately fatal errors being treated as "regulator not specified in DT". What we really want is to ignore the optional regulators only if they have not been specified in DT. regulator_get_optional() returns -ENODEV in this case, so that's the special case that we need to handle. So we propagate all errors, except -ENODEV, so that real failures will still cause the driver to fail probe. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Cc: Shawn Guo <shawn.guo@linaro.org>
2019-09-04PCI: armada8x: Propagate errors for optional PHYsThierry Reding1-4/+3
devm_of_phy_get_by_index() can fail for a number of reasons besides probe deferral. It can for example return -ENOMEM if it runs out of memory as it tries to allocate devres structures. Propagating only -EPROBE_DEFER is problematic because it results in these legitimately fatal errors being treated as "PHY not specified in DT". What we really want is to ignore the optional PHYs only if they have not been specified in DT. devm_of_phy_get_by_index() returns -ENODEV in this case, so that's the special case that we need to handle. So we propagate all errors, except -ENODEV, so that real failures will still cause the driver to fail probe. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2019-09-04PCI: imx6: Propagate errors for optional regulatorsThierry Reding1-2/+2
regulator_get_optional() can fail for a number of reasons besides probe deferral. It can for example return -ENOMEM if it runs out of memory as it tries to allocate data structures. Propagating only -EPROBE_DEFER is problematic because it results in these legitimately fatal errors being treated as "regulator not specified in DT". What we really want is to ignore the optional regulators only if they have not been specified in DT. regulator_get_optional() returns -ENODEV in this case, so that's the special case that we need to handle. So we propagate all errors, except -ENODEV, so that real failures will still cause the driver to fail probe. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: kernel@pengutronix.de Cc: linux-imx@nxp.com
2019-09-04PCI: exynos: Propagate errors for optional PHYsThierry Reding1-1/+1
devm_of_phy_get() can fail for a number of reasons besides probe deferral. It can for example return -ENOMEM if it runs out of memory as it tries to allocate devres structures. Propagating only -EPROBE_DEFER is problematic because it results in these legitimately fatal errors being treated as "PHY not specified in DT". What we really want is to ignore the optional PHYs only if they have not been specified in DT. devm_of_phy_get() returns -ENODEV in this case, so that's the special case that we need to handle. So we propagate all errors, except -ENODEV, so that real failures will still cause the driver to fail probe. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org>
2019-08-22PCI: dwc: Return directly when num-lanes is not foundHou Zhiqiang1-2/+4
The num-lanes is optional since it is not needed on some platforms that bring up the link in firmware. The link programming is based on the num-lanes properties (which is optional); if it is not present code must return instead of fiddling with the lanes value to print an error message. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-08-21PCI: kirin: Make structure kirin_dw_pcie_ops constantNishka Dasgupta1-1/+1
Static variable kirin_dw_pcie_ops, of type dw_pcie_ops, is used only once, when it is assigned to the constant field ops of variable pci (having type dw_pcie) so kirin_dw_pcie_ops is never modified. Make it constant to protect it from unintended modification. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-08-15PCI: imx6: Limit DBI register lengthStefan Agner1-0/+33
Define the length of the DBI registers and limit config space to its length. This makes sure that the kernel does not access registers beyond that point, avoiding the following abort on a i.MX 6Quad: # cat /sys/devices/soc0/soc/1ffc000.pcie/pci0000\:00/0000\:00\:00.0/config [ 100.021433] Unhandled fault: imprecise external abort (0x1406) at 0xb6ea7000 ... [ 100.056423] PC is at dw_pcie_read+0x50/0x84 [ 100.060790] LR is at dw_pcie_rd_own_conf+0x44/0x48 ... Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2019-08-14PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separatelyXiaowei Bao2-3/+20
Add CONFIG_PCI_LAYERSCAPE_EP so that endpoint and host controller drivers can be built separately. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-08-14PCI: layerscape: Add the bar_fixed_64bit property to the endpoint driverXiaowei Bao1-0/+1
The layerscape PCIe controller have 4 BARs. BAR0 and BAR1 are 32bit, BAR2 and BAR4 are 64bit and that's a fixed hardware configuration. Set the bar_fixed_64bit variable accordingly. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> [lorenzo.pieralisi@arm.com: commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-13PCI: dwc: Add support to enable CDM register checkVidya Sagar2-0/+16
Add support to enable CDM (Configuration Dependent Module) register check for any data corruption based on the DT property 'snps,enable-cdm-check'. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2019-08-13PCI: dwc: Export dw_pcie_wait_for_link() APIVidya Sagar1-0/+1
Export the dw_pcie_wait_for_link() function to be able to build drivers using it as loadable modules. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-08-13PCI: dwc: Add extended configuration space capability search APIVidya Sagar2-0/+42
Add extended configuration space capability search API using struct dw_pcie* pointer. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Acked-by: Thierry Reding <treding@nvidia.com>
2019-08-13PCI: dwc: Move config space capability search APIVidya Sagar3-35/+43
Move PCIe config space capability search API to common DesignWare file as this can be used by both host and EP mode drivers. Signed-off-by: Vidya Sagar <vidyaos@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2019-08-13PCI: dwc: Group DBI registers writes requiring unlockingVidya Sagar1-6/+8
Some of DesignWare core's DBI registers (a.k.a configuration space registers) are write-protected with a lock without enabling which they are read-only by default. These write-protected registers are implementation specific. Tegra194's BAR-0 register which is at offset 0x10 in the configuration space is an example. Current implementation in dw_pcie_setup_rc() API attempts to unlock those write-protected registers whenever they are updated and lock them back again for writing. Group all write-protected registers writes so that locking and unlocking is performed once to avoid bloating the code with multiple unlock/lock sequences for all those write-protected registers. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Jingoo Han <jingoohan1@gmail.com>
2019-07-12Merge branch 'pci/trivial'Bjorn Helgaas2-2/+2
- Fix typos and whitespace errors (Bjorn Helgaas) * pci/trivial: PCI: Fix typos and whitespace errors
2019-07-12Merge branch 'remotes/lorenzo/pci/qcom'Bjorn Helgaas1-61/+54
- Move qcom driver to bulk clock API (Bjorn Andersson) - Add Qualcomm QCS404 PCIe controller support (Bjorn Andersson) - Ensure Qualcomm PERST is asserted for at least 100ms (Niklas Cassel) * remotes/lorenzo/pci/qcom: PCI: qcom: Ensure that PERST is asserted for at least 100 ms PCI: qcom: Add QCS404 PCIe controller support dt-bindings: PCI: qcom: Add QCS404 to the binding PCI: qcom: Use clk bulk API for 2.4.0 controllers
2019-07-12Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas5-35/+80
- Add dwc API support to de-initialize host (Vidya Sagar) - Clean up dwc DBI,ATU read and write APIs (Vidya Sagar) - Export dwc APIs to support .remove() so drivers can be modular (Vidya Sagar) - Simplify imx6 Kconfig dependencies (Leonard Crestez) - Fix dra7xx build error when !CONFIG_GPIOLIB (YueHaibing) * remotes/lorenzo/pci/dwc: PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIB PCI: imx6: Simplify Kconfig depends on PCI: dwc: Export APIs to support .remove() implementation PCI: dwc: Cleanup DBI,ATU read and write APIs PCI: dwc: Add API support to de-initialize host
2019-07-09PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIBYueHaibing1-0/+1
If CONFIG_GPIOLIB is not selected the compilation results in the following build errors: drivers/pci/controller/dwc/pci-dra7xx.c: In function dra7xx_pcie_probe: drivers/pci/controller/dwc/pci-dra7xx.c:777:10: error: implicit declaration of function devm_gpiod_get_optional; did you mean devm_regulator_get_optional? [-Werror=implicit-function-declaration] reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH); drivers/pci/controller/dwc/pci-dra7xx.c:778:45: error: ‘GPIOD_OUT_HIGH’ undeclared (first use in this function); did you mean ‘GPIOF_INIT_HIGH’? reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH); ^~~~~~~~~~~~~~ GPIOF_INIT_HIGH Fix them by including the appropriate header file. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> [lorenzo.pieralisi@arm.com: commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-07-09PCI: Fix typos and whitespace errorsBjorn Helgaas2-2/+2
Fix typos in drivers/pci. Comment and whitespace changes only. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
2019-07-05PCI: imx6: Simplify Kconfig depends onLeonard Crestez1-1/+1
The imx6 driver can be used on imx6sx without enabling support for imx6q or imx7d but the "depends on" condition doesn't allow that. Instead of making the condition even longer just make it depend on "ARCH_MXC || COMPILE_TEST" instead. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Lucas Stach <l.stach@pengutronix.de>
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