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path: root/drivers/pci/controller/dwc/pcie-designware.h
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2018-10-17PCI: keystone: Cleanup ks_pcie_link_up()Kishon Vijay Abraham I1-0/+4
ks_pcie_link_up() uses registers from the designware core to get the status of the link. Move the register defines to pcie-designware.h and cleanup ks_pcie_link_up(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2018-09-20PCI: dwc: Fix scheduling while atomic issuesJisheng Zhang1-2/+1
When programming the inbound/outbound ATUs, we call usleep_range() after each checking PCIE_ATU_ENABLE bit. Unfortunately, the ATU programming can be executed in atomic context: inbound ATU programming could be called through pci_epc_write_header() =>dw_pcie_ep_write_header() =>dw_pcie_prog_inbound_atu() outbound ATU programming could be called through pci_bus_read_config_dword() =>dw_pcie_rd_conf() =>dw_pcie_prog_outbound_atu() Fix this issue by calling mdelay() instead. Fixes: f8aed6ec624f ("PCI: dwc: designware: Add EP mode support") Fixes: d8bbeb39fbf3 ("PCI: designware: Wait for iATU enable") Signed-off-by: Jisheng Zhang <[email protected]> [[email protected]: commit log update] Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Gustavo Pimentel <[email protected]>
2018-07-19PCI: dwc: Add legacy interrupt callback handlerGustavo Pimentel1-0/+6
Currently DesignWare IP does not handle legacy interrupts. Add a legacy interrupt callback handler. Signed-off-by: Gustavo Pimentel <[email protected]> [[email protected]: updated commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Kishon Vijay Abraham I <[email protected]>
2018-07-19PCI: dwc: Rework MSI callbacks handlerGustavo Pimentel1-11/+0
Remove duplicate defines located on pcie-designware.h file already available on /include/uapi/linux/pci-regs.h file. Signed-off-by: Gustavo Pimentel <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Kishon Vijay Abraham I <[email protected]>
2018-07-19PCI: dwc: Add MSI-X callbacks handlerGustavo Pimentel1-0/+10
Add PCIe config space capability search function. Add sysfs set/get interface to allow the change of EP MSI-X maximum number. Add EP MSI-X callback for triggering interruptions. Signed-off-by: Gustavo Pimentel <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Kishon Vijay Abraham I <[email protected]>
2018-07-19PCI: Update xxx_pcie_ep_raise_irq() and pci_epc_raise_irq() signaturesGustavo Pimentel1-1/+1
Change {cdns, dra7xx, artpec6, dw, rockchip}_pcie_ep_raise_irq() and pci_epc_raise_irq() signature, namely the interrupt_num variable type from u8 to u16 to accommodate 2048 maximum MSI-X interrupts. Signed-off-by: Gustavo Pimentel <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Alan Douglas <[email protected]> Acked-by: Shawn Lin <[email protected]> Acked-by: Jesper Nilsson <[email protected]> Acked-by: Joao Pinto <[email protected]> Acked-by: Kishon Vijay Abraham I <[email protected]>
2018-06-08PCI: Collect all native drivers under drivers/pci/controller/Shawn Lin1-0/+387
Native PCI drivers for root complex devices were originally all in drivers/pci/host/. Some of these devices can also be operated in endpoint mode. Drivers for endpoint mode didn't seem to fit in the "host" directory, so we put both the root complex and endpoint drivers in per-device directories, e.g., drivers/pci/dwc/, drivers/pci/cadence/, etc. These per-device directories contain trivial Kconfig and Makefiles and clutter drivers/pci/. Make a new drivers/pci/controllers/ directory and collect all the device-specific drivers there. No functional change intended. Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Shawn Lin <[email protected]> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <[email protected]>
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