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2024-06-16Delay mlx5_ib internal resources allocationsLeon Romanovsky3-1/+437
From: Leon Romanovsky <[email protected]> Internal mlx5_ib resources are created during mlx5_ib module load. This behavior is not optimal because it consumes resources that are not needed when SFs are created. This patch series delays the creation of mlx5_ib internal resources to the stage when they actually used. Signed-off-by: Leon Romanovsky <[email protected]>
2024-06-16net/mlx5: Reimplement write combining testJianbo Liu3-1/+437
The test of write combining was added before in mlx5_ib driver. It opens UD QP and posts NOP WQEs, and uses BlueFlame doorbell. When BlueFlame is used, WQEs get written directly to a PCI BAR of the device (in addition to memory) so that the device handles them without having to access memory. In this test, the WQEs written in memory are different from the ones written to the BlueFlame which request CQE update. By checking the completion reports posted on CQ, we can know if BlueFlame succeeds or not. The write combining must be supported if BlueFlame succeeds as its register is written using write combining. This patch reimplements the test in the same way, but using a pair of SQ and CQ only. It is moved to mlx5_core as a general feature used by both mlx5_core and mlx5_ib. Besides, save write combine test result of the PCI function, so that its thousands of child functions such as SF can query without paying the time and resource penalty by itself. The test function is called only after failing to get the cached result. With this enhancement, all thousands of SFs of the PF attached to same driver no longer need to perform WC check explicitly, which is already done in the system. This saves several commands per SF, thereby speeds up SF creation and also saves completion EQ creation. Signed-off-by: Jianbo Liu <[email protected]> Reviewed-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/4ff5a8cc4c5b5b0d98397baa45a5019bcdbf096e.1717409369.git.leon@kernel.org Signed-off-by: Leon Romanovsky <[email protected]>
2024-06-16Merge branch 'mana-shared' of ↵Leon Romanovsky76-537/+1124
git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma Leon Romanovsky says: ==================== net: mana: Allow variable size indirection table Like we talked, I created new shared branch for this patch: https://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git/log/?h=mana-shared * 'mana-shared' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: net: mana: Allow variable size indirection table ==================== Link: https://lore.kernel.org/all/20240612183051.GE4966@unreal Signed-off-by: Leon Romanovsky <[email protected]>
2024-06-14mlxsw: Use the same maximum MTU value throughout the driverAmit Cohen3-26/+6
Currently, the driver uses two different values for maximum MTU, one is stored in mlxsw_port->dev->max_mtu and the second is stored in mlxsw_port->max_mtu. The second one is set to value which is queried from firmware. This value was never tested, and unfortunately is not really supported. That means that with the existing code, user can set MTU to X, which is not really supported by firmware and which is bigger than buffer size which is allocated in pci. To make the driver consistent, use only mlxsw_port->dev->max_mtu for maximum MTU value, for buffers headroom add Ethernet frame headers, which are not included in mlxsw_port->dev->max_mtu. Remove mlxsw_port->max_mtu. Signed-off-by: Amit Cohen <[email protected]> Reviewed-by: Ido Schimmel <[email protected]> Signed-off-by: Petr Machata <[email protected]> Link: https://lore.kernel.org/r/89fa6f804386b918d337e736e14ac291bb947483.1718275854.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14mlxsw: spectrum: Set more accurate values for netdevice min/max MTUAmit Cohen1-4/+2
Currently, the driver uses ETH_MAX_MTU as maximum MTU of netdevices, instead, use the accurate value which is supported by the driver. Subtract Ethernet headers which are taken into account by hardware for MTU checking, as described in the previous patch. Set minimum MTU to ETH_MIN_MTU, as zero MTU is not really supported. With this change: a. The stack will do the MTU checking, so we can remove it from the driver. b. User space will be able to query the actual MTU limits. Before this patch: $ ip -j -d link show dev swp1 | jq | grep mtu "mtu": 1500, "min_mtu": 0, "max_mtu": 65535, With this patch: $ ip -j -d link show dev swp1 | jq | grep mtu "mtu": 1500, "min_mtu": 68, "max_mtu": 10218, Signed-off-by: Amit Cohen <[email protected]> Reviewed-by: Ido Schimmel <[email protected]> Signed-off-by: Petr Machata <[email protected]> Link: https://lore.kernel.org/r/be8232e38c196ecb607f82c5e000ea427ce22abb.1718275854.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14mlxsw: Adjust MTU value to hardware checkAmit Cohen2-1/+2
Ethernet frame consists of - Ethernet header, payload, FCS. The MTU value which is used by user is the size of the payload, which means that when user sets MTU to X, the total frame size will be larger due to the addition of the Ethernet header and FCS. Spectrum ASICs take into account Ethernet header and FCS as part of packet size for MTU check. Adjust MTU value when user sets MTU, to configure the MTU size which is required by hardware. The Tx header length which was used by the driver is not relevant for such calculation, take into account Ethernet header (with VLAN extension) and FCS. Signed-off-by: Amit Cohen <[email protected]> Reviewed-by: Ido Schimmel <[email protected]> Signed-off-by: Petr Machata <[email protected]> Link: https://lore.kernel.org/r/f3203c2477bb8ed18b1e79642fa3e3713e1e55bb.1718275854.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14mlxsw: port: Edit maximum MTU valueAmit Cohen1-1/+1
Currently mlxsw driver supports up to 10000 bytes for maximum MTU, this value is not accurate, we can support up to 10K bytes. Change the value to the maximum supported MTU by firmware. Signed-off-by: Amit Cohen <[email protected]> Reviewed-by: Ido Schimmel <[email protected]> Signed-off-by: Petr Machata <[email protected]> Link: https://lore.kernel.org/r/666f51681234aeef09d771833ccb6e94bd323c88.1718275854.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net: stmmac: clean up stmmac_mac_select_pcs()Russell King (Oracle)1-1/+1
Since all platform providers of PCS now populate the select_pcs() method, there is no need for the common code to look at priv->hw->phylink_pcs, so remove it. Reviewed-by: Romain Gantois <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net: stmmac: dwmac-socfpga: provide select_pcs() implementationRussell King (Oracle)1-0/+7
Provide a .select_pcs() implementation which returns the phylink PCS that was created in the .pcs_init() method. Reviewed-by: Romain Gantois <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net: stmmac: dwmac-rzn1: provide select_pcs() implementationRussell King (Oracle)1-0/+7
Provide a .select_pcs() implementation which returns the phylink PCS that was created in the .pcs_init() method. Tested-by: Romain Gantois <[email protected]> Reviewed-by: Romain Gantois <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net: stmmac: dwmac-intel: provide a select_pcs() implementationRussell King (Oracle)2-3/+11
Move the code returning the XPCS into dwmac-intel, which is the only user of XPCS. Fill in the select_pcs() implementation only when we are going to setup the XPCS, thus when it should be present. Signed-off-by: Russell King (Oracle) <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net: stmmac: add select_pcs() platform methodRussell King (Oracle)1-0/+7
Allow platform drivers to provide their logic to select an appropriate PCS. Tested-by: Romain Gantois <[email protected]> Reviewed-by: Romain Gantois <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14Merge branch '40GbE' of ↵Jakub Kicinski2-3/+30
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2024-06-11 (ice) This series contains updates to ice driver only. En-Wei Wu resolves IRQ collision during suspend. Paul corrects 200Gbps speed being reported as unknown. Wojciech adds retry mechanism when package download fails. * '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: ice: implement AQ download pkg retry ice: fix 200G link speed message log ice: avoid IRQ collision to fix init failure on ACPI S3 resume ==================== Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5e: Support SWP-mode offload L4 csum calculationRahul Rameshbabu2-1/+42
Calculate the pseudo-header checksum for both IPSec transport mode and IPSec tunnel mode for mlx5 devices that do not implement a pure hardware checksum offload for L4 checksum calculation. Introduce a capability bit that identifies such mlx5 devices. Signed-off-by: Rahul Rameshbabu <[email protected]> Reviewed-by: Gal Pressman <[email protected]> Reviewed-by: Cosmin Ratiu <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5e: Use tcp_v[46]_check checksum helpersGal Pressman1-5/+4
Use the tcp specific helpers to calculate the tcp pseudo header checksum instead of the csum_*_magic ones. Signed-off-by: Gal Pressman <[email protected]> Reviewed-by: Rahul Rameshbabu <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5e: Fix outdated comment in features checkGal Pressman1-1/+1
The code no longer treats only UDP tunnels, adjust the outdated comment. Signed-off-by: Gal Pressman <[email protected]> Reviewed-by: Cosmin Ratiu <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5: Replace strcpy with strscpyMoshe Shemesh1-2/+2
Replace deprecated strcpy with strscpy. Signed-off-by: Moshe Shemesh <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5: CT: Separate CT and CT-NAT tuple entriesChris Mi1-44/+143
Currently a ct entry is stored in both ct and ct-nat tables. ct action is directed to the ct table, while ct nat action is directed to the nat table. ct-nat entries perform the nat header rewrites, if required. The current design assures that a ct action will match in hardware even if the tuple has nat configured, it will just not execute it. However, storing each connection in two tables increases the system's memory consumption while reducing its insertion rate. Offload a connection to either ct or the ct-nat table. Add a miss fall-through rule from ct-nat table to the ct table allowing ct(nat) action on non-natted connections. ct action on natted connections, by default, will be handled by the software miss path. Signed-off-by: Paul Blakey <[email protected]> Signed-off-by: Chris Mi <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net/mlx5: Correct TASR typo into TSARCosmin Ratiu1-1/+1
TSAR is the correct spelling (Transmit Scheduling ARbiter). Signed-off-by: Cosmin Ratiu <[email protected]> Reviewed-by: Gal Pressman <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net: phy: realtek: add support for rtl8224 2.5Gbps PHYChris Packham1-0/+8
The Realtek RTL8224 PHY is a 2.5Gbps capable PHY. It only uses the clause 45 MDIO interface and can leverage the support that has already been added for the other 822x PHYs. Signed-off-by: Chris Packham <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14eth: lan966x: don't clear unsupported statsJakub Kicinski1-8/+0
Commit 12c2d0a5b8e2 ("net: lan966x: add ethtool configuration and statistics") added support for various standard stats. We should not clear the stats which are not collected by the device. Core code uses a special initializer to detect when device does not report given stat. Acked-by: Horatiu Vultur <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14Merge tag 'wireless-2024-06-14' of ↵Jakub Kicinski3-2/+4
git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless Johannes Berg says: ==================== Various fixes: * cfg80211: wext scan * mac80211: monitor regression, scan counted_by, offload * iwlwifi: locking, 6 GHz scan, remain-on-channel * tag 'wireless-2024-06-14' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless: wifi: mac80211: fix monitor channel with chanctx emulation wifi: mac80211: Avoid address calculations via out of bounds array indexing wifi: mac80211: Recalc offload when monitor stop wifi: iwlwifi: scan: correctly check if PSC listen period is needed wifi: iwlwifi: mvm: fix ROC version check wifi: iwlwifi: mvm: unlock mvm mutex wifi: cfg80211: wext: add extra SIOCSIWSCAN data check wifi: cfg80211: wext: set ssids=NULL for passive scans ==================== Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-14net: stmmac: dwmac-stm32: add management of stm32mp13 for stm32Christophe Roullier1-4/+28
Add Ethernet support for STM32MP13. STM32MP13 is STM32 SOC with 2 GMACs instances. GMAC IP version is SNPS 4.20. GMAC IP configure with 1 RX and 1 TX queue. DMA HW capability register supported RX Checksum Offload Engine supported TX Checksum insertion supported Wake-Up On Lan supported TSO supported Signed-off-by: Christophe Roullier <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2024-06-14net: stmmac: dwmac-stm32: Mask support for PMCR configurationChristophe Roullier1-9/+19
Add possibility to have second argument in syscon property to manage mask. This mask will be used to address right BITFIELDS of PMCR register. Signed-off-by: Christophe Roullier <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2024-06-14net: stmmac: dwmac-stm32: Fix Mhz to MHzMarek Vasut1-2/+2
Trivial, fix up the comments using 'Mhz' to 'MHz'. No functional change. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Christophe Roullier <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2024-06-14net: stmmac: dwmac-stm32: Clean up the debug printsMarek Vasut1-10/+8
Use dev_err()/dev_dbg() and phy_modes() to print PHY mode instead of pr_debug() and hand-written PHY mode decoding. This way, each debug print has associated device with it and duplicated mode decoding is removed. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Christophe Roullier <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2024-06-14net: stmmac: dwmac-stm32: Extract PMCR configurationMarek Vasut1-10/+17
Pull the PMCR clock mux configuration into a separate function. This is the final change of three, which moves external clock rate validation, external clock selector decoding, and clock mux configuration into separate functions. This should make the code easier to understand. No functional change intended. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Christophe Roullier <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2024-06-14net: stmmac: dwmac-stm32: Separate out external clock selectorMarek Vasut1-12/+38
Pull the external clock selector into a separate function, to avoid conflating it with external clock rate validation and clock mux register configuration. This should make the code easier to read and understand. The dwmac->enable_eth_ck variable in the end indicates whether the MAC clock are supplied by external oscillator (true) or internal RCC clock IP (false). The dwmac->enable_eth_ck value is set based on multiple DT properties, some of them deprecated, some of them specific to bus mode. The following DT properties and variables are taken into account. In each case, if the property is present or true, MAC clock is supplied by external oscillator. - "st,ext-phyclk", assigned to variable dwmac->ext_phyclk - Used in any mode (MII/RMII/GMII/RGMII) - The only non-deprecated DT property of the three - "st,eth-clk-sel", assigned to variable dwmac->eth_clk_sel_reg - Valid only in GMII/RGMII mode - Deprecated property, backward compatibility only - "st,eth-ref-clk-sel", assigned to variable dwmac->eth_ref_clk_sel_reg - Valid only in RMII mode - Deprecated property, backward compatibility only The stm32mp1_select_ethck_external() function handles the aforementioned DT properties and sets dwmac->enable_eth_ck accordingly. The stm32mp1_set_mode() is adjusted to call stm32mp1_select_ethck_external() first and then only use dwmac->enable_eth_ck to determine hardware clock mux settings. No functional change intended. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Christophe Roullier <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2024-06-14net: stmmac: dwmac-stm32: Separate out external clock rate validationMarek Vasut1-10/+41
Pull the external clock frequency validation into a separate function, to avoid conflating it with external clock DT property decoding and clock mux register configuration. This should make the code easier to read and understand. This does change the code behavior slightly. The clock mux PMCR register setting now depends solely on the DT properties which configure the clock mux between external clock and internal RCC generated clock. The mux PMCR register settings no longer depend on the supplied clock frequency, that supplied clock frequency is now only validated, and if the clock frequency is invalid for a mode, it is rejected. Previously, the code would switch the PMCR register clock mux to internal RCC generated clock if external clock couldn't provide suitable frequency, without checking whether the RCC generated clock frequency is correct. Such behavior is risky at best, user should have configured their clock correctly in the first place, so this behavior is removed here. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Christophe Roullier <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Improve error message in gswip_port_fdb()Martin Blumenstingl1-1/+2
Print that no FID is found for bridge %s instead of the incorrect message that the port is not part of a bridge. Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Update comments in gswip_port_vlan_filtering()Martin Blumenstingl1-2/+2
Update the comments in gswip_port_vlan_filtering() so it's clear that there are two separate cases, one for "tag based VLAN" and another one for "port based VLAN". Suggested-by: Martin Schiller <[email protected]> Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Remove dead code from gswip_add_single_port_br()Martin Schiller1-6/+0
The port validation in gswip_add_single_port_br() is superfluous and can be omitted. Suggested-by: Vladimir Oltean <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Consistently use macros for the mac bridge tableMartin Blumenstingl1-7/+11
Only bits [5:0] in mac_bridge.key[3] are reserved for the FID. Also, for dynamic (learned) entries, bits [7:4] in mac_bridge.val[0] represents the port. Introduce new macros GSWIP_TABLE_MAC_BRIDGE_KEY3_FID and GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT macro and use it throughout the driver. Also rename and update GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC to use the BIT() macro. This makes the driver code easier to understand. Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Change literal 6 to ETH_ALENMartin Blumenstingl1-1/+1
The addr variable in gswip_port_fdb_dump() stores a mac address. Use ETH_ALEN to make this consistent across other drivers. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Use dsa_is_cpu_port() in gswip_port_change_mtu()Martin Blumenstingl1-2/+1
Make the check for the CPU port in gswip_port_change_mtu() consistent with other areas of the driver by using dsa_is_cpu_port(). Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: do also enable or disable cpu portMartin Schiller1-16/+8
Before commit 74be4babe72f ("net: dsa: do not enable or disable non user ports"), gswip_port_enable/disable() were also executed for the cpu port in gswip_setup() which disabled the cpu port during initialization. Let's restore this by removing the dsa_is_user_port checks. Also, let's clean up the gswip_port_enable() function so that we only have to check for the cpu port once. The operation reordering done here is safe. Signed-off-by: Martin Schiller <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Don't manually call gswip_port_enable()Martin Blumenstingl1-2/+0
We don't need to manually call gswip_port_enable() from within gswip_setup() for the CPU port. DSA does this automatically for us. Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Use dev_err_probe where appropriateMartin Blumenstingl1-28/+25
dev_err_probe() can be used to simplify the existing code. Also it means we get rid of the following warning which is seen whenever the PMAC (Ethernet controller which connects to GSWIP's CPU port) has not been probed yet: gswip 1e108000.switch: dsa switch register failed: -517 Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: add terminating \n where missingMartin Schiller1-7/+7
Some dev_err are missing the terminating \n. Let's add that. Suggested-by: Vladimir Oltean <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: dsa: lantiq_gswip: Only allow phy-mode = "internal" on the CPU portMartin Blumenstingl1-0/+2
Add the CPU port to gswip_xrx200_phylink_get_caps() and gswip_xrx300_phylink_get_caps(). It connects through a SoC-internal bus, so the only allowed phy-mode is PHY_INTERFACE_MODE_INTERNAL. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Acked-by: Hauke Mehrtens <[email protected]> Signed-off-by: Martin Schiller <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13net: mvpp2: use slab_build_skb for oversized framesAryan Srivastava1-1/+4
Setting frag_size to 0 to indicate kmalloc has been deprecated, use slab_build_skb directly. Fixes: ce098da1497c ("skbuff: Introduce slab_build_skb()") Signed-off-by: Aryan Srivastava <[email protected]> Reviewed-by: Kees Cook <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13Merge branch 'mana-shared' of ↵Jakub Kicinski2-21/+91
git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma Leon Romanovsky says: ==================== net: mana: Allow variable size indirection table Like we talked, I created new shared branch for this patch: https://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git/log/?h=mana-shared * 'mana-shared' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: net: mana: Allow variable size indirection table ==================== Link: https://lore.kernel.org/all/20240612183051.GE4966@unreal Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski18-63/+137
Cross-merge networking fixes after downstream PR. No conflicts, no adjacent changes. Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13ice: implement AQ download pkg retryWojciech Drewek1-2/+21
ice_aqc_opc_download_pkg (0x0C40) AQ sporadically returns error due to FW issue. Fix this by retrying five times before moving to Safe Mode. Sleep for 20 ms before retrying. This was tested with the 4.40 firmware. Fixes: c76488109616 ("ice: Implement Dynamic Device Personalization (DDP) download") Reviewed-by: Michal Swiatkowski <[email protected]> Signed-off-by: Wojciech Drewek <[email protected]> Reviewed-by: Brett Creeley <[email protected]> Reviewed-by: Przemek Kitszel <[email protected]> Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <[email protected]>
2024-06-13ice: fix 200G link speed message logPaul Greenwalt1-0/+3
Commit 24407a01e57c ("ice: Add 200G speed/phy type use") added support for 200G PHY speeds, but did not include 200G link speed message support. As a result the driver incorrectly reports Unknown for 200G link speed. Fix this by adding 200G support to ice_print_link_msg(). Fixes: 24407a01e57c ("ice: Add 200G speed/phy type use") Reviewed-by: Michal Swiatkowski <[email protected]> Signed-off-by: Paul Greenwalt <[email protected]> Reviewed-by: Jesse Brandeburg <[email protected]> Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <[email protected]>
2024-06-13ice: avoid IRQ collision to fix init failure on ACPI S3 resumeEn-Wei Wu1-1/+6
A bug in https://bugzilla.kernel.org/show_bug.cgi?id=218906 describes that irdma would break and report hardware initialization failed after suspend/resume with Intel E810 NIC (tested on 6.9.0-rc5). The problem is caused due to the collision between the irq numbers requested in irdma and the irq numbers requested in other drivers after suspend/resume. The irq numbers used by irdma are derived from ice's ice_pf->msix_entries which stores mappings between MSI-X index and Linux interrupt number. It's supposed to be cleaned up when suspend and rebuilt in resume but it's not, causing irdma using the old irq numbers stored in the old ice_pf->msix_entries to request_irq() when resume. And eventually collide with other drivers. This patch fixes this problem. On suspend, we call ice_deinit_rdma() to clean up the ice_pf->msix_entries (and free the MSI-X vectors used by irdma if we've dynamically allocated them). On resume, we call ice_init_rdma() to rebuild the ice_pf->msix_entries (and allocate the MSI-X vectors if we would like to dynamically allocate them). Fixes: f9f5301e7e2d ("ice: Register auxiliary device to provide RDMA") Tested-by: Cyrus Lien <[email protected]> Signed-off-by: En-Wei Wu <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <[email protected]>
2024-06-13bnxt_en: Adjust logging of firmware messages in case of released token in ↵Aleksandr Mishin1-1/+1
__hwrm_send() In case of token is released due to token->state == BNXT_HWRM_DEFERRED, released token (set to NULL) is used in log messages. This issue is expected to be prevented by HWRM_ERR_CODE_PF_UNAVAILABLE error code. But this error code is returned by recent firmware. So some firmware may not return it. This may lead to NULL pointer dereference. Adjust this issue by adding token pointer check. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 8fa4219dba8e ("bnxt_en: add dynamic debug support for HWRM messages") Suggested-by: Michael Chan <[email protected]> Signed-off-by: Aleksandr Mishin <[email protected]> Reviewed-by: Wojciech Drewek <[email protected]> Reviewed-by: Michael Chan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13bnxt_en: Cap the size of HWRM_PORT_PHY_QCFG forwarded responseMichael Chan2-2/+61
Firmware interface 1.10.2.118 has increased the size of HWRM_PORT_PHY_QCFG response beyond the maximum size that can be forwarded. When the VF's link state is not the default auto state, the PF will need to forward the response back to the VF to indicate the forced state. This regression may cause the VF to fail to initialize. Fix it by capping the HWRM_PORT_PHY_QCFG response to the maximum 96 bytes. The SPEEDS2_SUPPORTED flag needs to be cleared because the new speeds2 fields are beyond the legacy structure. Also modify bnxt_hwrm_fwd_resp() to print a warning if the message size exceeds 96 bytes to make this failure more obvious. Fixes: 84a911db8305 ("bnxt_en: Update firmware interface to 1.10.2.118") Reviewed-by: Somnath Kotur <[email protected]> Reviewed-by: Pavan Chebbi <[email protected]> Signed-off-by: Michael Chan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-06-13auxbus: make to_auxiliary_drv accept and return a constant pointerGreg Kroah-Hartman3-5/+5
In the quest to make struct device constant, start by making to_auxiliary_drv() return a constant pointer so that drivers that call this can be fixed up before the driver core changes. As the return type previously was not constant, also fix up all callers that were assuming that the pointer was not going to be a constant one in order to not break the build. Cc: Dave Ertman <[email protected]> Cc: Ira Weiny <[email protected]> Cc: Rafael J. Wysocki <[email protected]> Cc: Bingbu Cao <[email protected]> Cc: Tianshu Qiu <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]> Cc: Michael Chan <[email protected]> Cc: David S. Miller <[email protected]> Cc: Eric Dumazet <[email protected]> Cc: Jakub Kicinski <[email protected]> Cc: Paolo Abeni <[email protected]> Cc: Jesse Brandeburg <[email protected]> Cc: Tony Nguyen <[email protected]> Cc: Saeed Mahameed <[email protected]> Cc: Leon Romanovsky <[email protected]> Cc: Tariq Toukan <[email protected]> Cc: Pierre-Louis Bossart <[email protected]> Cc: Liam Girdwood <[email protected]> Cc: Peter Ujfalusi <[email protected]> Cc: Bard Liao <[email protected]> Cc: Ranjani Sridharan <[email protected]> Cc: Daniel Baluta <[email protected]> Cc: Kai Vehmanen <[email protected]> Cc: Jaroslav Kysela <[email protected]> Cc: Takashi Iwai <[email protected]> Cc: Richard Cochran <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Sakari Ailus <[email protected]> # drivers/media/pci/intel/ipu6 Acked-by: Mark Brown <[email protected]> Reviewed-by: Martin Habets <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2024-06-13gve: Clear napi->skb before dev_kfree_skb_any()Ziwei Xiao1-3/+5
gve_rx_free_skb incorrectly leaves napi->skb referencing an skb after it is freed with dev_kfree_skb_any(). This can result in a subsequent call to napi_get_frags returning a dangling pointer. Fix this by clearing napi->skb before the skb is freed. Fixes: 9b8dd5e5ea48 ("gve: DQO: Add RX path") Cc: [email protected] Reported-by: Shailend Chand <[email protected]> Signed-off-by: Ziwei Xiao <[email protected]> Reviewed-by: Harshitha Ramamurthy <[email protected]> Reviewed-by: Shailend Chand <[email protected]> Reviewed-by: Praveen Kaligineedi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>