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2014-09-19Merge branch 'master' of ↵David S. Miller5-88/+83
git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates 2014-09-18 This series contains updates to ixgbe and ixgbevf. Ethan Zhao cleans up ixgbe and ixgbevf by removing bd_number from the adapter struct because it is not longer useful. Mark fixes ixgbe where if a hardware transmit timestamp is requested, an uninitialized workqueue entry may be scheduled. Added a check for a PTP clock to avoid that. Jacob provides a number of cleanups for ixgbe. Since we may call ixgbe_acquire_msix_vectors() prior to registering our netdevice, we should not use the netdevice specific printk and use e_dev_warn() instead. Similar to how ixgbevf handles acquiring MSI-X vectors, we can return an error code instead of relying on the flag being set. This makes it more clear that we have failed to setup MSI-X mode and will make it easier to consolidate MSI-X related code into a single function. In the case of disabling DCB, it is not an error since we still can function, we just have to let the user know. So use e_dev_warn() instead of e_err(). Added warnings for other features that are disabled when we are without MSI-X support. Cleanup flags that are no longer used or needed. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net/mlx4_en: Add mlx4_en_get_cqe helperIdo Shamay4-4/+11
This function derives the base address of the CQE from the CQE size, and calculates the real CQE context segment in it from the factor (this is like before). Before this change the code used the factor to calculate the base address of the CQE as well. The factor indicates in which segment of the cqe stride the cqe information is located. For 32-byte strides, the segment is 0, and for 64 byte strides, the segment is 1 (bytes 32..63). Using the factor was ok as long as we had only 32 and 64 byte strides. However, with larger strides, the factor is zero, and so cannot be used to calculate the base of the CQE. The helper uses the same method of CQE buffer pulling made by all other components that reads the CQE buffer (mlx4_ib driver and libmlx4). Signed-off-by: Ido Shamay <idos@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net/mlx4_core: Cache line EQE size supportIdo Shamay1-11/+19
Enable mlx4 interrupt handler to work with EQE stride feature, The feature may be enabled when cache line is bigger than 64B. The EQE size will then be the cache line size, and the context segment resides in [0-31] offset. Signed-off-by: Ido Shamay <idos@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net/mlx4_core: Enable CQE/EQE stride supportIdo Shamay4-4/+100
This feature is intended for archs having cache line larger then 64B. Since our CQE/EQEs are generally 64B in those systems, HW will write twice to the same cache line consecutively, causing pipe locks due to he hazard prevention mechanism. For elements in a cyclic buffer, writes are consecutive, so entries smaller than a cache line should be avoided, especially if they are written at a high rate. Reduce consecutive writes to same cache line in CQs/EQs, by allowing the driver to increase the distance between entries so that each will reside in a different cache line. Until the introduction of this feature, there were two types of CQE/EQE: 1. 32B stride and context in the [0-31] segment 2. 64B stride and context in the [32-63] segment This feature introduces two additional types: 3. 128B stride and context in the [0-31] segment (128B cache line) 4. 256B stride and context in the [0-31] segment (256B cache line) Modify the mlx4_core driver to query the device for the CQE/EQE cache line stride capability and to enable that capability when the host cache line size is larger than 64 bytes (supported cache lines are 128B and 256B). The mlx4 IB driver and libmlx4 need not be aware of this change. The PF context behaviour is changed to require this change in VF drivers running on such archs. Signed-off-by: Ido Shamay <idos@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19bnx2x: Add a fallback multi-function mode NPAR1.5Yuval Mintz3-21/+42
When using new Multi-function modes it's possible that due to incompatible configuration management FW will fallback into an existing mode. Notice that at the moment this fallback is exactly the same as the already existing switch-independent multi-function mode, but we still use existing infrastructure to hold this information [in case some small differences will arise in the future]. Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com> Signed-off-by: Dmitry Kravkov <Dmitry.Kravkov@qlogic.com> Signed-off-by: Ariel Elior <Ariel.Elior@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19bnx2x: New multi-function mode: UFPYuval Mintz6-18/+200
Add support for a new multi-function mode based on the Unified Fabric Port system specifications. Support includes configuration of: 1. Outer vlan tags. 2. Bandwidth settings. 3. Virtual link enable/disable. Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com> Signed-off-by: Dmitry Kravkov <Dmitry.Kravkov@qlogic.com> Signed-off-by: Ariel Elior <Ariel.Elior@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19bnx2x: Changes with storage & MAC macrosDmitry Kravkov5-42/+54
Rearrange macros to query for storage-only modes in different MF environment. Improves the readibility and maintainability of the code. E.g.: - if (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)) + if (IS_MF_STORAGE_ONLY(bp)) In addition, this removes the need for bnx2x_is_valid_ether_addr(). Signed-off-by: Dmitry Kravkov <Dmitry.Kravkov@qlogic.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com> Signed-off-by: Ariel Elior <Ariel.Elior@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: phy: bcm7xxx: utilize PHY revision in config_initFlorian Fainelli1-6/+15
Now that the GENET and SF2 drivers have been updated to communicate us what is the revision of the BCM7xxx integrated PHY, utilize that information in the config_init() callback to call into the appropriate workaround function based on our revision. While at it, we also print the revision and patch level to help debug new chips. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: dsa: bcm_sf2: communicate integrated PHY revision to PHY driverFlorian Fainelli3-0/+18
The integrated BCM7xxx PHY contains no useful revision information in its MII_PHYSID2 bits 3:0, that information is instead contained in the SWITCH_REG_PHY_REVISION register. Read this register, store its value, and return it by implementing the dsa_switch::get_phy_flags() callback accordingly. The register layout is already matching what the BCM7xxx PHY driver is expecting to find. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: bcmgenet: communicate integrated PHY revision to PHY driverFlorian Fainelli3-2/+14
The integrated BCM7xxx PHY contains no useful revision information in its MII_PHYSID2 bits 3:0, that information is instead contained in the GENET hardware block. We already read the GENET 32-bit revision register, so store the integrated PHY revision in the driver private structure, and then communicate this revision value to the PHY driver by overriding the phy_flags value. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: bcmgenet: remove PHY_BRCM_100MBPS_WARFlorian Fainelli1-10/+0
Now that we have removed the need for the PHY_BRCM_100MBPS_WAR flag, we can remove it from the GENET driver and the broadcom shared header file. The PHY driver checks the PHY supported bitmask instead. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: phy: bcm7xxx: do not use PHY_BRCM_100MBPS_WARFlorian Fainelli1-2/+2
There is no need for the PHY driver to check PHY_BRCM_100MBPS_WAR since that is redundant with checking the PHY device supported features. Get rid of that workaround flag. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19vxlan: Refactor vxlan driver to make use of the common UDP tunnel functions.Andy Zhou1-83/+22
Simplify vxlan implementation using common UDP tunnel APIs. Signed-off-by: Andy Zhou <azhou@nicira.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: fec: Workaround for imx6sx enet tx hang when enable three queuesFugang Duan1-2/+15
When enable three queues on imx6sx enet, and then do tx performance test with iperf tool, after some time running, tx hang. Found that: If uDMA is running, software set TDAR may cause tx hang. If uDMA is in idle, software set TDAR don't cause tx hang. There is a TDAR race condition for mutliQ when the software sets TDAR and the UDMA clears TDAR simultaneously or in a small window (2-4 cycles). This will cause the udma_tx and udma_tx_arbiter state machines to hang. The issue exist at i.MX6SX enet IP. So, the Workaround is checking TDAR status four time, if TDAR cleared by hardware and then write TDAR, otherwise don't set TDAR. The patch is only one Workaround for the issue ERR007885. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net:fec: increase DMA queue numberFugang Duan1-1/+1
when enable interrupt coalesce, 8 BD is not enough. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: fec: add interrupt coalescence feature supportFugang Duan2-0/+151
i.MX6 SX support interrupt coalescence feature By default, init the interrupt coalescing frame count threshold and timer threshold. Supply the ethtool interfaces as below for user tuning to improve enet performance: rx_max_coalesced_frames rx_coalesce_usecs tx_max_coalesced_frames tx_coalesce_usecs Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-19net: fec: refine error handle of parser queue number from DTFrank Li1-10/+10
check tx and rx queue seperately. fix typo, "Invalidate" and "fail". change pr_err to pr_warn. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-18ixgbe: remove IXGBE_FLAG_MSI(X)_CAPABLE flagsJacob Keller1-2/+0
They were not used, and we don't need them, so we shouldn't bother with keeping values in the flags field that could be misleading. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: add warnings for other disabled features without MSI-X supportJacob Keller1-2/+5
When we can't get MSI-X vectors, we disable a few features which require MSI-X vectors. Print warnings just like we do when disabling DCB. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: use e_dev_warn instead of netif_printkJacob Keller1-7/+5
Again, we should not be directly using netif_printk, as we have our own error print routines that we generate. In addition, instead of using an early return we can just use the else block of this one line if statement. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: use e_dev_warn instead of e_err for displaying warningJacob Keller1-2/+2
In this case, disabling DCB is not an error. We can still function, but we just have to let the user know. In addition, since we call this during probe before allocating our netdevice structure, we should use e_dev_warn instead of e_warn. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: determine vector count inside ixgbe_acquire_msix_vectorsJacob Keller1-37/+37
Our calculated v_budget doesn't matter except if we allocate MSI-X vectors. We shouldn't need to calculate this outside of the function, so don't. Instead, only calculate it once we attempt to acquire MSI-X vectors. This helps collocate all of the MSI-X vector code together. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: move msix_entries allocation into ixgbe_acquire_msix_vectorsJacob Keller1-11/+13
We already have to kfree this value if we fail, and this is only part of MSI-X mode, so we should simply allocate the value where we need it. This is cleaner, and makes it a lot more obvious why we are freeing it inside of ixgbe_acquire_msix_vectors. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: return integer from ixgbe_acquire_msix_vectorsJacob Keller1-14/+18
Similar to how ixgbevf handles acquiring MSI-X vectors, we can return an error code instead of relying on the flag being set. This makes it more clear that we have failed to setup MSI-X mode, and also will make it easier to consolidate MSI-X related code all into the single function. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: use e_dev_warn instead of netif_printkJacob Keller1-5/+5
The netif_printk relies on our netdevice structure to be registered already. We may call ixgbe_acquire_msix_vectors prior to registering our netdevice, so we should not use the netdevice specific printk. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: Do not schedule an uninitialized workqueue entryMark Rustad1-3/+4
If a hardware Tx timestamp is requested, an uninitialized workqueue entry may be scheduled, especially on an 82598 adapter. Add a check for a PTP clock to avoid that. Also only apply the unlikely to the first term of the conditional. That will make the rest of the checks be in the cold path. Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Acked-by: Matthew Vick <matthew.vick@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbe: remove useless bd_number from adapter structEthan Zhao2-6/+0
Because bd_number is not useful anymore, so remove it from adapter struct, or if keep it, we have to fix the boards driven counter bug in ixgbe_remove() and ixgbe_probe() only for trivial debug purpose -- other output is enough. Signed-off-by: Ethan Zhao <ethan.zhao@oracle.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-18ixgbevf: remove useless bd_number from struct ixgbevf_adapterEthan Zhao2-5/+0
It is useless and buggy, just remove it. Signed-off-by: Ethan Zhao <ethan.zhao@oracle.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-09-16net: fec: fix build error at m68k platformFrank Li1-5/+25
reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 4d494cdc92b3b9a0f5fb9e1560810fa27d5a0489 make.cross ARCH=m68k m5272c3_defconfig make.cross ARCH=m68k drivers/net/ethernet/freescale/fec.h:262:0: warning: "FEC_R_DES_START" redefined #define FEC_R_DES_START(X) ((X == 1) ? FEC_R_DES_START_1 : \ ^ drivers/net/ethernet/freescale/fec.h:158:0: note: this is the location of the previous definition #define FEC_R_DES_START 0x3d0 /* Receive descriptor ring */ ^ drivers/net/ethernet/freescale/fec.h:265:0: warning: "FEC_X_DES_START" redefined #define FEC_X_DES_START(X) ((X == 1) ? FEC_X_DES_START_1 : \ ... Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15dsa: Replace mii_bus with a generic host deviceAlexander Duyck6-10/+27
This change makes it so that instead of passing and storing a mii_bus we instead pass and store a host_dev. From there we can test to determine the exact type of device, and can verify it is the correct device for our switch. So for example it would be possible to pass a device pointer from a pci_dev and instead of checking for a PHY ID we could check for a vendor and/or device ID. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15bonding: consolidate ASSERT_RTNL()s and remove the unnecessaryNikolay Aleksandrov1-4/+2
Consolidate the calls to ASSERT_RTNL() before bond_select_active_slave() inside bond_select_active_slave() itself and remove the ASSERT_RTNL() from bond_hw_addr_swap() as it's not exported and its only caller - bond_change_active_slave() already has an ASSERT_RTNL(). Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15bonding: trivial: style and comment fixesNikolay Aleksandrov6-167/+93
First adjust a couple of locking comments that were left inaccurate, then adjust comments to use the netdev styling and remove extra new lines where necessary and add a couple of new lines between declarations and code. These are all trivial styling changes, no functional change. Also removed a couple of outdated or obvious comments. This patch is by no means a complete fix of all netdev style violations but it gets the bonding closer. Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15bonding: consolidate the two rlb_next_rx_slave functions into oneNikolay Aleksandrov1-28/+10
__rlb_next_rx_slave() is a copy of rlb_next_rx_slave() with the difference that it uses rcu primitives to walk the slave list. We don't need the two functions and can make rlb_next_rx_slave() a wrapper for callers which hold RTNL. So add a comment and ASSERT_RTNL() to make sure what is intended. Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15net: ethernet: neterion: vxge: vxge-main.c: Cleaning up missing ↵Rickard Strandqvist1-1/+1
null-terminate in conjunction with strncpy Replacing strncpy with strlcpy to avoid strings that lacks null terminate. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15net: ethernet: freescale: fec_main.c: Cleaning up missing null-terminate in ↵Rickard Strandqvist1-2/+2
conjunction with strncpy Replacing strncpy with strlcpy to avoid strings that lacks null terminate. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15bna: use container_of to resolve bufdesc_ex from bufdescFabian Frederick2-5/+8
Use container_of instead of casting first structure member. Compiled but untested. Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-15net: fec: use container_of to resolve bufdesc_ex from bufdescFabian Frederick1-2/+2
Use container_of instead of casting first structure member. ARM cross-compiled but untested. Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net/macb: Add hardware revision information during probeBo Shen1-3/+3
Print the IP revision when probing. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net: fec: init complete variable in early to avoid kernel dumpFugang Duan1-0/+1
Software clear the MDIO interrupt before MDIO bus access, but MAC still generate MDIO interrupt. The issue only happen on imx6slx chip. CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc1-00399-g0bcad17 #315 Backtrace: [<800121fc>] (dump_backtrace) from [<800124e0>] (show_stack+0x18/0x1c) r6:8096e534 r5:8096e534 r4:00000000 r3:00000000 [<800124c8>] (show_stack) from [<806a4c60>] (dump_stack+0x8c/0xa4) [<806a4bd4>] (dump_stack) from [<80060ab8>] (__lock_acquire+0x1814/0x1c40) r6:be078000 r5:be074000 r4:be03f6e4 r3:be078000 [<8005f2a4>] (__lock_acquire) from [<800616e0>] (lock_acquire+0x70/0x84) r10:809ada33 r9:be010600 r8:00000096 r7:00000001 r6:be074000 r5:00000000 r4:60000193 [<80061670>] (lock_acquire) from [<806abb20>] (_raw_spin_lock_irqsave+0x40/0x54) r7:00000000 r6:8005a3f8 r5:00000193 r4:be03f6d4 [<806abae0>] (_raw_spin_lock_irqsave) from [<8005a3f8>] (complete+0x1c/0x4c) r6:80950904 r5:be03f6d0 r4:be03f6d4 [<8005a3dc>] (complete) from [<8041b4c0>] (fec_enet_interrupt+0x128/0x164) r6:80950904 r5:00800000 r4:be03f000 r3:00000000 [<8041b398>] (fec_enet_interrupt) from [<8006aeac>] (handle_irq_event_percpu+0x38/0x13c) r6:00000000 r5:be01065c r4:be399e00 r3:8041b398 [<8006ae74>] (handle_irq_event_percpu) from [<8006aff4>] (handle_irq_event+0x44/0x64) r10:be03f000 r9:80989fe0 r8:00000000 r7:00000096 r6:be399e00 r5:be01065c r4:be010600 [<8006afb0>] (handle_irq_event) from [<8006e3e8>] (handle_fasteoi_irq+0xc8/0x1bc) r6:8096e764 r5:be01065c r4:be010600 r3:00000000 [<8006e320>] (handle_fasteoi_irq) from [<8006a63c>] (generic_handle_irq+0x30/0x44) r6:be074010 r5:80945e4c r4:00000096 r3:8006e320 [<8006a60c>] (generic_handle_irq) from [<8000f218>] (handle_IRQ+0x54/0xbc) r4:80950d74 r3:00000180 [<8000f1c4>] (handle_IRQ) from [<800086cc>] (gic_handle_irq+0x30/0x68) r8:be3ab478 r7:c080e100 r6:be075bd8 r5:80950eec r4:c080e10c r3:000000a0 [<8000869c>] (gic_handle_irq) from [<80013064>] (__irq_svc+0x44/0x5c) Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net: fec: change FEC alignment according to i.mx6 sx requirementFugang Duan2-11/+27
i.MX6 SX change FEC alignment requirement. i.MX6 SX change internal bus from AHB to AXI. It require RX buffer must be 64 bytes alignment. And remove TX buffer alignment requirement. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net:fec: Add fsl,imx6sx-fec compatible stringsFugang Duan1-0/+2
Add compatible string "fsl,imx6sx-fec" for i.MX6SX. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net: fec: add enet-avb IP supportFrank Li2-18/+51
i.MX6SX Enet-AVB support 3 tx queues, 3 rx queues. For tx queues: ring 0 -> best effort ring 1 -> Class A ring 2 -> Class B For rx queues: ring 0 -> best effort ring 1 -> receive VLAN packet with classification match ring 2 -> receive VLAN packet with classification match Add enet-avb IP multiqueue support for the driver. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net:fec: Disable enet-avb MAC instead of reset MACFugang Duan1-6/+20
For i.MX6SX enet use AXI bus, reset MAC will make system bus dead if ENET-AXI bus has pending access (AHB bus should not have such issue). So, disable enet with AVB MAC instead of reset MAC itself. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net: fec: init multi queue date structureFrank Li1-113/+252
initilized all queues according to queue number get from DT file. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Duan Fugang <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net: fec: parser max queue number from dt fileFugang Duan2-1/+47
By default, the tx/rx queue number is 1, user can config the queue number at DTS file like this: fsl,num-tx-queues=<3>; fsl,num-rx-queues=<3> Since i.MX6SX enet-AVB IP support multi queues, so use multi queues interface to allocate and set up an Ethernet device. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net: fec: change data structure to support multiqueueFugang Duan2-196/+400
This patch just change data structure to support multi-queue. Only 1 queue enabled. Ethernet multiqueue mechanism can improve performance in SMP system. For single hw queue, multiqueue can balance cpu loading. For multi hw queues, multiple cores can process network packets in parallel, and refer the article for the detail advantage for multiqueue: http://vger.kernel.org/~davem/davem_nyc09.pdf Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <frank.li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net:fec: add enet AVB feature macro define for imx6sxFugang Duan1-0/+16
Add enet AVB feature macro define for imx6sx. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net:fec: add enet refrence clock for i.MX 6SX chipFugang Duan2-0/+18
i.MX6sx enet has below clocks for user config: clk_ipg: ipg_clk_s, ipg_clk_mac0_s, 66Mhz clk_ahb: enet system clock, it is enet AXI clock for imx6sx. For imx6sx, it alos is the clock source of interrupt coalescing. The clock range: 200Mhz ~ 266Mhz. clk_ref: refrence clock for tx and rx. For imx6sx enet RGMII mode, the refrence clock is 125Mhz coming from internal PLL or external. In i.MX6sx-arm2 board, the clock is from internal PLL. clk_ref is optional, depends on board. clk_enet_out: The clock can be output from internal PLL. It can supply 50Mhz clock for phy. clk_enet_out is optional, depends on chip and board. clk_ptp: 1588 ts clock. It is optional, depends on chip. The patch add clk_ref to distiguish the different clocks. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13net: DSA: Marvell mv88e6171 switch driverAndrew Lunn5-0/+426
This is the Marvell driver with some cleanups by Claudio Leite and myself. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Cc: Claudio Leite <leitec@staticky.com> Signed-off-by: Claudio Leite <leitec@staticky.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-13be2net: enable PCIe error reporting on VFs tooKalesh AP1-5/+3
Currently PCIe error reporting is enabled only on PFs. This patch enables this feature on VFs too as Lancer VFs support it. Signed-off-by: Kalesh AP <kalesh.purayil@emulex.com> Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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