aboutsummaryrefslogtreecommitdiff
path: root/drivers/net/phy/realtek.c
AgeCommit message (Collapse)AuthorFilesLines
2019-05-13net: phy: realtek: Replace phy functions with non-locked version in ↵Kunihiko Hayashi1-3/+3
rtl8211e_config_init() After calling phy_select_page() and until calling phy_restore_page(), the mutex 'mdio_lock' is already locked, so the driver should use non-locked version of phy functions. Or there will be a deadlock with 'mdio_lock'. This replaces phy functions called from rtl8211e_config_init() to avoid the deadlock issue. Fixes: f81dadbcf7fd ("net: phy: realtek: Add rtl8211e rx/tx delays config") Signed-off-by: Kunihiko Hayashi <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-05-11net: phy: realtek: fix double page ops in generic Realtek driverHeiner Kallweit1-2/+0
When adding missing callbacks I missed that one had them set already. Interesting that the compiler didn't complain. Fixes: daf3ddbe11a2 ("net: phy: realtek: add missing page operations") Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-05-10net: phy: realtek: add missing page operationsHeiner Kallweit1-0/+12
Add missing page operation callbacks to few Realtek drivers. This also fixes a NPE after the referenced commit added code to the RTL8211E driver that uses phy_select_page(). Fixes: f81dadbcf7fd ("net: phy: realtek: Add rtl8211e rx/tx delays config") Signed-off-by: Heiner Kallweit <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Reported-by: Vicente Bergas <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-05-08net: phy: realtek: Change TX-delay setting for RGMII modes onlySerge Semin1-4/+15
It's prone to problems if delay is cleared out for other than RGMII modes. So lets set/clear the TX-delay in the config register only if actually RGMII-like interface mode is requested. This only concerns rtl8211f chips. Signed-off-by: Serge Semin <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-05-08net: phy: realtek: Add rtl8211e rx/tx delays configSerge Semin1-0/+51
There are two chip pins named TXDLY and RXDLY which actually adds the 2ns delays to TXC and RXC for TXD/RXD latching. Alas this is the only documented info regarding the RGMII timing control configurations the PHY provides. It turns out the same settings can be setup via MDIO registers hidden in the extension pages layout. Particularly the extension page 0xa4 provides a register 0x1c, which bits 1 and 2 control the described delays. They are used to implement the "rgmii-{id,rxid,txid}" phy-mode. The hidden RGMII configs register utilization was found in the rtl8211e U-boot driver: https://elixir.bootlin.com/u-boot/v2019.01/source/drivers/net/phy/realtek.c#L99 There is also a freebsd-folks discussion regarding this register: https://reviews.freebsd.org/D13591 It confirms that the register bits field must control the so called configuration pins described in the table 12-13 of the official PHY datasheet: 8:6 = PHY Address 5:4 = Auto-Negotiation 3 = Interface Mode Select 2 = RX Delay 1 = TX Delay 0 = SELRGV Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: Serge Semin <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-04net: phy: realtek: remove setting callback get_features and use phylib fallbackHeiner Kallweit1-10/+0
Now that phylib uses genphy_read_abilities() as fallback, we don't have to set callback get_features any longer. Signed-off-by: Heiner Kallweit <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-02net: phy: realtek: use genphy_read_abilitiesHeiner Kallweit1-24/+12
Use new function genphy_read_abilities(). This allows to remove all calls to genphy_config_init(). Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-02-24Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-0/+7
Three conflicts, one of which, for marvell10g.c is non-trivial and requires some follow-up from Heiner or someone else. The issue is that Heiner converted the marvell10g driver over to use the generic c45 code as much as possible. However, in 'net' a bug fix appeared which makes sure that a new local mask (MDIO_AN_10GBT_CTRL_ADV_NBT_MASK) with value 0x01e0 is cleared. Signed-off-by: David S. Miller <[email protected]>
2019-02-23net: phy: realtek: Dummy IRQ calls for RTL8366RBLinus Walleij1-0/+7
This fixes a regression introduced by commit 0d2e778e38e0ddffab4bb2b0e9ed2ad5165c4bf7 "net: phy: replace PHY_HAS_INTERRUPT with a check for config_intr and ack_interrupt". This assumes that a PHY cannot trigger interrupt unless it has .config_intr() or .ack_interrupt() implemented. A later patch makes the code assume both need to be implemented for interrupts to be present. But this PHY (which is inside a DSA) will happily fire interrupts without either callback. Implement dummy callbacks for .config_intr() and .ack_interrupt() in the phy header to fix this. Tested on the RTL8366RB on D-Link DIR-685. Fixes: 0d2e778e38e0 ("net: phy: replace PHY_HAS_INTERRUPT with a check for config_intr and ack_interrupt") Cc: Heiner Kallweit <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-02-03net: phy: realtek: add generic Realtek PHY driverHeiner Kallweit1-0/+9
The integrated PHY's of later RTL8168 network chips report the generic PHYID 0x001cc800 (Realtek OUI, model and revision number both set to zero) and therefore currently the genphy driver is used. To be able to use the paged version of e.g. phy_write() we need a PHY driver with the read_page and write_page callbacks implemented. So basically make a copy of the genphy driver, just with the read_page and write_page callbacks being set. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-01-22net: phy: Convert some PHY and MDIO driver files to SPDX headersAndrew Lunn1-6/+1
Where the license text and the MODULE_LICENSE() value agree, convert to using an SPDX header, removing the license text. Signed-off-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-11-11net: phy: realtek: use new PHYID matching macrosHeiner Kallweit1-19/+10
Use new macros for PHYID matching to avoid boilerplate code. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-11-11net: phy: remove flag PHY_HAS_INTERRUPT from driver configsHeiner Kallweit1-7/+0
Now that flag PHY_HAS_INTERRUPT has been replaced with a check for callbacks config_intr and ack_interrupt, we can remove setting this flag from all driver configs. Last but not least remove flag PHY_HAS_INTERRUPT completely. Signed-off-by: Heiner Kallweit <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-11-07net: phy: realtek: load driver for all PHYs with a Realtek OUIHeiner Kallweit1-9/+2
Instead of listing every single PHYID, load the driver for every PHYID with a Realtek OUI, independent of model number and revision. This patch also improves two further aspects: - constify realtek_tbl[] - the mask should have been 0xffffffff instead of 0x001fffff so far, by masking out some bits a PHY from another vendor could have been matched Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-11-04net: phy: realtek: fix RTL8201F sysfs nameHolger Hoffstätte1-1/+1
Since 4.19 the following error in sysfs has appeared when using the r8169 NIC driver: $cd /sys/module/realtek/drivers $ls -l ls: cannot access 'mdio_bus:RTL8201F 10/100Mbps Ethernet': No such file or directory [..garbled dir entries follow..] Apparently the forward slash in "10/100Mbps Ethernet" is interpreted as directory separator that leads nowhere, and was introduced in commit 513588dd44b ("net: phy: realtek: add RTL8201F phy-id and functions"). Fix this by removing the offending slash in the driver name. Other drivers in net/phy seem to have the same problem, but I cannot test/verify them. Fixes: 513588dd44b ("net: phy: realtek: add RTL8201F phy-id and functions") Signed-off-by: Holger Hoffstätte <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-07-18net: phy: realtek: Support RTL8366RB variantLinus Walleij1-0/+31
The RTL8366RB is an ASIC with five internal PHYs for LAN0..LAN3 and WAN. The PHYs are spawn off the main device so they can be handled in a distributed manner by the Realtek PHY driver. All that is really needed is the power save feature enablement and letting the PHY driver core pick up the IRQ from the switch chip. Cc: Antti Seppälä <[email protected]> Cc: Roman Yeryomin <[email protected]> Cc: Colin Leitner <[email protected]> Cc: Gabor Juhos <[email protected]> Cc: Florian Fainelli <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-07-16net: phy: realtek: add missing entry for RTL8211C to mdio_device_id tableHeiner Kallweit1-0/+1
Add missing entry for RTL8211C to mdio_device_id table. Signed-off-by: Heiner Kallweit <[email protected]> Fixes: cf87915cb9f8 ("net: phy: realtek: add support for RTL8211C") Signed-off-by: David S. Miller <[email protected]>
2018-07-02net: phy: realtek: add support for RTL8211CHeiner Kallweit1-0/+17
RTL8211C has an issue when operating in Gigabit slave mode, therefore genphy driver can't be used. See also this U-boot change. https://lists.denx.de/pipermail/u-boot/2016-March/249712.html Add a PHY driver for this chip with the quirk to force Gigabit master mode. As a note: This will make it impossible to connect two network ports directly which both are driven by a RTl8211C. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-07-02net: phy: realtek: add missing entry for RTL8211 to mdio_device_id tableHeiner Kallweit1-0/+1
When adding support for RTL8211 I forgot to update the mdio_device_id table. Signed-off-by: Heiner Kallweit <[email protected]> Fixes: d241d4aac93f ("net: phy: realtek: add support for RTL8211") Signed-off-by: David S. Miller <[email protected]>
2018-06-30net: phy: realtek: add support for RTL8211Heiner Kallweit1-0/+30
In preparation of adding phylib support to the r8169 driver we need PHY drivers for all chip-internal PHY types. Fortunately almost all of them are either supported by the Realtek PHY driver already or work with the genphy driver. Still missing is support for the PHY of RTL8169s, it requires a quirk to properly support 100Mbit-fixed mode. The quirk was copied from r8169 driver which copied it from the vendor driver. Based on the PHYID the internal PHY seems to be a RTL8211. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-05-28net: phy: realtek: add suspend/resume callbacks for RTL8211BHeiner Kallweit1-0/+16
Add RTL8211B suspend / resume callbacks. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-03-22net: phy: realtek: Use the dummy stubs for MMD register access for rtl8211bKevin Hao1-0/+2
The Ethernet on mpc8315erdb is broken since commit b6b5e8a69118 ("gianfar: Disable EEE autoneg by default"). The reason is that even though the rtl8211b doesn't support the MMD extended registers access, it does return some random values if we trying to access the MMD register via indirect method. This makes it seem that the EEE is supported by this phy device. And the subsequent writing to the MMD registers does cause the phy malfunction. So use the dummy stubs for the MMD register access to fix this issue. Fixes: b6b5e8a69118 ("gianfar: Disable EEE autoneg by default") Signed-off-by: Kevin Hao <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2018-01-16phy: realtek: use new helpers for paged register accessHeiner Kallweit1-45/+14
Make use of the new helpers for paged register access. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-12-03net: phy: realtek: add utility functions to read/write page addressesMartin Blumenstingl1-30/+53
Realtek PHYs implement the concept of so-called "extension pages". The reason for this is probably because these PHYs expose more registers than available in the standard address range. After all read/write operations on such a page are done the driver should switch back to page 0 where the standard MII registers (such as MII_BMCR) are available. When referring to such a register the datasheets of RTL8211E and RTL8211F always specify: - the page / "ext. page" which has to be written to RTL821x_PAGE_SELECT - an address (sometimes also called reg) These new utility functions make the existing code easier to read since it removes some duplication (switching back to page 0 is done within the new helpers for example). No functional changes are intended. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-12-03net: phy: realtek: use the same indentation for all #definesMartin Blumenstingl1-13/+14
This simply makes the code easier to read. No functional changes. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-12-03net: phy: realtek: group all register bit #defines for RTL821x_INERMartin Blumenstingl1-2/+5
This simply moves all register bit #defines which describe the (PHY specific) bits in the RTL821x_INER right below the RTL821x_INER register definition. This makes it easier to spot which registers and bits belong together. No functional changes. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-12-03net: phy: realtek: rename RTL821x_INER_INIT to RTL8211B_INER_INITMartin Blumenstingl1-2/+2
This macro is only used by the RTL8211B code. RTL8211E and RTL8211F both use other bits to initialize the RTL821x_INER register. No functional changes. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-12-03net: phy: realtek: use the BIT and GENMASK macrosMartin Blumenstingl1-5/+6
This makes it easier to compare the #defines with the datasheets. No functional changes. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-12-01net: phy: remove generic settings for callbacks config_aneg and read_status ↵Heiner Kallweit1-12/+0
from drivers Remove generic settings for callbacks config_aneg and read_status from drivers. Signed-off-by: Heiner Kallweit <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-11-14net: phy: realtek: fix RTL8211F interrupt modeHeiner Kallweit1-0/+2
After commit b94d22d94ad22 "ARM64: dts: meson-gx: add external PHY interrupt on some platforms" ethernet stopped working on my Odroid-C2 which has a RTL8211F phy. It turned out that no interrupts were triggered. Further analysis showed the register INER can't be altered on page 0. Because register INSR needs to be accessed via page 0xa43 I assumed that register INER needs to be accessed via some page too. Some brute force check resulted in page 0xa42 being the right one. With this patch the phy is working properly in interrupt mode. Fixes: 3447cf2e9a11 ("net/phy: Add support for Realtek RTL8211F") Signed-off-by: Heiner Kallweit <[email protected]> Tested-by: Jerome Brunet <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-09-18net: phy: realtek: add RTL8201F phy-id and functionsJassi Brar1-0/+44
Add RTL8201F phy-id and the related functions to the driver. The original patch is as follows: https://patchwork.kernel.org/patch/2538341/ Signed-off-by: Jongsung Kim <[email protected]> Signed-off-by: Jassi Brar <[email protected]> Signed-off-by: Kunihiko Hayashi <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2017-09-18net: phy: realtek: rename RTL8211F_PAGE_SELECT to RTL821x_PAGE_SELECTKunihiko Hayashi1-5/+5
This renames the definition of page select register from RTL8211F_PAGE_SELECT to RTL821x_PAGE_SELECT to use it across models. Signed-off-by: Kunihiko Hayashi <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2016-11-28net: phy: realtek: fix enabling of the TX-delay for RTL8211FMartin Blumenstingl1-8/+12
The old logic always enabled the TX-delay when the phy-mode was set to PHY_INTERFACE_MODE_RGMII. There are dedicated phy-modes which tell the PHY driver to enable the RX and/or TX delays: - PHY_INTERFACE_MODE_RGMII should disable the RX and TX delay in the PHY (if required, the MAC should add the delays in this case) - PHY_INTERFACE_MODE_RGMII_ID should enable RX and TX delay in the PHY - PHY_INTERFACE_MODE_RGMII_TXID should enable the TX delay in the PHY - PHY_INTERFACE_MODE_RGMII_RXID should enable the RX delay in the PHY (currently not supported by RTL8211F) With this patch we enable the TX delay for PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID. Additionally we now explicity disable the TX-delay, which seems to be enabled automatically after a hard-reset of the PHY (by triggering it's reset pin) to get a consistent state (as defined by the phy-mode). This fixes a compatibility problem with some SoCs where the TX-delay was also added by the MAC. With the TX-delay being applied twice the TX clock was off and TX traffic was broken or very slow (<10Mbit/s) on 1000Mbit/s links. Signed-off-by: Martin Blumenstingl <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2016-01-07phy: Centralize setting driver module ownerAndrew Lunn1-5/+0
Rather than have each driver set the driver owner field, do it once in the core code. This will also help with later changes, when the device structure will move. Signed-off-by: Andrew Lunn <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2015-08-09net: phy: add RealTek RTL8211DN phy idShaohui Xie1-0/+14
RTL8211DN is compatible with RTL8211E. Signed-off-by: Shaohui Xie <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2015-06-23net/phy: Add support for Realtek RTL8211FShengzhou Liu1-1/+67
RTL8211F has different register definitions from RTL8211E. Specially it needs to enable TXDLY in case of RGMII. Signed-off-by: Shengzhou Liu <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2014-11-12net: phy: replace phy_drivers_register callsJohan Hovold1-12/+1
Replace module init/exit which only calls phy_drivers_register with module_phy_driver macro. Tested using Micrel driver, and otherwise compile-tested only. Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2014-06-11net: phy: realtek: register/unregister multiple drivers properlyJongsung Kim1-51/+37
Using phy_drivers_register/_unregister functions is proper way to handle multiple PHY drivers registration. For Realtek PHY drivers module, it fixes incomplete current error-handlings up and adds missed unregistration for the RTL8201CP driver. Signed-off-by: Jongsung Kim <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2013-11-11PHY: Add RTL8201CP phy_driver to realtekJonas Jensen1-0/+15
Add RTL8201CP phy_driver. Signed-off-by: Jonas Jensen <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2013-08-20net: phy: rtl8211: fix interrupt on status link changeGiuseppe CAVALLARO1-2/+2
This is to fix a problem in the rtl8211 where the driver wasn't properly enabled the interrupt on link change status. it has to enable the ineterrupt on the bit 10 in the register 18 (INER). Reported-by: Sharma Bhupesh <[email protected]> Signed-off-by: Giuseppe Cavallaro <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2013-01-28net: phy: realtek: add rtl8211e driverGiuseppe CAVALLARO1-6/+44
This patch adds the minimal driver to manage the Realtek RTL8211E 10/100/1000 Transceivers. Signed-off-by: Giuseppe Cavallaro <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2012-07-09phylib: Support registering a bunch of driversChristian Hohnstaedt1-5/+1
If registering of one of them fails, all already registered drivers of this module will be unregistered. Use the new register/unregister functions in all drivers registering more than one driver. amd.c, realtek.c: Simplify: directly return registration result. Tested with broadcom.c All others compile-tested. Signed-off-by: Christian Hohnstaedt <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2011-10-31drivers/net: Add module.h to drivers who were implicitly using itPaul Gortmaker1-0/+1
The device.h header was including module.h, making it present for most of these drivers. But we want to clean that up. Call out the include of module.h in the modular network drivers. Signed-off-by: Paul Gortmaker <[email protected]>
2010-10-05net/phy: fix many "defined but unused" warningsUwe Kleine-König1-1/+1
MODULE_DEVICE_TABLE only expands to something if it's compiled for a module. So when building-in support for the phys, the mdio_device_id tables are unused. Marking them with __maybe_unused fixes the following warnings: drivers/net/phy/bcm63xx.c:134: warning: 'bcm63xx_tbl' defined but not used drivers/net/phy/broadcom.c:933: warning: 'broadcom_tbl' defined but not used drivers/net/phy/cicada.c:162: warning: 'cicada_tbl' defined but not used drivers/net/phy/davicom.c:222: warning: 'davicom_tbl' defined but not used drivers/net/phy/et1011c.c:114: warning: 'et1011c_tbl' defined but not used drivers/net/phy/icplus.c:137: warning: 'icplus_tbl' defined but not used drivers/net/phy/lxt.c:226: warning: 'lxt_tbl' defined but not used drivers/net/phy/marvell.c:724: warning: 'marvell_tbl' defined but not used drivers/net/phy/micrel.c:234: warning: 'micrel_tbl' defined but not used drivers/net/phy/national.c:154: warning: 'ns_tbl' defined but not used drivers/net/phy/qsemi.c:141: warning: 'qs6612_tbl' defined but not used drivers/net/phy/realtek.c:82: warning: 'realtek_tbl' defined but not used drivers/net/phy/smsc.c:257: warning: 'smsc_tbl' defined but not used drivers/net/phy/ste10Xp.c:135: warning: 'ste10Xp_tbl' defined but not used drivers/net/phy/vitesse.c:195: warning: 'vitesse_tbl' defined but not used Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2010-04-02phylib: Add module table to all existing phy driversDavid Woodhouse1-0/+7
Signed-off-by: David Woodhouse <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2008-02-03phylib: Add Realtek 821x eth PHY supportJohnson Leung1-0/+80
this PHY present on the MPC8315E and MPC837xE RDB boards. Signed-off-by: Johnson Leung <[email protected]> Signed-off-by: Kevin Lam <[email protected]> Signed-off-by: Joe D'Abbraccio <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Jeff Garzik <[email protected]> Signed-off-by: David S. Miller <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.