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path: root/drivers/net/ethernet
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2020-07-27sfc_ef100: process events for MCDI completionsEdward Cree1-1/+56
Currently RX and TX-completion events are unhandled, as neither the RX nor the TX path has been implemented yet. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc_ef100: implement ndo_open/close and EVQ probingEdward Cree7-0/+225
Channels are probed, but actual event handling is still stubbed out. Stub implementation of check_caps is needed because ptp.c will call into it from efx_ptp_use_mac_tx_timestamps() to decide if it wants TXQs. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc_ef100: implement MCDI transportEdward Cree2-0/+107
Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc_ef100: don't call efx_reset_down()/up() on EF100Edward Cree1-3/+8
We handle everything ourselves in ef100_reset(), rather than relying on the generic down/up routines. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc_ef100: PHY probe stubEdward Cree1-0/+14
We can't actually do the MCDI to probe it fully until we have working MCDI, which comes later, but we need efx->phy_data to be allocated so that when we get MCDI events the link-state change handler doesn't NULL-dereference. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc_ef100: reset-handling stubEdward Cree1-0/+50
We don't actually do the efx_mcdi_reset() because we don't have MCDI yet. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc: skeleton EF100 PF driverEdward Cree26-13/+1095
No TX or RX path, no MCDI, not even an ifup/down handler. Besides stubs, the bulk of the patch deals with reading the Xilinx extended PCIe capability, which tells us where to find our BAR. Though in the same module, EF100 has its own struct pci_driver, which is named sfc_ef100. A small number of additional nic_type methods are added; those in the TX (tx_enqueue) and RX (rx_packet) paths are called through indirect call wrappers to minimise the performance impact. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc_ef100: register accesses on EF100Edward Cree2-3/+15
EF100 adds a few new valid addresses for efx_writed_page(), as well as a Function Control Window in the BAR whose location is variable. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc_ef100: add EF100 register definitionsEdward Cree1-0/+693
Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc: remove efx_ethtool_nway_reset()Edward Cree3-10/+0
An MDIO-based n-way restart does not make sense for any of the NICs supported by this driver, nor for the coming EF100. Unlike on Falcon (which was already split off into a separate driver), the PHY on all of Siena, EF10 and EF100 is managed by MC firmware. While Siena can talk to the PHY over MDIO, doing so for anything other than debugging purposes (mdio_mii_ioctl) is likely to confuse the firmware. (According to the SFC firmware team, this support was originally added to the Siena driver early in the development of that product, before it was decided to have firmware manage the PHY.) Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27qed: fix the allocation of the chains with an external PBLAlexander Lobakin1-1/+3
Dan reports static checker warning: "The patch 9b6ee3cf95d3: "qed: sanitize PBL chains allocation" from Jul 23, 2020, leads to the following static checker warning: drivers/net/ethernet/qlogic/qed/qed_chain.c:299 qed_chain_alloc_pbl() error: uninitialized symbol 'pbl_virt'. drivers/net/ethernet/qlogic/qed/qed_chain.c 249 static int qed_chain_alloc_pbl(struct qed_dev *cdev, struct qed_chain *chain) 250 { 251 struct device *dev = &cdev->pdev->dev; 252 struct addr_tbl_entry *addr_tbl; 253 dma_addr_t phys, pbl_phys; 254 __le64 *pbl_virt; ^^^^^^^^^^^^^^^^ [...] 271 if (chain->b_external_pbl) 272 goto alloc_pages; ^^^^^^^^^^^^^^^^ uninitialized [...] 298 /* Fill the PBL table with the physical address of the page */ 299 pbl_virt[i] = cpu_to_le64(phys); ^^^^^^^^^^^ [...] " This issue was introduced with commit c3a321b06a80 ("qed: simplify initialization of the chains with an external PBL"), when chain->pbl_sp.table_virt initialization was moved up to qed_chain_init_params(). Fix it by initializing pbl_virt with an already filled chain struct field. Fixes: c3a321b06a80 ("qed: simplify initialization of the chains with an external PBL") Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Alexander Lobakin <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27net: mscc: ocelot: fix hardware timestamp dequeue logiclaurent brando1-5/+5
The next hw timestamp should be snapshoot to the read registers only once the current timestamp has been read. If none of the pending skbs matches the current HW timestamp just gracefully flush the available timestamp by reading it. Signed-off-by: laurent brando <[email protected]> Signed-off-by: Vladimir Oltean <[email protected]> Signed-off-by: Yangbo Lu <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Add support for 'ethtool -d'Vasundhara Volam4-0/+94
Add support to dump PXP registers and PCIe statistics. Signed-off-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Switch over to use the 64-bit software accumulated counters.Michael Chan3-53/+64
Now we can report all the full 64-bit CPU endian software accumulated counters instead of the hw counters, some of which may be less than 64-bit wide. Define the necessary macros to access the software counters. Reviewed-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Accumulate all counters.Michael Chan2-2/+90
Now that we have the infrastructure in place, add the new function bnxt_accumulate_all_stats() to periodically accumulate and check for counter rollover of all ring stats and port stats. A chip bug was also discovered that could cause some ring counters to become 0 during DMA. Workaround by ignoring zeros on the affected chips. Some older frimware will reset port counters during ifdown. We need to check for that and free the accumulated port counters during ifdown to prevent bogus counter overflow detection during ifup. Reviewed-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Retrieve hardware masks for port counters.Michael Chan1-5/+70
If supported by newer firmware, make the firmware call to query all the port counter masks. If not supported, assume 40-bit port counter masks. Reviewed-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Retrieve hardware counter masks from firmware if available.Michael Chan1-0/+64
Newer firmware has a new call HWRM_FUNC_QSTATS_EXT to retrieve the masks of all ring counters. Make this call when supported to initialize the hardware masks of all ring counters. If the call is not available, assume 48-bit ring counter masks on P5 chips. Reviewed-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Allocate additional memory for all statistics blocks.Michael Chan2-5/+26
Some of these DMAed hardware counters are not full 64-bit counters and so we need to accumulate them as they overflow. Allocate copies of these DMA statistics memory blocks with the same size for accumulation. The hardware counter widths are also counter specific so we allocate memory for masks that correspond to each counter. Reviewed-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Refactor statistics code and structures.Michael Chan4-89/+76
The driver manages multiple statistics structures of different sizes. They are all allocated, freed, and handled practically the same. Define a new bnxt_stats_mem structure and common allocation and free functions for all staistics memory blocks. Reviewed-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Use macros to define port statistics size and offset.Michael Chan2-5/+11
The port statistics structures have hard coded padding and offset. Define macros to make this look cleaner. Reviewed-by: Pavan Chebbi <[email protected]> Reviewed-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Update firmware interface to 1.10.1.54.Michael Chan5-130/+390
Main changes are 200G support and fixing the definitions of discard and error counters to match the hardware definitions. Because the HWRM_PORT_PHY_QCFG message size has now exceeded the max. encapsulated response message size of 96 bytes from the PF to the VF, we now need to cap this message to 96 bytes for forwarding. The forwarded response only needs to contain the basic link status and speed information and can be capped without adding the new information. v2: Fix bnxt_re compile error. Cc: Selvin Xavier <[email protected]> Reviewed-by: Vasundhara Volam <[email protected]> Reviewed-by: Edwin Peer <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27bnxt_en: Remove PCIe non-counters from ethtool statisticsVasundhara Volam3-79/+1
Remove PCIe non-counters display from ethtool statistics, as they are not simple counters but register dump. The next few patches will add logic to detect counter roll-over and it won't work with these PCIe non-counters. There will be a follow up patch to get PCIe information via ethtool register dump. Signed-off-by: Vasundhara Volam <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27sfc: drop unnecessary list_emptyJulia Lawall1-11/+9
list_for_each_safe is able to handle an empty list. The only effect of avoiding the loop is not initializing the index variable. Drop list_empty tests in cases where these variables are not used. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) <smpl> @@ expression x,e; iterator name list_for_each_safe; statement S; identifier i,j; @@ -if (!(list_empty(x))) { list_for_each_safe(i,j,x) S - } ... when != i when != j ( i = e; | ? j = e; ) </smpl> Signed-off-by: Julia Lawall <[email protected]> Acked-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-27igc: Fix static checker warningSasha Neftin1-1/+1
drivers/net/ethernet/intel/igc/igc_mac.c:424 igc_check_for_copper_link() error: uninitialized symbol 'link'. This patch come to fix this warning and initialize the 'link' symbol. Reported-by: Dan Carpenter <[email protected]> Fixes: 707abf069548 ("igc: Add initial LTR support") Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-27igc: Clean up the hw_stats structureSasha Neftin4-13/+0
Remove ictxptc, ictxatc, cbtmpc, cbrdpc, cbrmpc and htcbdpc fields from the hw_stats structure. Accordance to the i225 device specification these fields not in use. This patch come to clean up the driver code. Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-27igc: Clean up the mac_info structureSasha Neftin1-5/+0
collision_delta, tx_packet_delta, txcw, adaptive_ifs and has_fwsm fields not in use. This patch come to clean up the driver code. Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-27igc: Remove ledctl_ fields from the mac_info structureSasha Neftin1-3/+0
LED control currently not implemented. Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-27igc: Fix registers definitionSasha Neftin4-20/+0
IGC_ICTXPTC and IGC_ICTXATC are already defined elsewhere, remove this double definition. Also, remove unneeded registers as they are not applicable to i225 devices. Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-27igc: Remove unneeded ICTXQMTC registerSasha Neftin4-5/+0
Tx Queue Min Threshold Count register no applicable for the i225 device. This patch comes to clean up it. Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-27igc: Add Receive Descriptor Minimum Threshold Count to clear HW countersSasha Neftin1-0/+1
The statistics of this register are being tracked, however, the register was inadvertently missed when implementing igc_clear_hw_cntrs_base(). The register is clear on read, so add it to the function so that the register is cleared when requested so the tracked count is accurate. Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-27igc: Remove unneeded variableSasha Neftin4-5/+0
Though we are populating and tracking ictxqec, the value is not being used for anything so remove it altogether and save the register read. Signed-off-by: Sasha Neftin <[email protected]> Tested-by: Aaron Brown <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-25bpf, xdp: Remove XDP_QUERY_PROG and XDP_QUERY_PROG_HW XDP commandsAndrii Nakryiko17-102/+0
Now that BPF program/link management is centralized in generic net_device code, kernel code never queries program id from drivers, so XDP_QUERY_PROG/XDP_QUERY_PROG_HW commands are unnecessary. This patch removes all the implementations of those commands in kernel, along the xdp_attachment_query(). This patch was compile-tested on allyesconfig. Signed-off-by: Andrii Nakryiko <[email protected]> Signed-off-by: Alexei Starovoitov <[email protected]> Link: https://lore.kernel.org/bpf/[email protected]
2020-07-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller43-249/+413
The UDP reuseport conflict was a little bit tricky. The net-next code, via bpf-next, extracted the reuseport handling into a helper so that the BPF sk lookup code could invoke it. At the same time, the logic for reuseport handling of unconnected sockets changed via commit efc6b6f6c3113e8b203b9debfb72d81e0f3dcace which changed the logic to carry on the reuseport result into the rest of the lookup loop if we do not return immediately. This requires moving the reuseport_has_conns() logic into the callers. While we are here, get rid of inline directives as they do not belong in foo.c files. The other changes were cases of more straightforward overlapping modifications. Signed-off-by: David S. Miller <[email protected]>
2020-07-24net: hix5hd2_gmac: Remove unneeded cast from memory allocationWang Hai1-3/+3
Remove casting the values returned by memory allocation function. Coccinelle emits WARNING: ./drivers/net/ethernet/hisilicon/hix5hd2_gmac.c:1027:9-23: WARNING: casting value returned by memory allocation function to (struct sg_desc *) is useless. This issue was detected by using the Coccinelle software. Signed-off-by: Wang Hai <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2020-07-24Merge branch '100GbE' of ↵David S. Miller13-648/+2323
git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue Tony Nguyen says: ==================== 100GbE Intel Wired LAN Driver Updates 2020-07-23 This series contains updates to ice driver only. Jake refactors ice_discover_caps() to reduce the number of AdminQ calls made. Splits ice_parse_caps() to separate functions to update function and device capabilities separately to allow for updating outside of initialization. Akeem adds power management support. Paul G refactors FC and FEC code to aid in restoring of PHY settings on media insertion. Implements lenient mode and link override support. Adds link debug info and formats existing debug info to be more readable. Adds support to check and report additional autoneg capabilities. Implements the capability to detect media cage in order to differentiate AUI types as Direct Attach or backplane. Bruce implements Total Port Shutdown for devices that support it. Lev renames low_power_ctrl field to lower_power_ctrl_an to be more descriptive of the field. Doug reports AOC types as media type fiber. Paul S adds code to handle 1G SGMII PHY type. ==================== Signed-off-by: David S. Miller <[email protected]>
2020-07-23ice: add 1G SGMII PHY typePaul M Stillwell Jr2-3/+15
There isn't a case for 1G SGMII in ice_get_media_type() so add the handling for it. Also handle the special case where some direct attach cables may report that they support 1G SGMII, but that is erroneous since SGMII is supposed to be a backplane media type (between a MAC and a PHY). If the driver doesn't handle this special case then a user could see the 'Port' in ethtool change from 'Direct attach Copper' to 'Backplane' when they have forced the speed to 1G, but the cable hasn't changed. Lastly, change ice_aq_get_phy_caps() to save the module_type info if the function was called with ICE_AQC_REPORT_TOPO_CAP. This call uses the media information to populate the module_type. If no media is present then the values in module_type will be 0. Signed-off-by: Paul M Stillwell Jr <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: Report AOC PHY Types as FiberDoug Dziggel1-0/+11
Report AOC types as fiber instead of unknown. Signed-off-by: Doug Dziggel <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: add AQC get link topology handle supportPaul Greenwalt2-1/+118
Add AQC get link topology handle support. This is needed to determine Direct Attach (DA) or backplane media type for PHY types that support either. Get link topology handle cage node type request can be used to determine if a cage is present or not. If a cage is present for PHY types that supports both DA and backplane media type, then the media type is DA, else the media type is backplane. Signed-off-by: Paul Greenwalt <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: Rename low_power_ctrlLev Faerman2-11/+11
Rename the low_power_ctrl field to low_power_ctrl_an to be properly descriptive of it being an autoneg field. Signed-off-by: Lev Faerman <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: update reporting of autoneg capabilitiesPaul Greenwalt5-6/+29
Firmware now reports AN28, AN32, and AN73. Add a helper and check these new values and report PHY autoneg capability. Signed-off-by: Paul Greenwalt <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: add ice_aq_get_phy_caps() debug logsPaul Greenwalt1-18/+50
Add debug logs for ice_aq_get_phy_caps(), and format ice_aq_set_phy_cfg() and ice_aq_get_link_info() debug logs to make them more readable. Signed-off-by: Paul Greenwalt <[email protected]> Signed-off-by: Paul M Stillwell Jr <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: support Total Port Shutdown on devices that support itBruce Allan3-1/+26
When the Port Disable bit is set in the Link Default Override Mask TLV PFA module in the NVM, Total Port Shutdown mode is supported and enabled. In this mode, the driver should act as if the link-down-on-close ethtool private flag is always enabled and dis-allow any change to that flag. Signed-off-by: Bruce Allan <[email protected]> Signed-off-by: Paul Greenwalt <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: add link lenient and default override supportPaul Greenwalt9-216/+628
Adds functions to check for link override firmware support and get the override settings for a port. The previously supported/default link mode was strict mode. In strict mode link is configured based on get PHY capabilities PHY types with media. Lenient mode is now the default link mode. In lenient mode the link is configured based on get PHY capabilities PHY types without media. This allows the user to configure link that the media does not report. Limit the minimum supported link mode to 25G for devices that support 100G, and 1G for devices that support less than 100G. Default override is only supported in lenient mode. If default override is supported and enabled, then default override values are used for configuring speed and FEC. Default override provide persistent link settings in the NVM. Signed-off-by: Paul Greenwalt <[email protected]> Signed-off-by: Evan Swanson <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: restore PHY settings on media insertionPaul Greenwalt7-95/+518
After the transition from no media to media FW will clear the set-phy-cfg data set by the user. Save initial PHY settings and any settings later requested by the user and use that data to restore PHY settings on media insertion. Since PHY configuration is now being stored, replace calls that were calling FW to get the configuration with the saved copy. Signed-off-by: Paul Greenwalt <[email protected]> Signed-off-by: Chinh T Cao <[email protected]> Signed-off-by: Paul M Stillwell Jr <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: move auto FEC checks into ice_cfg_phy_fec()Paul Greenwalt3-39/+40
The call to ice_cfg_phy_fec() requires the caller to perform certain actions before calling it. Instead of imposing these preconditions move the operations into the function and perform them ourselves. Also, fix some style issues in nearby touched code. Signed-off-by: Paul Greenwalt <[email protected]> Signed-off-by: Chinh T Cao <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: refactor FC functionsPaul Greenwalt1-29/+46
Create a helper function for configuring requested flow control so that it can be utilized by other functions looking to configure flow control settings. Utilize the existing helper ice_copy_phy_caps_to_cfg() to copy a PHY capability to configuration instead duplicating the code for it. Signed-off-by: Paul Greenwalt <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: Add advanced power mgmt for WoLAkeem G Abodunrin10-29/+458
Add callbacks needed to support advanced power management for Wake on LAN. Also make ice_pf_state_is_nominal function available for all configurations not just CONFIG_PCI_IOV. Signed-off-by: Akeem G Abodunrin <[email protected]> Signed-off-by: Jesse Brandeburg <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: split ice_discover_caps into two functionsJacob Keller1-55/+39
Using the new ice_aq_list_caps and ice_parse_(dev|func)_caps functions, replace ice_discover_caps with two functions that each take a pointer to the dev_caps and func_caps structures respectively. This makes the side effect of updating the hw->dev_caps and hw->func_caps obvious from reading the implementation of the function. Additionally, it opens the way for enabling reading of device capabilities outside of the initialization flow. By passing in a pointer, another caller will be able to read the capabilities without modifying the HW capabilities structures. As there are no other callers, it is safe to now remove ice_aq_discover_caps and ice_parse_caps. Signed-off-by: Jacob Keller <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: split ice_parse_caps into separate functionsJacob Keller1-170/+378
The ice_parse_caps function is used to convert the capability block data coming from firmware into a structured format used by other parts of the code. The current implementation directly updates the hw->func_caps and hw->dev_caps structures. It is directly called from within ice_aq_discover_caps. This causes the discover_caps function to have the side effect of modifying the HW capability structures, which is not intuitive. Split this function into ice_parse_dev_caps and ice_parse_func_caps. These functions will take a pointer to the dev_caps and func_caps respectively. Also create an ice_parse_common_caps for sharing the capability logic that is common to device and function. Doing so enables a future refactor to allow reading and parsing capabilities into a local caps structure instead of modifying the members of the HW structure directly. Signed-off-by: Jacob Keller <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>
2020-07-23ice: refactor ice_discover_caps to avoid need to retryJacob Keller1-31/+12
The ice_discover_caps function is used to read the device and function capabilities, updating the hardware capabilities structures with relevant data. The exact number of capabilities returned by the hardware is unknown ahead of time. The AdminQ command will report the total number of capabilities in the return buffer. The current implementation involves requesting capabilities once, reading this returned size, and then re-requested with that size. This isn't really necessary. The firmware interface has a maximum size of ICE_AQ_MAX_BUF_LEN. Firmware can never return more than ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem) capabilities. Avoid the retry loop by simply allocating a buffer of size ICE_AQ_MAX_BUF_LEN. This is significantly simpler than retrying. The extra allocation isn't a big deal, as it will be released after we finish parsing the capabilities. Signed-off-by: Jacob Keller <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Tony Nguyen <[email protected]>