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2023-04-11net: dsa: mv88e6xxx: Correct cmode to PHY_INTERFACE_Andrew Lunn1-2/+2
The switch can either take the MAC or the PHY role in an MII or RMII link. There are distinct PHY_INTERFACE_ macros for these two roles. Correct the mapping so that the `REV` version is used for the PHY role. Signed-off-by: Andrew Lunn <[email protected]> Reviewed-by: Russell King (Oracle) <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-04-06Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski3-1/+22
Conflicts: drivers/net/ethernet/google/gve/gve.h 3ce934558097 ("gve: Secure enough bytes in the first TX desc for all TCP pkts") 75eaae158b1b ("gve: Add XDP DROP and TX support for GQI-QPL format") https://lore.kernel.org/all/[email protected]/ https://lore.kernel.org/all/[email protected]/ Adjacent changes: net/can/isotp.c 051737439eae ("can: isotp: fix race between isotp_sendsmg() and isotp_release()") 96d1c81e6a04 ("can: isotp: add module parameter for maximum pdu size") Signed-off-by: Jakub Kicinski <[email protected]>
2023-04-06net: dsa: microchip: Utilize error values in ksz8_w_sta_mac_table()Oleksij Rempel1-15/+18
To handle potential read/write operation failures, update ksz8_w_sta_mac_table() to make use of the return values provided by read/write functions. Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-04-06net: dsa: microchip: Make ksz8_w_sta_mac_table() staticOleksij Rempel2-4/+2
Since ksz8_w_sta_mac_table() is only used within ksz8795.c, make it static to limit its scope. Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-04-06net: dsa: microchip: ksz8_r_sta_mac_table(): Utilize error values from ↵Oleksij Rempel1-4/+15
read/write functions Take advantage of the return values provided by read/write functions in ksz8_r_sta_mac_table() to handle cases where read/write operations may fail. Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-04-06net: dsa: microchip: ksz8_r_sta_mac_table(): Avoid using error code for ↵Oleksij Rempel1-37/+50
empty entries Prepare for the next patch by ensuring that ksz8_r_sta_mac_table() does not use error codes for empty entries. This change will enable better handling of read/write errors in the upcoming patch. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-04-06net: dsa: microchip: ksz8: Make ksz8_r_sta_mac_table() staticOleksij Rempel2-4/+2
As ksz8_r_sta_mac_table() is only used within ksz8795.c, there is no need to export it. Make the function static for better encapsulation. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-04-06net: dsa: microchip: ksz8: Implement add/del_fdb and use static MAC table ↵Oleksij Rempel3-0/+18
operations Add support for add/del_fdb operations and utilize the refactored static MAC table code. This resolves kernel warnings caused by the lack of fdb add function support in the current driver. Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-04-06net: dsa: microchip: ksz8: Separate static MAC table operations for code reuseOleksij Rempel1-11/+23
Move static MAC table operations to separate functions in order to reuse the code for add/del_fdb. This is needed to address kernel warnings caused by the lack of fdb add function support in the current driver. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-04-03net: dsa: mt7530: introduce driver for MT7988 built-in switchDaniel Golle5-10/+253
Add driver for the built-in Gigabit Ethernet switch which can be found in the MediaTek MT7988 SoC. The switch shares most of its design with MT7530 and MT7531, but has it's registers mapped into the SoCs register space rather than being connected externally or internally via MDIO. Introduce a new platform driver to support that. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: skip locking if MDIO bus isn't presentDaniel Golle1-2/+4
As MT7530 and MT7531 internally use 32-bit wide registers, each access to any register of the switch requires several operations on the MDIO bus. Hence if there is congruent access, e.g. due to PCS or PHY polling, this can mess up and interfere with another ongoing register access sequence. However, the MDIO bus mutex is only relevant for MDIO-connected switches. Prepare switches which have there registers directly mapped into the SoCs register space via MMIO which do not require such locking. There we can simply use regmap's default locking mechanism. Hence guard mutex operations to only be performed in case of MDIO connected switches. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: introduce separate MDIO driverDaniel Golle5-258/+299
Split MT7530 switch driver into a common part and a part specific for MDIO connected switches and multi-chip modules. Move MDIO-specific functions to newly introduced mt7530-mdio.c while keeping the common parts in mt7530.c. Introduce new Kconfig symbol CONFIG_NET_DSA_MT7530_MDIO which is implied by CONFIG_NET_DSA_MT7530. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: split-off common parts from mt7531_setupDaniel Golle1-44/+55
MT7988 shares a significant part of the setup function with MT7531. Split-off those parts into a shared function which is going to be used also by mt7988_setup. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: introduce mt7530_remove_common helper functionDaniel Golle1-6/+12
Move commonly used parts from mt7530_remove into new mt7530_remove_common helper function which will be used by both, mt7530_remove and the to-be-introduced mt7988_remove. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: introduce mt7530_probe_common helper functionDaniel Golle1-44/+54
Move commonly used parts from mt7530_probe into new mt7530_probe_common helper function which will be used by both, mt7530_probe and the to-be-introduced mt7988_probe. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: move p5_intf_modes() function to mt7530.cDaniel Golle2-18/+18
In preparation of splitting mt7530.c into a driver for MDIO-connected as well as MDIO-accessed built-in switches on one hand and MMIO-accessed built-in switches move the p5_inft_modes() function from mt7530.h to mt7530.c. The function is only needed there and will trigger a compiler warning about a defined but unused function otherwise when including mt7530.h in the to-be-introduced bus-specific drivers. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: introduce mutex helpersDaniel Golle1-37/+36
As the MDIO bus lock only needs to be involved if actually operating on an MDIO-connected switch we will need to skip locking for built-in switches which are accessed via MMIO. Create helper functions which simplify that upcoming change. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: move SGMII PCS creation to mt7530_probe functionDaniel Golle1-6/+7
Move creating the SGMII PCS from mt753x_setup() to the more appropriate mt7530_probe() function. This is done also in preparation of moving all functions related to MDIO-connected MT753x switches to a separate module. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: use regmap to access switch register spaceDaniel Golle2-39/+62
Use regmap API to access the switch register space. Signed-off-by: Daniel Golle <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: use unlocked regmap accessorsDaniel Golle1-9/+14
Instead of wrapping the locked register accessor functions, use the unlocked variants and add locking wrapper functions to let regmap handle the locking. This is a preparation towards being able to always use regmap to access switch registers instead of open-coded accessor functions. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: refactor SGMII PCS creationDaniel Golle1-24/+50
Instead of macro templates use a dedidated function and allocated regmap_config when creating the regmaps for the pcs-mtk-lynxi instances. This is in preparation to switching to use unlocked regmap accessors and have regmap's locking API handle locking for us. Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-03net: dsa: mt7530: make some noise if register read failsDaniel Golle1-1/+2
Simply returning the negative error value instead of the read value doesn't seem like a good idea. Return 0 instead and add WARN_ON_ONCE(1) so this kind of error will not go unnoticed. Suggested-by: Andrew Lunn <[email protected]> Signed-off-by: Daniel Golle <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-04-02net: dsa: mv88e6xxx: Reset mv88e6393x force WD event bitGustav Ekelund3-1/+22
The force watchdog event bit is not cleared during SW reset in the mv88e6393x switch. This is a different behavior compared to mv886390 which clears the force WD event bit as advertised. This causes a force WD event to be handled over and over again as the SW reset following the event never clears the force WD event bit. Explicitly clear the watchdog event register to 0 in irq_action when handling an event to prevent the switch from sending continuous interrupts. Marvell aren't aware of any other stuck bits apart from the force WD bit. Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family" Signed-off-by: Gustav Ekelund <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-30Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski6-24/+36
Conflicts: drivers/net/ethernet/mediatek/mtk_ppe.c 3fbe4d8c0e53 ("net: ethernet: mtk_eth_soc: ppe: add support for flow accounting") 924531326e2d ("net: ethernet: mtk_eth_soc: add missing ppe cache flush when deleting a flow") Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-30net: dsa: mv88e6xxx: Enable IGMP snooping on user ports onlySteffen Bätz1-2/+7
Do not set the MV88E6XXX_PORT_CTL0_IGMP_MLD_SNOOP bit on CPU or DSA ports. This allows the host CPU port to be a regular IGMP listener by sending out IGMP Membership Reports, which would otherwise not be forwarded by the mv88exxx chip, but directly looped back to the CPU port itself. Fixes: 54d792f257c6 ("net: dsa: Centralise global and port setup code into mv88e6xxx.") Signed-off-by: Steffen Bätz <[email protected]> Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-27net: dsa: b53: mmap: add phy opsÁlvaro Fernández Rojas1-0/+14
Implement phy_read16() and phy_write16() ops for B53 MMAP to avoid accessing B53_PORT_MII_PAGE registers which hangs the device. This access should be done through the MDIO Mux bus controller. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-27net: dsa: b53: mdio: add support for BCM53134Paul Geurts3-3/+24
Add support for the BCM53134 Ethernet switch in the existing b53 dsa driver. BCM53134 is very similar to the BCM58XX series. Signed-off-by: Paul Geurts <[email protected]> Signed-off-by: Álvaro Fernández Rojas <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-25net: dsa: microchip: ksz8: fix MDB configuration with non-zero VIDOleksij Rempel1-1/+1
FID is directly mapped to VID. However, configuring a MAC address with a VID != 0 resulted in incorrect configuration due to an incorrect bit mask. This kernel commit fixed the issue by correcting the bit mask and ensuring proper configuration of MAC addresses with non-zero VID. Fixes: 4b20a07e103f ("net: dsa: microchip: ksz8795: add support for ksz88xx chips") Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-25net: dsa: microchip: ksz8863_smi: fix bulk accessOleksij Rempel1-9/+0
Current regmap bulk access is broken, resulting to wrong reads/writes if ksz_read64/ksz_write64 functions are used. Mostly this issue was visible by using ksz8_fdb_dump(), which returned corrupt MAC address. The reason is that regmap was configured to have max_raw_read/write, even if ksz8863_mdio_read/write functions are able to handle unlimited read/write accesses. On ksz_read64 function we are using multiple 32bit accesses by incrementing each access by 1 instead of 4. Resulting buffer had 01234567.12345678 instead of 01234567.89abcdef. We have multiple ways to fix it: - enable 4 byte alignment for 32bit accesses. Since the HW do not have this requirement. It will break driver. - disable max_raw_* limit. This patch is removing max_raw_* limit for regmap accesses in ksz8863_smi. Fixes: 60a364760002 ("net: dsa: microchip: Add Microchip KSZ8863 SMI based driver support") Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-25net: dsa: microchip: ksz8: ksz8_fdb_dump: avoid extracting ghost entry from ↵Oleksij Rempel1-1/+1
empty dynamic MAC table. If the dynamic MAC table is empty, we will still extract one outdated entry. Fix it by using correct bit offset. Fixes: 4b20a07e103f ("net: dsa: microchip: ksz8795: add support for ksz88xx chips") Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-25net: dsa: microchip: ksz8: fix offset for the timestamp filedOleksij Rempel1-1/+1
We are using wrong offset, so we will get not a timestamp. Fixes: 4b20a07e103f ("net: dsa: microchip: ksz8795: add support for ksz88xx chips") Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-25net: dsa: microchip: ksz8: fix ksz8_fdb_dump() to extract all 1024 entriesOleksij Rempel1-3/+3
Current ksz8_fdb_dump() is able to extract only max 249 entries on the ksz8863/ksz8873 series of switches. This happened due to wrong bit mask and offset calculation. This commit corrects the issue and allows for the complete extraction of all 1024 entries. Fixes: 4b20a07e103f ("net: dsa: microchip: ksz8795: add support for ksz88xx chips") Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-25net: dsa: microchip: ksz8: fix ksz8_fdb_dump()Oleksij Rempel1-6/+5
Before this patch, the ksz8_fdb_dump() function had several issues, such as uninitialized variables and incorrect usage of source port as a bit mask. These problems caused inaccurate reporting of vid information and port assignment in the bridge fdb. Fixes: e587be759e6e ("net: dsa: microchip: update fdb add/del/dump in ksz_common") Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-24net: dsa: realtek: fix out-of-bounds accessAhmad Fatoum1-1/+4
The probe function sets priv->chip_data to (void *)priv + sizeof(*priv) with the expectation that priv has enough trailing space. However, only realtek-smi actually allocated this chip_data space. Do likewise in realtek-mdio to fix out-of-bounds accesses. These accesses likely went unnoticed so far, because of an (unused) buf[4096] member in struct realtek_priv, which caused kmalloc to round up the allocated buffer to a big enough size, so nothing of value was overwritten. With a different allocator (like in the barebox bootloader port of the driver) or with KASAN, the memory corruption becomes quickly apparent. Fixes: aac94001067d ("net: dsa: realtek: add new mdio interface for drivers") Reviewed-by: Florian Fainelli <[email protected]> Reviewed-by: Luiz Angelo Daros de Luca <[email protected]> Reviewed-by: Alvin Šipraga <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Ahmad Fatoum <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-24Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski2-23/+28
Conflicts: drivers/net/ethernet/mellanox/mlx5/core/en_tc.c 6e9d51b1a5cb ("net/mlx5e: Initialize link speed to zero") 1bffcea42926 ("net/mlx5e: Add devlink hairpin queues parameters") https://lore.kernel.org/all/[email protected]/ https://lore.kernel.org/all/[email protected]/ Adjacent changes: drivers/net/phy/phy.c 323fe43cf9ae ("net: phy: Improved PHY error reporting in state machine") 4203d84032e2 ("net: phy: Ensure state transitions are processed from phy_stop()") Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-22net: dsa: mt7530: move setting ssc_delta to PHY_INTERFACE_MODE_TRGMII caseArınç ÜNAL1-5/+4
Move setting the ssc_delta variable to under the PHY_INTERFACE_MODE_TRGMII case as it's only needed when trgmii is used. Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") Signed-off-by: Arınç ÜNAL <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-22net: dsa: mt7530: move lowering TRGMII driving to mt7530_setup()Arınç ÜNAL1-11/+11
Move lowering the TRGMII Tx clock driving to mt7530_setup(), after setting the core clock, as seen on the U-Boot MediaTek ethernet driver. Move the code which looks like it lowers the TRGMII Rx clock driving to after the TRGMII Tx clock driving is lowered. This is run after lowering the Tx clock driving on the U-Boot MediaTek ethernet driver as well. This way, the switch should consume less power regardless of port 6 being used. Update the comment explaining mt7530_pad_clk_setup(). Tested rgmii and trgmii modes of port 6 and rgmii mode of port 5 on MCM MT7530 on MT7621AT Unielec U7621-06 and standalone MT7530 on MT7623NI Bananapi BPI-R2. Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") Link: https://source.denx.de/u-boot/u-boot/-/blob/29a48bf9ccba45a5e560bb564bbe76e42629325f/drivers/net/mtk_eth.c#L682 Tested-by: Arınç ÜNAL <[email protected]> Signed-off-by: Arınç ÜNAL <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-22net: dsa: mt7530: move enabling disabling core clock to mt7530_pll_setup()Arınç ÜNAL1-6/+12
Split the code that enables and disables TRGMII clocks and core clock. Move enabling and disabling core clock to mt7530_pll_setup() as it's supposed to be run there. Add 20 ms delay before enabling the core clock as seen on the U-Boot MediaTek ethernet driver. Change the comment for enabling and disabling TRGMII clocks as the code seems to affect both TXC and RXC. Tested rgmii and trgmii modes of port 6 and rgmii mode of port 5 on MCM MT7530 on MT7621AT Unielec U7621-06 and standalone MT7530 on MT7623NI Bananapi BPI-R2. Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") Link: https://source.denx.de/u-boot/u-boot/-/blob/29a48bf9ccba45a5e560bb564bbe76e42629325f/drivers/net/mtk_eth.c#L589 Tested-by: Arınç ÜNAL <[email protected]> Signed-off-by: Arınç ÜNAL <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-22net: dsa: b53: add BCM63268 RGMII configurationÁlvaro Fernández Rojas2-1/+6
BCM63268 requires special RGMII configuration to work. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-22net: dsa: b53: mmap: allow passing a chip IDÁlvaro Fernández Rojas3-10/+44
BCM6318 and BCM63268 SoCs require a special handling for their RGMIIs, so we should be able to identify them as a special BCM63xx switch. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-22net: dsa: b53: mmap: add more 63xx SoCsÁlvaro Fernández Rojas1-0/+3
BCM6318, BCM6362 and BCM63268 are SoCs with a B53 MMAP switch. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-21net: dsa: b53: add support for BCM63xx RGMIIsÁlvaro Fernández Rojas2-0/+47
BCM63xx RGMII ports require additional configuration in order to work. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Paolo Abeni <[email protected]>
2023-03-21net: dsa: qca8k: remove assignment of an_enabled in pcs_get_state()Russell King (Oracle)1-1/+0
pcs_get_state() implementations are not supposed to alter an_enabled. Remove this assignment. Fixes: b3591c2a3661 ("net: dsa: qca8k: Switch to PHYLINK instead of PHYLIB") Signed-off-by: Russell King (Oracle) <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Paolo Abeni <[email protected]>
2023-03-21net: dsa: mv88e6xxx: fix mdio bus' phy_mask memberMarek Behún1-1/+3
Commit 2c7e46edbd03 ("net: dsa: mv88e6xxx: mask apparently non-existing phys during probing") added non-trivial bus->phy_mask in mv88e6xxx_mdio_register() in order to avoid excessive mdio bus transactions during probing. But the mask is incorrect for switches with non-zero phy_base_addr (such as 88E6341). Fix this. Fixes: 2c7e46edbd03 ("net: dsa: mv88e6xxx: mask apparently non-existing phys during probing") Signed-off-by: Marek Behún <[email protected]> Tested-by: Klaus Kudielka <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Paolo Abeni <[email protected]>
2023-03-20net: dsa: mt7530: use external PCS driverDaniel Golle3-254/+71
Implement regmap access wrappers, for now only to be used by the pcs-mtk-lynxi driver. Make use of this external PCS driver and drop the now reduntant implementation in mt7530.c. As a nice side effect the SGMII registers can now also more easily be inspected for debugging via /sys/kernel/debug/regmap. Tested-by: Bjørn Mork <[email protected]> Signed-off-by: Daniel Golle <[email protected]> Tested-by: Frank Wunderlich <[email protected]> Reviewed-by: Russell King (Oracle) <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2023-03-20net: dsa: ocelot: add support for external physColin Foster1-7/+9
The VSC7512 has four ports with internal phys that are already supported. There are additional ports that can be configured to work with external phys. Add support for these additional ethernet ports. Signed-off-by: Colin Foster <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-20net: dsa: felix: allow serdes configuration for dsa portsColin Foster2-0/+8
Ports for Ocelot devices (VSC7511, VSC7512, VSC7513 and VSC7514) support external phys. When external phys are used, additional configuration on each port is required to enable QSGMII mode and set external phy modes. Add a configurable hook into these routines, so the external ports can be used. Signed-off-by: Colin Foster <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-20net: dsa: felix: allow configurable phylink_mac_configColin Foster2-0/+15
If a user of the Felix driver has a port running in SGMII / QSGMII mode, it will need to utilize phylink_mac_config(). Add this configurability. Signed-off-by: Colin Foster <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-20net: dsa: felix: attempt to initialize internal hsio pllsColin Foster1-0/+3
The VSC7512 and VSC7514 have internal PLLs that can be used to control different peripherals. Initialize these high speed I/O (HSIO) PLLs when they exist, so that dependent peripherals like QSGMII can function. Signed-off-by: Colin Foster <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-03-17net: dsa: mv88e6xxx: mask apparently non-existing phys during probingKlaus Kudielka1-0/+1
To avoid excessive mdio bus transactions during probing, mask all phy addresses that do not exist (there is a 1:1 mapping between switch port number and phy address). Suggested-by: Andrew Lunn <[email protected]> Signed-off-by: Klaus Kudielka <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>