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path: root/drivers/net/dsa/microchip/ksz_common.h
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2022-12-08net: dsa: microchip: add stats64 support for ksz8 series of switchesOleksij Rempel1-0/+1
Add stats64 support for ksz8xxx series of switches. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20221205052904.2834962-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-12-07net: dsa: microchip: ksz8: add MTU configuration supportOleksij Rempel1-0/+4
Make MTU configurable on KSZ87xx and KSZ88xx series of switches. Before this patch, pre-configured behavior was different on different switch series, due to opposite meaning of the same bit: - KSZ87xx: Reg 4, Bit 1 - if 1, max frame size is 1532; if 0 - 1514 - KSZ88xx: Reg 4, Bit 1 - if 1, max frame size is 1514; if 0 - 1532 Since the code was telling "... SW_LEGAL_PACKET_DISABLE, true)", I assume, the idea was to set max frame size to 1532. With this patch, by setting MTU size 1500, both switch series will be configured to the 1532 frame limit. This patch was tested on KSZ8873. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-12-07net: dsa: microchip: add ksz_rmw8() functionOleksij Rempel1-0/+5
Add ksz_rmw8(), it will be used in the next patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-12-07net: dsa: microchip: do not store max MTU for all portsOleksij Rempel1-1/+0
If we have global MTU configuration, it is enough to configure it on CPU port only. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-12-07net: dsa: microchip: move max mtu to one locationOleksij Rempel1-1/+2
There are no HW specific registers, so we can process all of them in one location. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Tested-by: Arun Ramadoss <arun.ramadoss@microchip.com> (KSZ9893 and LAN937x) Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-11-09net: dsa: microchip: add ksz9563 in ksz_switch_ops and select based on ↵Rakesh Sankaranarayanan1-0/+3
compatible string Add KSZ9563 inside ksz_switch_chips structure with port_nirq as 3. KSZ9563 use KSZ9893 switch parameters but port_nirq count is 3 for KSZ9563 whereas 2 for KSZ9893. Add KSZ9563 inside ksz_switch_chips as a separate member and from device tree map compatible string into KSZ9563 inside ksz_spi.c and ksz9477_i2c.c. Global Chip ID 1 and 2 registers read value 9893, select sku based on Global Chip ID 4 Register which read 0x1c for KSZ9563. Signed-off-by: Rakesh Sankaranarayanan <rakesh.sankaranarayanan@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-26net: dsa: microchip: use common irq routines for girq and pirqArun Ramadoss1-3/+6
The global port interrupt routines and individual ports interrupt routines has similar implementation except the mask & status register and number of nested irqs in them. The mask & status register and pointer to ksz_device is added to ksz_irq and uses the ksz_irq as irq_chip_data. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-26net: dsa: microchip: move interrupt handling logic from lan937x to ksz_commonArun Ramadoss1-0/+9
To support the phy link detection through interrupt method for ksz9477 based switch, the interrupt handling routines are moved from lan937x_main.c to ksz_common.c. The only changes made are functions names are prefixed with ksz_ instead of lan937x_. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-26net: dsa: microchip: determine number of port irq based on switch typeArun Ramadoss1-0/+1
Currently the number of port irqs is hard coded for the lan937x switch as 6. In order to make the generic interrupt handler for ksz switches, number of port irq supported by the switch is added to the ksz_chip_data. It is 4 for ksz9477, 2 for ksz9897 and 3 for ksz9567. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-16net: dsa: microchip: add the support for set_ageing_timeArun Ramadoss1-0/+1
KSZ9477 has the 11 bit ageing count value which is split across the two registers. And LAN937x has the 20 bit ageing count which is also split into two registers. Each count in the registers represents 1 second. This patch add the support for ageing time for KSZ9477 and LAN937x series of switch. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-07net: dsa: microchip: add KSZ9896 switch supportRomain Naour1-0/+2
Add support for the KSZ9896 6-port Gigabit Ethernet Switch to the ksz9477 driver. Although the KSZ9896 is already listed in the device tree binding documentation since a1c0ed24fe9b (dt-bindings: net: dsa: document additional Microchip KSZ9477 family switches) the chip id (0x00989600) is not recognized by ksz_switch_detect() and rejected by the driver. The KSZ9896 is similar to KSZ9897 but has only one configurable MII/RMII/RGMII/GMII cpu port. Signed-off-by: Romain Naour <romain.naour@skf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: dsa: microchip: lan937x: add interrupt support for port phy linkArun Ramadoss1-0/+14
This patch enables the interrupts for internal phy link detection for LAN937x. The interrupt enable bits are active low. There is global interrupt mask for each port. And each port has the individual interrupt mask for TAS. QCI, SGMII, PTP, PHY and ACL. The first level of interrupt domain is registered for global port interrupt and second level of interrupt domain for the individual port interrupts. The phy interrupt is enabled in the lan937x_mdio_register function. Interrupt from which port is raised will be detected based on the interrupt host data. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: dsa: microchip: add reference to ksz_device inside the ksz_portArun Ramadoss1-0/+4
struct ksz_port doesn't have reference to ksz_device as of now. In order to find out from which port interrupt has triggered, we need to pass the struct ksz_port as a host data. When the interrupt is triggered, we can get the port from which interrupt triggered, but to identify it is phy interrupt we have to read status register. The regmap structure for accessing the device register is present in the ksz_device struct. To access the ksz_device from the ksz_port, the reference is added to it with port number as well. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: remove IS_9893 flagOleksij Rempel1-4/+0
Use chip_id as other places of this code do it Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: remove unused sgmii variableOleksij Rempel1-1/+0
This variable is not used. So, remove it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: remove unused port phy variableOleksij Rempel1-1/+0
This variable is unused. So, drop it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: add support for regmap_access_tablesOleksij Rempel1-4/+42
This is complex driver with support for different chips with different layouts. To detect at least some bugs earlier, we should validate register accesses by using regmap_access_table support. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: forward error value on all ksz_pread/ksz_pwrite functionsOleksij Rempel1-18/+20
ksz_read*/ksz_write* are able to return errors, so forward it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: allow to pass return values for PHY read/write accessesOleksij Rempel1-2/+2
PHY access may end with errors on different levels. So, allow to forward return values where possible. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: do per-port Gbit detection instead of per-chipOleksij Rempel1-1/+1
KSZ8563 has two 100Mbit PHYs and CPU port with RGMII support. Since 1000Mbit configuration for the RGMII capable MAC is present, we should use per port validation. As main part of migration to per-port validation we need to rework ksz9477_switch_init() function. Which is using undocumented REG_GLOBAL_OPTIONS register to detect per-chip Gbit support. So, it is related to some sort of risk for regressions. To reduce this risk I compared the code with publicly available documentations. This function will executed on following currently supported chips: struct ksz_chip_data OF compatible KSZ9477 KSZ9477 KSZ9897 KSZ9897 KSZ9893 KSZ9893, KSZ9563 KSZ8563 KSZ8563 KSZ9567 KSZ9567 Only KSZ9893, KSZ9563, KSZ8563 document existence of 0xf == REG_GLOBAL_OPTIONS register with bit field description "SKU ID": KSZ9893 0x0C KSZ9563 0x1C KSZ8563 0x3C The existence of hidden flags is not documented. KSZ9477, KSZ9897, KSZ9567 do not document this register at all. Only KSZ8563 is documented as non Gbit chip: 100Mbit PHYs and RGMII CPU port. So, this change should not introduce a regression for configurations with properly used OF compatibles. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: dsa: microchip: add separate struct ksz_chip_data for KSZ8563 chipOleksij Rempel1-0/+6
Add separate entry for the KSZ8563 chip. According to the documentation it can support Gbit only on RGMII port. So, we will need to be able to describe in the followup patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-23net: dsa: microchip: make learning configurable and keep it off while standaloneVladimir Oltean1-0/+1
Address learning should initially be turned off by the driver for port operation in standalone mode, then the DSA core handles changes to it via ds->ops->port_bridge_flags(). Leaving address learning enabled while ports are standalone breaks any kind of communication which involves port B receiving what port A has sent. Notably it breaks the ksz9477 driver used with a (non offloaded, ports act as if standalone) bonding interface in active-backup mode, when the ports are connected together through external switches, for redundancy purposes. This fixes a major design flaw in the ksz9477 and ksz8795 drivers, which unconditionally leave address learning enabled even while ports operate as standalone. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Link: https://lore.kernel.org/netdev/CAFZh4h-JVWt80CrQWkFji7tZJahMfOToUJQgKS5s0_=9zzpvYQ@mail.gmail.com/ Reported-by: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20220818164809.3198039-1-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-27net: dsa: microchip: add support for phylink mac configArun Ramadoss1-1/+5
This patch add support for phylink mac config for ksz series of switches. All the files ksz8795, ksz9477 and lan937x uses the ksz common xmii function. Instead of calling from the individual files, it is moved to the ksz common phylink mac config function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: ksz9477: use common xmii functionArun Ramadoss1-1/+6
In ksz9477.c file, configuring the xmii register is performed based on the flag NEW_XMII. The flag is reset for ksz9893 switch and set for other switch. This patch uses the ksz common xmii set and get function. The bit values are configured based on the chip id. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: apply rgmii tx and rx delay in phylink mac configArun Ramadoss1-0/+3
This patch read the rgmii tx and rx delay from device tree and stored it in the ksz_port. It applies the rgmii delay to the xmii tune adjust register based on the interface selected in phylink mac config. There are two rgmii port in LAN937x and value to be loaded in the register vary depends on the port selected. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: lan937x: add support for configuing xMII registerArun Ramadoss1-0/+8
This patch add the common ksz_set_xmii function for ksz series switch and update the lan937x code phylink mac config. The register address for the ksz8795 is Port 5 Interface control 6 and for all other switch is xMII Control 1. The bit value for selecting the interface is same for KSZ8795 and KSZ9893 are same. The bit values for KSZ9477 and lan973x are same. So, this patch add the bit value for each switches in ksz_chip_data and configure the registers based on the chip id. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add support for common phylink mac link upArun Ramadoss1-3/+0
This patch add the support for common phylink mac link up for the ksz series switch. The register address, bit position and values are configured based on the chip id to the dev->info structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add common duplex and flow control functionArun Ramadoss1-0/+15
This patch add common function for configuring the Full/Half duplex and transmit/receive flow control. KSZ8795 uses the Global control register 4 for configuring the duplex and flow control, whereas all other KSZ9477 based switch uses the xMII Control 0 register. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add common ksz port xmii speed selection functionArun Ramadoss1-0/+10
This patch adds the function for configuring the 100/10Mbps speed selection for the ksz switches. KSZ8795 switch uses Global control 4 register 0x06 bit 4 for choosing 100/10Mpbs. Other switches uses xMII control 1 0xN300 for it. For KSZ8795, if the bit is set then 10Mbps is chosen and if bit is clear then 100Mbps chosen. For all other switches it is other way around, if the bit is set then 100Mbps is chosen. So, this patch add the generic function for ksz switch to select the 100/10Mbps speed selection. While configuring, first it disables the gigabit functionality and then configure the respective speed. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-27net: dsa: microchip: add common gigabit set and get functionArun Ramadoss1-0/+12
This patch add helper function for setting and getting the gigabit enable for the ksz series switch. KSZ8795 switch has different register address compared to all other ksz switches. KSZ8795 series uses the Port 5 Interface control 6 Bit 6 for configuring the 1Gbps or 100/10Mbps speed selection. All other switches uses the xMII control 1 0xN301 register Bit6 for gigabit. Further, for KSZ8795 & KSZ9893 switches if bit 1 then 1Gbps is chosen and if bit 0 then 100/10Mbps is chosen. It is other way around for other switches bit 0 is for 1Gbps. So, this patch implements the common function for configuring the gigabit set and get capability. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_mac_config supportArun Ramadoss1-0/+3
This patch add support for phylink_mac_config dsa hook. It configures the mac for MII/RMII modes. The RGMII mode will be added in the future patches. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_mac_link_up supportArun Ramadoss1-0/+5
This patch add support for phylink_mac_link_up. It configures the mac for the speed, flow control and duplex mode. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add dsa_tag_protocolArun Ramadoss1-0/+9
This patch update the ksz_get_tag_protocol to return LAN937x specific tag if the chip id matches one of LAN937x series switch Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: generic access to ksz9477 static and reserved tableArun Ramadoss1-0/+3
The ksz9477 and lan937x has few difference in the static and reserved table register 0x041C. For the ksz9477 if the bit 0 is 1 - read operation and 0 - write operation. But for lan937x bit 1:0 used for selecting the read/write operation, 01 - write and 10 - read. To use ksz9477 mdb add/del and enable_stp_addr for the lan937x, masks & shifts are introduced for ksz9477 & lan937x in ksz_common.c. Then updated the function with masks & shifts based on the switch instead of hard coding it. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: add pause stats supportOleksij Rempel1-0/+1
Add support for pause specific stats. Tested on ksz9477. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-29net: dsa: microchip: move remaining register offset to ksz_chip_regArun Ramadoss1-0/+3
This patch moves the broadcast ctrl, multicast ctrl and start control registers from ksz_chip_dat to ksz_chip_reg. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: add P_STP_CTRL to ksz_chip_regArun Ramadoss1-0/+1
This patch moves the stp_ctrl_reg from the ksz_chip_data to ksz_chip_reg structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: change the size of reg from u8 to u16Arun Ramadoss1-1/+1
The register size for the ksz8 switches is u8 and for ksz9477 series is u16. To have common struct for ksz series switches the size of reg is increased from u8 to u16. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: move ksz8->shifts to ksz_commonArun Ramadoss1-0/+13
This patch moves ksz8->shifts from ksz8795.c to ksz_common.c. The shifts are dereferenced using dev->info->shifts. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: move ksz8->masks to ksz_commonArun Ramadoss1-0/+23
This patch moves the ksz8->masks from ksz8795.c to ksz_common.c. The mask will be dereferenced using dev->info->masks. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-29net: dsa: microchip: move ksz8->regs to ksz_commonArun Ramadoss1-0/+18
This patch moves the ksz8->regs from ksz8795.c to the ksz_common.c. And the regs is dereferrenced using dev->info->regs. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: remove the ksz8/ksz9477_switch_registerArun Ramadoss1-3/+0
This patch delete the ksz8_switch_register and ksz9477_switch_register since both are calling the ksz_switch_register function. Instead the ksz_switch_register is called from the probe function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: move ksz_dev_ops to ksz_common.cArun Ramadoss1-2/+2
This patch move the ksz_dev_ops from individual files to ksz_common.c. And the dev_ops is assigned to ksz_device based on the switch detect. This reduces the redundant function and allows to reuse the functionality for LAN937x which has similar register set. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: common dsa_switch_ops for ksz switchesArun Ramadoss1-53/+1
At present, ksz8795.c and ksz9477.c have separate dsa_switch_ops structure initialization. This patch modifies the files such a way that ksz switches has common dsa_switch_ops in the ksz_common.c file. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: move start of switch to ksz_setupArun Ramadoss1-0/+3
This patch move the setting the start bit from the individual switch configuration to ksz_setup Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: move multicast enable to ksz_setupArun Ramadoss1-0/+3
This patch moves the enabling the multicast storm protection from individual setup function to ksz_setup function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: move broadcast rate limit to ksz_setupArun Ramadoss1-0/+11
This patch move the 10% broadcast protection from the individual setup to ksz_setup. In the ksz9477, broadcast protection is updated in reset function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: move setup function to ksz_commonArun Ramadoss1-0/+2
This patch move the common initialization of switches to ksz_setup and perform the switch specific initialization using the ksz_dev_ops function pointer. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: add the enable_stp_addr pointer in ksz_dev_opsArun Ramadoss1-0/+1
In order to transmit the STP BPDU packet to the CPU port, the STP address 01-80-c2-00-00-00 has to be added to static alu table for ksz8795 series switch. For the ksz9477 switch, there is reserved multicast table which handles forwarding the particular set of multicast address to cpu port. So enabling the multicast reserved table and updated the cpu port index. The stp addr is enabled during the setup phase using the enable_stp_addr pointer in struct ksz_dev_ops. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-24net: dsa: microchip: add config_cpu_port to struct ksz_dev_opsArun Ramadoss1-0/+1
To have the common set of initialization in ksz_setup, introduced the new config_cpu_port member to ksz_dev_ops. Since both the ksz8795.c and ksz9477.c configuring the cpu port in the setup function, introduced the member. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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