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2018-11-07mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driverPiotr Bugalski1-73/+18
Previously added spi-mem interface is now used instead of older approach. Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Piotr Bugalski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-11-07mtd: spi-nor: atmel-quadspi: Add spi-mem support to atmel-quadspiPiotr Bugalski1-0/+211
This patch adds new interface to existing driver. New code is not used yet, it will be enabled later. Changes are prepared in small steps to keep patches readable. Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Piotr Bugalski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-11-07mtd: spi-nor: atmel-quaspi: Typo fixPiotr Bugalski1-2/+2
Just minor typo fix. Fixed in preparation of new driver. Signed-off: Piotr Bugalski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-11-06mtd: maps: Get rid of the latch-addr-flash driverBoris Brezillon3-239/+0
Looks like this driver was initially added to support the NOR on the DA830-EVM (Davinci) board, but the board file update was never merged. Keeping unused drivers just adds to the maintenance burden, so let's remove it if nobody uses it. Cc: David Griego <[email protected]> Cc: Aleksey Makarov <[email protected]> Cc: Sergei Shtylyov <[email protected]> Cc: Savinay Dharmappa <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Acked-by: Sekhar Nori <[email protected]>
2018-11-06mtd: maps: physmap: Invert logic on if/else branchRicardo Ribalda Delgado1-8/+11
It is preferred to have the positive statement on an if/else. While we are at it we replace the way we access rom_probe_types. Signed-off-by: Ricardo Ribalda Delgado <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-06mtd: sa1100: avoid VLA in sa1100_setup_mtdBoris Brezillon1-1/+9
Enabling -Wvla found another variable-length array with randconfig testing: drivers/mtd/maps/sa1100-flash.c: In function 'sa1100_setup_mtd': drivers/mtd/maps/sa1100-flash.c:224:10: error: ISO C90 forbids variable length array 'cdev' [-Werror=vla] Dynamically allocate the cdev array passed to mtd_concat_create() instead of using a VLA. Reported-by: Arnd Bergmann <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Cc: Kees Cook <[email protected]> Cc: Olof Johansson <[email protected]>
2018-11-06mtd: rawnand: Flag 1.8V AC chips with a broken GET_FEATURES(TIMINGS)Mason Yang1-0/+7
Make sure we flag all 1.8V broken chips as not supporting this feature. Signed-off-by: Mason Yang <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: spi-nor: Reset nor->addr_width when SFDP parsing failedBoris Brezillon1-2/+4
Commit 5390a8df769e ("mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories") removed the 'nor->addr_width = 0;' statement when spi_nor_parse_sfdp() returns an error, thus leaving ->addr_width in an undefined state which can cause trouble when spi_nor_scan() checks its value. Reported-by: Cyrille Pitchen <[email protected]> Fixes: 5390a8df769e ("mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories") Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Tudor Ambarus <[email protected]>
2018-11-05mtd: spi-nor: cadence-quadspi: Return error code in cqspi_direct_read_execute()Christophe JAILLET1-1/+1
We return 0 unconditionally in 'cqspi_direct_read_execute()'. However, 'ret' is set to some error codes in several error handling paths. Return 'ret' instead to propagate the error code. Fixes: ffa639e069fb ("mtd: spi-nor: cadence-quadspi: Add DMA support for direct mode reads") Cc: <[email protected]> Signed-off-by: Christophe JAILLET <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-11-05mtd: maps: Merge gpio-addr-flash.c into physmap-core.cBoris Brezillon4-294/+157
Controlling some MSB address lines using GPIOs is just a small deviation from the generic physmap logic, and merging those two drivers allows us to share most of the probe logic, which is a good thing. Also, the gpio-addr-flash driver is unused since the removal of the blackfin arch in v4.17, so we can safely remove the old driver without risking breaking existing boards. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Tested-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: Rename physmap_of_{versatile, gemini} into physmap-{versatile, ↵Boris Brezillon7-10/+10
gemini} Now that the physmap_of driver is gone, the gemini and versative extensions are part of the physmap driver. Rename the source files and the config option to reflect this. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: Merge physmap_of.c into physmap-core.cBoris Brezillon4-400/+240
There's no real reason to have two separate driver for the DT and pdata case. Just do what we do everywhere else and handle DT and pdata parsing in the same driver. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: Prepare merging of physmap and physmap_ofBoris Brezillon2-0/+2
We want to merge the physmap and physmap_of driver, but before we can do that we must prepare things to create physmap.o out of several .c files. Rename physmap.c into physmap-core.c and add a new Makefile rule to create physmap.o (right now it only contains physmap-core.o). Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Fix coding style issues reported by checkpatchBoris Brezillon1-15/+18
Fix the following coding style issues: - != NULL and == NULL test replaced by ! (or nothing) - split over 80 chars lines - add missing braces in multi-line if() {} else {} statements Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Return -ENOMEM directly when info allocation failsBoris Brezillon1-4/+2
There's no point going to the err_out path since no resources have been allocated yet, just return -ENOMEM directly. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Check mtd_device_{parse_register, unregister}() ret codeBoris Brezillon1-4/+11
mtd_device_parse_register() and mtd_device_unregister() can fail, check their return code and propagate the error to the upper layer if needed. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Remove the MAX_RESOURCES limitationBoris Brezillon1-17/+27
Remove the MAX_RESOURCES limitation by dynamically allocating the ->mtds[] and ->maps[] at probe time based on the number of iomem resources attached to the platform device. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Use devm_ioremap_resource()Boris Brezillon1-17/+6
Use devm_ioremap_resource() to replace the devm_request_mem_region() + devm_ioremap() combination. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Use dev_notice() and a %pR specifierBoris Brezillon1-3/+2
Replace printk(KERN_NOTICE) by dev_notice() use the %pR specifier to print the iomem resource. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Use platform_get_resource() to retrieve iomem resourcesBoris Brezillon1-11/+18
Stop manipulating the dev->resource array directly and use the platform_get_resource() helper instead. While at it, fix the loop check so that we never overflow the info->maps and info->mtds array even if the number of resources attached to the platform dev is higher than MAX_RESOURCES. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Rename ->map and ->mtd into ->maps and ->mtdsBoris Brezillon1-27/+28
The ->map and ->mtd fields are actually arrays of map and mtd objects. Rename those fields into ->maps and ->mtds to make it obvious. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: maps: physmap: Add SPDX headerBoris Brezillon1-0/+1
Add an SPDX header matching the MODULE_LICENSE("GPL") definition. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Ricardo Ribalda Delgado <[email protected]> Acked-by: Linus Walleij <[email protected]>
2018-11-05mtd: rawnand: r852: use generic DMA APIChristoph Hellwig1-13/+13
Use the generic DMA API instead of the legacy PCI DMA API. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: denali: include <linux/bits.h> instead of <linux/bitops.h>Masahiro Yamada1-1/+1
The reason of including <linux/bitops.h> here is just for BIT() and GENMASK macros. Since commit 8bd9cb51daac8 ("locking/atomics, asm-generic: Move some macros from <linux/bitops.h> to a new <linux/bits.h> file"), <linux/bits.h> is enough for such compile-time macros. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: ams-delta: Convert the driver to ->exec_op()Janusz Krzysztofik1-44/+56
Replace legacy callbacks with ->select_chip() and ->exec_op(). Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: ams-delta: Stop using legacy .IOADDR_R/WJanusz Krzysztofik1-4/+2
Replace use of legacy .IOADDR_R/W with runtime calculations based on priv->io_base. Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: Provide helper for polling GPIO R/B pinJanusz Krzysztofik1-0/+31
Each controller driver having access to NAND R/B pin over GPIO would have to reimplement the polling loop otherwise. Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: fsmc: Fix unchecked return value in fsmc_read_page_hweccGustavo A. R. Silva1-3/+4
Check return value of nand_read_data_op. Notice that, currently, all instances of nand_read_data_op() are being checked, with the exception of two of them in marvell_nand driver, in which the caller function explicitly returns 0 every time. Also, notice that I moved the declaration of *ret* to the top of fsmc_read_page_hwecc(). Addresses-Coverity-ID: 1471968 ("Unchecked return value") Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: spinand: winbond: Add support for W25N01GVRobert Marko1-0/+8
W25N01GV is a single die version of the already supported W25M02GV with half the capacity. Everything else is the same so introduce support for W25N01GV. Datasheet:http://www.winbond.com/resource-files/w25n01gv%20revl%20050918%20unsecured.pdf Tested on 8devices Jalapeno dev board under OpenWrt running 4.19-rc5. Signed-off-by: Robert Marko <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: nand: drop kernel-doc notation for a deleted function parameterRandy Dunlap1-1/+0
Remove kernel-doc notation for a deleted function parameter to prevent a kernel-doc warning: ../drivers/mtd/nand/raw/nand_base.c:603: warning: Excess function parameter 'mtd' description in 'panic_nand_wait' Fixes: f1d46942e823 ("mtd: rawnand: Pass a nand_chip object to chip->waitfunc()") Signed-off-by: Randy Dunlap <[email protected]> Cc: Boris Brezillon <[email protected]> Cc: Miquel Raynal <[email protected]> Cc: Richard Weinberger <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-11-05mtd: docg3: don't set conflicting BCH_CONST_PARAMS optionArnd Bergmann1-1/+1
I noticed during the creation of another bugfix that the BCH_CONST_PARAMS option that is set by DOCG3 breaks setting variable parameters for any other users of the BCH library code. The only other user we have today is the MTD_NAND software BCH implementation (most flash controllers use hardware BCH these days and are not affected). I considered removing BCH_CONST_PARAMS entirely because of the inherent conflict, but according to the description in lib/bch.c there is a significant performance benefit in keeping it. To avoid the immediate problem of the conflict between MTD_NAND_BCH and DOCG3, this only sets the constant parameters if MTD_NAND_BCH is disabled, which should fix the problem for all cases that are affected. This should also work for all stable kernels. Note that there is only one machine that actually seems to use the DOCG3 driver (arch/arm/mach-pxa/mioa701.c), so most users should have the driver disabled, but it almost certainly shows up if we wanted to test random kernels on machines that use software BCH in MTD. Fixes: d13d19ece39f ("mtd: docg3: add ECC correction code") Cc: [email protected] Cc: Robert Jarzmik <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-11-04Merge tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifsLinus Torvalds2-0/+3
Pull UBIFS updates from Richard Weinberger: - Full filesystem authentication feature, UBIFS is now able to have the whole filesystem structure authenticated plus user data encrypted and authenticated. - Minor cleanups * tag 'tags/upstream-4.20-rc1' of git://git.infradead.org/linux-ubifs: (26 commits) ubifs: Remove unneeded semicolon Documentation: ubifs: Add authentication whitepaper ubifs: Enable authentication support ubifs: Do not update inode size in-place in authenticated mode ubifs: Add hashes and HMACs to default filesystem ubifs: authentication: Authenticate super block node ubifs: Create hash for default LPT ubfis: authentication: Authenticate master node ubifs: authentication: Authenticate LPT ubifs: Authenticate replayed journal ubifs: Add auth nodes to garbage collector journal head ubifs: Add authentication nodes to journal ubifs: authentication: Add hashes to index nodes ubifs: Add hashes to the tree node cache ubifs: Create functions to embed a HMAC in a node ubifs: Add helper functions for authentication support ubifs: Add separate functions to init/crc a node ubifs: Format changes for authentication support ubifs: Store read superblock node ubifs: Drop write_node ...
2018-10-31mm: remove include/linux/bootmem.hMike Rapoport1-1/+1
Move remaining definitions and declarations from include/linux/bootmem.h into include/linux/memblock.h and remove the redundant header. The includes were replaced with the semantic patch below and then semi-automated removal of duplicated '#include <linux/memblock.h> @@ @@ - #include <linux/bootmem.h> + #include <linux/memblock.h> [[email protected]: dma-direct: fix up for the removal of linux/bootmem.h] Link: http://lkml.kernel.org/r/[email protected] [[email protected]: powerpc: fix up for removal of linux/bootmem.h] Link: http://lkml.kernel.org/r/[email protected] [[email protected]: x86/kaslr, ACPI/NUMA: fix for linux/bootmem.h removal] Link: http://lkml.kernel.org/r/[email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Mike Rapoport <[email protected]> Signed-off-by: Stephen Rothwell <[email protected]> Acked-by: Michal Hocko <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Chris Zankel <[email protected]> Cc: "David S. Miller" <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Greentime Hu <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Guan Xuetao <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: "James E.J. Bottomley" <[email protected]> Cc: Jonas Bonn <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: Ley Foon Tan <[email protected]> Cc: Mark Salter <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Matt Turner <[email protected]> Cc: Michael Ellerman <[email protected]> Cc: Michal Simek <[email protected]> Cc: Palmer Dabbelt <[email protected]> Cc: Paul Burton <[email protected]> Cc: Richard Kuo <[email protected]> Cc: Richard Weinberger <[email protected]> Cc: Rich Felker <[email protected]> Cc: Russell King <[email protected]> Cc: Serge Semin <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Tony Luck <[email protected]> Cc: Vineet Gupta <[email protected]> Cc: Yoshinori Sato <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2018-10-23ubi: Mark expected switch fall-throughsGustavo A. R. Silva2-0/+3
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1373884 ("Missing break in switch") Addresses-Coverity-ID: 114869 ("Missing break in switch") Addresses-Coverity-ID: 114870 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Richard Weinberger <[email protected]>
2018-10-23Merge tag 'mtd/for-4.20' of git://git.infradead.org/linux-mtdLinus Torvalds85-5150/+4644
Pull mtd updates from Boris Brezillon: "SPI NOR core changes: - Support non-uniform erase size - Support controllers with limited TX fifo size Driver changes: - m25p80: Re-issue a WREN command after each write access - cadence: Pass a proper dir value to dma_[un]map_single() - fsl-qspi: Check fsl_qspi_get_seqid() return val make sure 4B addressing opcodes are properly handled - intel-spi: Add a new PCI entry for Ice Lake Raw NAND core changes: - Two batchs of cleanups of the NAND API, including: * Deprecating a lot of interfaces (now replaced by ->exec_op()). * Moving code in separate drivers (JEDEC, ONFI), in private files (internals), in platform drivers, etc. * Functions/structures reordering. * Exclusive use of the nand_chip structure instead of the MTD one all across the subsystem. - Addition of the nand_wait_readrdy/rdy_op() helpers. Raw NAND controllers drivers changes: - Various coccinelle patches. - Marvell: * Use regmap_update_bits() for syscon access. * More documentation. * BCH failure path rework. * More layouts to be supported. * IRQ handler complete() condition fixed. - Fsl_ifc: * SRAM initialization fixed for newer controller versions. - Denali: * Fix licenses mismatch and use a SPDX tag. * Set SPARE_AREA_SKIP_BYTES register to 8 if unset. - Qualcomm: * Do not include dma-direct.h. - Docg4: * Removed. - Ams-delta: * Use of a GPIO lookup table * Internal machinery changes. Raw NAND chip drivers changes: - Toshiba: * Add support for Toshiba memory BENAND * Pass a single nand_chip object to the status helper. - ESMT: * New driver to retrieve the ECC requirements from the 5th ID byte. MTD changes: - physmap cleanups/fixe - gpio-addr-flash cleanups/fixes" * tag 'mtd/for-4.20' of git://git.infradead.org/linux-mtd: (93 commits) jffs2: free jffs2_sb_info through jffs2_kill_sb() mtd: spi-nor: fsl-quadspi: fix read error for flash size larger than 16MB mtd: spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flash mtd: maps: gpio-addr-flash: Convert to gpiod mtd: maps: gpio-addr-flash: Replace array with an integer mtd: maps: gpio-addr-flash: Use order instead of size mtd: spi-nor: fsl-quadspi: Don't let -EINVAL on the bus mtd: devices: m25p80: Make sure WRITE_EN is issued before each write mtd: spi-nor: Support controllers with limited TX FIFO size mtd: spi-nor: cadence-quadspi: Use proper enum for dma_[un]map_single mtd: spi-nor: parse SFDP Sector Map Parameter Table mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories mtd: rawnand: marvell: fix the IRQ handler complete() condition mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES register to 8 if unset mtd: rawnand: r852: fix spelling mistake "card_registred" -> "card_registered" mtd: rawnand: toshiba: Pass a single nand_chip object to the status helper mtd: maps: gpio-addr-flash: Use devm_* functions mtd: maps: gpio-addr-flash: Fix ioremapped size mtd: maps: gpio-addr-flash: Replace custom printk mtd: physmap_of: Release resources on error ...
2018-10-19Merge tag 'nand/for-4.20' of git://git.infradead.org/linux-mtd into mtd/nextBoris Brezillon77-4952/+3701
NAND core changes: - Two batchs of cleanups of the NAND API, including: * Deprecating a lot of interfaces (now replaced by ->exec_op()). * Moving code in separate drivers (JEDEC, ONFI), in private files (internals), in platform drivers, etc. * Functions/structures reordering. * Exclusive use of the nand_chip structure instead of the MTD one all across the subsystem. - Addition of the nand_wait_readrdy/rdy_op() helpers. Raw NAND controllers drivers changes: - Various coccinelle patches. - Marvell: * Use regmap_update_bits() for syscon access. * More documentation. * BCH failure path rework. * More layouts to be supported. * IRQ handler complete() condition fixed. - Fsl_ifc: * SRAM initialization fixed for newer controller versions. - Denali: * Fix licenses mismatch and use a SPDX tag. * Set SPARE_AREA_SKIP_BYTES register to 8 if unset. - Qualcomm: * Do not include dma-direct.h. - Docg4: * Removed. - Ams-delta: * Use of a GPIO lookup table * Internal machinery changes. Raw NAND chip drivers changes: - Toshiba: * Add support for Toshiba memory BENAND * Pass a single nand_chip object to the status helper. - ESMT: * New driver to retrieve the ECC requirements from the 5th ID byte.
2018-10-19Merge tag 'spi-nor/for-4.20' of git://git.infradead.org/linux-mtd into mtd/nextBoris Brezillon5-86/+882
Core changes: * Support non-uniform erase size * Support controllers with limited TX fifo size Driver changes: * m25p80: Re-issue a WREN command after each write access * cadence: Pass a proper dir value to dma_[un]map_single() * fsl-qspi: Check fsl_qspi_get_seqid() return val make sure 4B addressing opcodes are properly handled * intel-spi: Add a new PCI entry for Ice Lake
2018-10-16mtd_blkdevs: convert to blk-mqJens Axboe1-37/+63
Straight forward conversion, using an internal list to enable the driver to pull requests at will. Dynamically allocate the tag set to avoid having to pull in the block headers for blktrans.h, since various mtd drivers use block conflicting names for defines and functions. Cc: David Woodhouse <[email protected]> Cc: [email protected] Tested-by: Richard Weinberger <[email protected]> Signed-off-by: Jens Axboe <[email protected]>
2018-10-12mtd: spi-nor: fsl-quadspi: fix read error for flash size larger than 16MBLiu Xiang1-0/+1
If the size of spi-nor flash is larger than 16MB, the read_opcode is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can cause read operation fail. Fixes: e46ecda764dc ("mtd: spi-nor: Add Freescale QuadSPI driver") Cc: <[email protected]> Signed-off-by: Liu Xiang <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-12mtd: spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flashMika Westerberg1-0/+1
Intel Ice Lake exposes the SPI serial flash controller as a PCI device in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <[email protected]> Acked-by: Marek Vasut <[email protected]> Cc: [email protected] Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: maps: gpio-addr-flash: Convert to gpiodRicardo Ribalda Delgado1-34/+21
Convert from legacy gpio API to gpiod. Board files will have to use gpiod_lookup_tables. Signed-off-by: Ricardo Ribalda Delgado <[email protected]> Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: maps: gpio-addr-flash: Replace array with an integerRicardo Ribalda Delgado1-17/+17
By replacing the array with an integer we can avoid completely the bit comparison loop if the value has not changed (by far the most common case). Signed-off-by: Ricardo Ribalda Delgado <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: maps: gpio-addr-flash: Use order instead of sizeRicardo Ribalda Delgado1-18/+21
By using the order of the window instead of the size, we can replace a lot of expensive division and modulus on the code with simple bit operations. Signed-off-by: Ricardo Ribalda Delgado <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: spi-nor: fsl-quadspi: Don't let -EINVAL on the busAhmad Fatoum1-4/+10
fsl_qspi_get_seqid() may return -EINVAL, but fsl_qspi_init_ahb_read() doesn't check for error codes with the result that -EINVAL could find itself signalled over the bus. In conjunction with the LS1046A SoC's A-009283 errata ("Illegal accesses to SPI flash memory can result in a system hang") this illegal access to SPI flash memory results in a system hang if userspace attempts reading later on. Avoid this by always checking fsl_qspi_get_seqid()'s return value and bail out otherwise. Fixes: e46ecda764dc ("mtd: spi-nor: Add Freescale QuadSPI driver") Cc: [email protected] Signed-off-by: Ahmad Fatoum <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: devices: m25p80: Make sure WRITE_EN is issued before each writeYogesh Gaur1-15/+8
Some SPI controllers can't write nor->page_size bytes in a single step because their TX FIFO is too small, but when that happens we should make sure a WRITE_EN command before each write access and READ_SR command after each write access is issued. The core is already taking care of that, so all we have to do here is return the actual number of bytes that were written during the spi_mem_exec_op() operation. Signed-off-by: Yogesh Gaur <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: spi-nor: Support controllers with limited TX FIFO sizeYogesh Gaur1-7/+0
Some SPI controllers can't write nor->page_size bytes in a single step because their TX FIFO is too small. Allow nor->write() to return a size that is smaller than the requested write size to gracefully handle this case. Signed-off-by: Yogesh Gaur <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: spi-nor: cadence-quadspi: Use proper enum for dma_[un]map_singleNathan Chancellor1-2/+2
Clang warns when one enumerated type is converted implicitly to another. drivers/mtd/spi-nor/cadence-quadspi.c:962:47: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] dma_dst = dma_map_single(nor->dev, buf, len, DMA_DEV_TO_MEM); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~ ./include/linux/dma-mapping.h:428:66: note: expanded from macro 'dma_map_single' ~~~~~~~~~~~~~~~~~~~~ ^ drivers/mtd/spi-nor/cadence-quadspi.c:997:43: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] dma_unmap_single(nor->dev, dma_dst, len, DMA_DEV_TO_MEM); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~ ./include/linux/dma-mapping.h:429:70: note: expanded from macro 'dma_unmap_single' ~~~~~~~~~~~~~~~~~~~~~~ ^ 2 warnings generated. Use the proper enums from dma_data_direction to satisfy Clang. DMA_FROM_DEVICE = DMA_DEV_TO_MEM = 2 Link: https://github.com/ClangBuiltLinux/linux/issues/108 Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: spi-nor: parse SFDP Sector Map Parameter TableTudor Ambarus1-16/+303
Add support for the SFDP (JESD216B) Sector Map Parameter Table. This table is optional, but when available, we parse it to identify the location and size of sectors within the main data array of the flash memory device and to identify which Erase Types are supported by each sector. Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memoriesTudor Ambarus1-42/+557
Based on Cyrille Pitchen's patch https://lkml.org/lkml/2017/3/22/935. This patch is a transitional patch in introducing the support of SFDP SPI memories with non-uniform erase sizes like Spansion s25fs512s. Non-uniform erase maps will be used later when initialized based on the SFDP data. Introduce the memory erase map which splits the memory array into one or many erase regions. Each erase region supports up to 4 erase types, as defined by the JEDEC JESD216B (SFDP) specification. To be backward compatible, the erase map of uniform SPI NOR flash memories is initialized so it contains only one erase region and this erase region supports only one erase command. Hence a single size is used to erase any sector/block of the memory. Besides, since the algorithm used to erase sectors on non-uniform SPI NOR flash memories is quite expensive, when possible, the erase map is tuned to come back to the uniform case. The 'erase with the best command, move forward and repeat' approach was suggested by Cristian Birsan in a brainstorm session, so: Suggested-by: Cristian Birsan <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-08mtd: rawnand: marvell: fix the IRQ handler complete() conditionMiquel Raynal1-1/+1
With the current implementation, the complete() in the IRQ handler is supposed to be called only if the register status has one or the other RDY bit set. Other events might trigger an interrupt as well if enabled, but should not end-up with a complete() call. For this purpose, the code was checking if the other bits were set, in this case complete() was not called. This is wrong as two events might happen in a very tight time-frame and if the NDSR status read reports two bits set (eg. RDY(0) and RDDREQ) at the same time, complete() was not called. This logic would lead to timeouts in marvell_nfc_wait_op() and has been observed on PXA boards (NFCv1) in the Hamming write path. Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: [email protected] Reported-by: Daniel Mack <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Tested-by: Daniel Mack <[email protected]>
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