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2020-06-26mtd: rawnand: fsl_upm: Get rid of the unused fsl_upm_nand.parts fieldBoris Brezillon1-1/+0
fsl_upm_nand.parts is unused, let's get rid of it. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200603134922.1352340-3-boris.brezillon@collabora.com
2020-06-26mtd: rawnand: fsl_upm: Remove unused mtd varBoris Brezillon1-1/+0
The mtd var in fun_wait_rnb() is now unused, let's get rid of it and fix the warning resulting from this unused var. Fixes: 50a487e7719c ("mtd: rawnand: Pass a nand_chip object to chip->dev_ready()") Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200603134922.1352340-2-boris.brezillon@collabora.com
2020-06-26mtd: rawnand: Allocate the interface configurations dynamicallyMiquel Raynal3-32/+59
Instead of manipulating the statically allocated structure and copy timings around, allocate one at identification time and save it in the nand_chip structure once it has been initialized. All NAND chips using the same interface configuration during reset and startup, we define a helper to retrieve a single reset interface configuration object, shared across all NAND chips. We use a second pointer to always have a reference on the currently applied interface configuration, which may either point to the "best interface configuration" or to the "default reset interface configuration". Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-29-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Get rid of the default ONFI timing modeMiquel Raynal1-15/+4
The ->choose_interface() hook is here for manufacturer drivers to provide a better timing interface than the default one, this field is not needed anymore. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-28-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: toshiba: Choose the interface configuration for TH58NVG2S3HBAI4Rickard x Andersson2-0/+41
The Kioxia/Toshiba TH58NVG2S3HBAI4 NAND memory is not ONFI compliant. The timings of the NAND chip memory are quite close to ONFI mode 4 but is breaking that spec. By providing our own set of timings, erase block read speed is increased from 6910 kiB/s to 13490 kiB/s and erase block write speed is increased from 3350 kiB/s to 4410 kiB/s. Tested on IMX6SX which has a NAND controller supporting EDO mode. Signed-off-by: Rickard x Andersson <rickaran@axis.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-27-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: hynix: Implement ->choose_interface_config() for H27UCG8T2ATR-BCMiquel Raynal2-1/+15
This chip supports ONFI SDR timing mode 4, implement the new hook to advertize it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-26-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: toshiba: Implement ->choose_interface_config() for TC58NVG0S3EMiquel Raynal2-2/+21
This chip supports ONFI SDR timing mode 2, implement the new hook to advertize it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-25-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: toshiba: Implement ->choose_interface_config() for TC58TEG5DCLTA00Miquel Raynal1-1/+11
Implement this hook for the tc58teg5dclta00 NAND chip and stop setting ->default_timing_mode. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-24-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Add the ->choose_interface_config() hookMiquel Raynal1-6/+11
This hook can be overloaded by NAND manufacturer drivers to propose alternative timings when not following the main standards. In this case, the manufacturer drivers is responsible for choosing the best interface configuration that fits both the controller and chip capabilities. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-23-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Introduce nand_choose_best_sdr_timings()Miquel Raynal2-36/+61
Extract the logic out of nand_choose_interface_config() to create a public helper that can be reused by manufacturer drivers. Add the possibility to provide a specific set of timings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-22-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: timings: Make onfi_fill_interface_config() a void helperMiquel Raynal3-18/+14
Warn the user if the parameters are wrong but basically it would mean there is a serious issue in the NAND core. So no need to ever check its output, let's make this helper return void. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-21-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: s/data_interface/interface_config/Miquel Raynal21-122/+123
The name/suffix data_interface is a bit misleading in that the field or functions actually represent a configuration that can be applied by the controller/chip. Let's rename all fields/functions/hooks that are worth renaming. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-06-26mtd: rawnand: Hide the chip->data_interface indirectionMiquel Raynal7-28/+34
As a preparation for allocating the data interface structure dynamically (and rename it), let's avoid accessing chip->data_interface directly. Instead, we introduce a helper, nand_get_interface_config(), and use it to retrieve the current data interface configuration out of a nand_chip object. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-19-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: timings: Use default values for tPROG_max and tBERS_maxMiquel Raynal1-12/+19
The ONFI parameter page of a chip might define more fine grained tPROG_max and tBERS_max. When we do not have this information, we default to the highest possible values (they are maxima anyway). There is no point setting these fields at runtime, so explicitly move these defaults to the main ONFI SDR timings structure. This way, we will also be able to return a pointer to mode 0 directly when we will create a default reset configuration. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-18-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: timings: Avoid redefining tR_max and tCCS_minMiquel Raynal1-3/+0
These two values are already hardcoded in the default ONFI timing structure, no need to redefine them here. Plus, we want to be able to reference timing mode 0 easily and reliably, without extra computation, so we get rid of the extra assignations. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-17-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: timings: Add a helper to find the closest ONFI modeMiquel Raynal2-0/+49
Vendors are allowed to provide their own set of timings. In this case, we provide a way to derive the "closest" timing mode so that, if the NAND controller does not support tweaking these parameters, it will be able to configure itself anyway. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-16-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: timings: onfi_fill_data_interface timing mode is unsignedMiquel Raynal2-3/+3
Turn this argument into an unsigned int, as it cannot be signed. This also spares a check. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-15-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: timings: Provide onfi_fill_data_interface() with a data interfaceMiquel Raynal3-4/+7
Right now the core uses onfi_fill_data_interface() to initialize the nand_data_interface object embedded in nand_chip, but we are about to allocate this object dynamically and let manufacturer drivers provide their own interface config. Let's patch the onfi_fill_data_interface() so it can initialize an interface config that's not the one currently attached to the nand_chip. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-14-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: timings: Update onfi_fill_data_interface() kernel docMiquel Raynal1-3/+4
Describe all parameters and drop the legacy [NAND Interface] prefix. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-13-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Rename nand_init_data_interface()Miquel Raynal1-4/+4
This name is a bit misleading, what we do in this helper is trying to find the best SDR timings supported by the controller and the chip. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-12-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Fix nand_setup_data_interface() descriptionMiquel Raynal1-5/+2
This is a copy/paste error and belongs to nand_init_data_interface() description. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-11-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Rename nand_has_setup_data_iface()Miquel Raynal3-5/+5
This is really a NAND controller hook so call it nand_controller_can_setup_data_iface(), which makes much more sense. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-10-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Use the data interface mode entry when relevantMiquel Raynal1-5/+4
The data interface setup does not care about the default timing mode but cares about the actual timing mode at the time of the call of this helper. Use this entry instead and let chip->default_timing_mode only be used at initialization time. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-9-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Compare the actual timing valuesMiquel Raynal1-1/+2
Avoid relying just on the default timing mode to discriminate if the data interface must be restored. This field should only be used at initialization time by legacy chips statically defined. Do a memcmp() instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-8-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Rename the manufacturer structureMiquel Raynal3-18/+18
It is currently called nand_manufacturer but could actually be called nand_manufacturer_desc, like its instances, so that the former name is left unused for now. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-5-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: Create a nand_chip operations structureMiquel Raynal4-17/+17
And move nand_chip hooks there. While moving entries from one structure to the other, adapt the documentation style. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-4-miquel.raynal@bootlin.com
2020-06-26mtd: nand: Drop useless 'depends on' in KconfigMiquel Raynal2-2/+0
Both OneNAND and raw NAND bits can't be compiled if MTD is disabled because of the if/endif logic in drivers/mtd/Kconfig. There is no need for an extra "depends on MTD" in their respective Kconfig files. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529002517.3546-12-miquel.raynal@bootlin.com
2020-06-26mtd: nand: Add an extra level in the Kconfig hierarchyMiquel Raynal1-0/+5
Use an extra level in Kconfig for all NAND related entries. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200529002517.3546-11-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: tango: Convert the driver to exec_op()Boris Brezillon1-46/+79
Let's convert the driver to exec_op() to have one less driver relying on the legacy interface. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200518170912.328988-1-boris.brezillon@collabora.com
2020-06-19spi: Move cadence-quadspi driver to drivers/spi/Ramuthevar Vadivel Murugan3-1431/+0
Now that cadence-quadspi has been converted to use spi-mem framework, move it under drivers/spi/ Update license header to match SPI subsystem style Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-9-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19mtd: spi-nor: Convert cadence-quadspi to use spi-mem frameworkRamuthevar Vadivel Murugan1-285/+191
Move cadence-quadspi driver to use spi-mem framework. This is required to make the driver support for SPI NAND flashes in future. Driver is feature compliant with existing SPI NOR version. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-8-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19mtd: spi-nor: cadence-quadspi: Drop redundant WREN in erase pathVignesh Raghavendra1-5/+0
Drop redundant WREN command in cqspi_erase() as SPI NOR core takes care of sending WREN command before sending erase command. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-7-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19mtd: spi-nor: cadence-quadspi: Handle probe deferral while requesting DMA ↵Vignesh Raghavendra1-5/+13
channel dma_request_chan_by_mask() can throw EPROBE_DEFER if DMA provider is not yet probed. Currently driver just falls back to using PIO mode (which is less efficient) in this case. Instead return probe deferral error as is so that driver will be re probed once DMA provider is available. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-6-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19mtd: spi-nor: cadence-quadspi: Fix error path on failure to acquire reset linesVignesh Raghavendra1-4/+4
Make sure to undo the prior changes done by the driver when exiting due to failure to acquire reset lines. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-5-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19mtd: spi-nor: cadence-quadspi: Don't initialize rx_dma_complete on failureVignesh Raghavendra1-0/+1
If driver fails to acquire DMA channel then don't initialize rx_dma_complete struct as it won't be used. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-4-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19mtd: spi-nor: cadence-quadspi: Provide a way to disable DAC modeVignesh Raghavendra1-1/+4
Currently direct access mode is used on platforms that have AHB window (memory mapped window) larger than flash size. This feature is limited to TI platforms as non TI platforms have < 1MB of AHB window. Therefore introduce a driver quirk to disable DAC mode and set it for non TI compatibles. This is in preparation to move to spi-mem framework where flash geometry cannot be known. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-3-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19mtd: spi-nor: cadence-quadspi: Make driver independent of flash geometryVignesh Raghavendra1-35/+1
Drop configuration of Flash size, erase size and page size configuration. Flash size is needed only if using AHB decoder (BIT 23 of CONFIG_REG) which is not used by the driver. Erase size and page size are needed if IP is configured to send WREN automatically. But since SPI NOR layer takes care of sending WREN, there is no need to configure these fields either. Therefore drop these in preparation to move the driver to spi-mem framework where flash geometry is not visible to controller driver. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-2-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-15mtd: set master partition panic write flagKamal Dasu1-2/+2
Check and set master panic write flag so that low level drivers can use it to take required action to ensure oops data gets written to assigned mtdoops device partition. Fixes: 9f897bfdd89f ("mtd: Add flag to indicate panic_write") Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200615155134.32007-1-kdasu.kdev@gmail.com
2020-06-15nandsim: Fix return code testing of ns_find_operation()Richard Weinberger1-1/+1
ns_find_operation() returns 0 on success. Fixes: 052a7a5374bc ("mtd: rawnand: nandsim: Clean error handling") Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200615113404.25447-1-richard@nod.at
2020-06-15mtd: rawnand: mtk: Convert the driver to exec_op()Boris Brezillon1-45/+71
Let's convert the driver to exec_op() to have one less driver relying on the legacy interface. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200518170321.321697-1-boris.brezillon@collabora.com
2020-06-10Merge tag 'for-linus-5.8-rc1' of ↵Linus Torvalds4-25/+57
git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs Pull UBI update from Richard Weinberger: "This contains a single change for UBI: - Select fastmap anchor PEBs considering wear level rules" * tag 'for-linus-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs: ubi: Select fastmap anchor PEBs considering wear level rules
2020-06-10Merge tag 'mtd/for-5.8' of ↵Linus Torvalds83-2484/+4131
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Richard Weinberger: "MTD core changes: - partition parser: Support MTD names containing one or more colons. - mtdblock: clear cache_state to avoid writing to bad blocks repeatedly. Raw NAND core changes: - Stop using nand_release(), patched all drivers. - Give more information about the ECC weakness when not matching the chip's requirement. - MAINTAINERS updates. - Support emulated SLC mode on MLC NANDs. - Support "constrained" controllers, adapt the core and ONFI/JEDEC table parsing and Micron's code. - Take check_only into account. - Add an invalid ECC mode to discriminate with valid ones. - Return an enum from of_get_nand_ecc_algo(). - Drop OOB_FIRST placement scheme. - Introduce nand_extract_bits(). - Ensure a consistent bitflips numbering. - BCH lib: - Allow easy bit swapping. - Rework a little bit the exported function names. - Fix nand_gpio_waitrdy(). - Propage CS selection to sub operations. - Add a NAND_NO_BBM_QUIRK flag. - Give the possibility to verify a read operation is supported. - Add a helper to check supported operations. - Avoid indirect access to ->data_buf(). - Rename the use_bufpoi variables. - Fix comments about the use of bufpoi. - Rename a NAND chip option. - Reorder the nand_chip->options flags. - Translate obscure bitfields into readable macros. - Timings: - Fix default values. - Add mode information to the timings structure. Raw NAND controller driver changes: - Fixed many error paths. - Arasan - New driver - Au1550nd: - Various cleanups - Migration to ->exec_op() - brcmnand: - Misc cleanup. - Support v2.1-v2.2 controllers. - Remove unused including <linux/version.h>. - Correctly verify erased pages. - Fix Hamming OOB layout. - Cadence - Make cadence_nand_attach_chip static. - Cafe: - Set the NAND_NO_BBM_QUIRK flag - cmx270: - Remove this controller driver. - cs553x: - Misc cleanup - Migration to ->exec_op() - Davinci: - Misc cleanup. - Migration to ->exec_op() - Denali: - Add more delays before latching incoming data - Diskonchip: - Misc cleanup - Migration to ->exec_op() - Fsmc: - Change to non-atomic bit operations. - GPMI: - Use nand_extract_bits() - Fix runtime PM imbalance. - Ingenic: - Migration to exec_op() - Fix the RB gpio active-high property on qi, lb60 - Make qi_lb60_ooblayout_ops static. - Marvell: - Misc cleanup and small fixes - Nandsim: - Fix the error paths, driver wide. - Omap_elm: - Fix runtime PM imbalance. - STM32_FMC2: - Misc cleanups (error cases, comments, timeout valus, cosmetic changes). SPI NOR core changes: - Add, update support and fix few flashes. - Prepare BFPT parsing for JESD216 rev D. - Kernel doc fixes. CFI changes: - Support the absence of protection registers for Intel CFI flashes. - Replace zero-length array with flexible-arrays" * tag 'mtd/for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (208 commits) mtd: clear cache_state to avoid writing to bad blocks repeatedly mtd: parser: cmdline: Support MTD names containing one or more colons mtd: physmap_of_gemini: remove defined but not used symbol 'syscon_match' mtd: rawnand: Add an invalid ECC mode to discriminate with valid ones mtd: rawnand: Return an enum from of_get_nand_ecc_algo() mtd: rawnand: Drop OOB_FIRST placement scheme mtd: rawnand: Avoid a typedef mtd: Fix typo in mtd_ooblayout_set_databytes() description mtd: rawnand: Stop using nand_release() mtd: rawnand: nandsim: Reorganize ns_cleanup_module() mtd: rawnand: nandsim: Rename a label in ns_init_module() mtd: rawnand: nandsim: Manage lists on error in ns_init_module() mtd: rawnand: nandsim: Fix the label pointing on nand_cleanup() mtd: rawnand: nandsim: Free erase_block_wear on error mtd: rawnand: nandsim: Use an additional label when freeing the nandsim object mtd: rawnand: nandsim: Stop using nand_release() mtd: rawnand: nandsim: Free the partition names in ns_free() mtd: rawnand: nandsim: Free the allocated device on error in ns_init() mtd: rawnand: nandsim: Free partition names on error in ns_init() mtd: rawnand: nandsim: Fix the two ns_alloc_device() error paths ...
2020-06-09mm: introduce include/linux/pgtable.hMike Rapoport1-1/+1
The include/linux/pgtable.h is going to be the home of generic page table manipulation functions. Start with moving asm-generic/pgtable.h to include/linux/pgtable.h and make the latter include asm/pgtable.h. Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Cain <bcain@codeaurora.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Zankel <chris@zankel.net> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greentime Hu <green.hu@gmail.com> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Guo Ren <guoren@kernel.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Helge Deller <deller@gmx.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Mark Salter <msalter@redhat.com> Cc: Matthew Wilcox <willy@infradead.org> Cc: Matt Turner <mattst88@gmail.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Michal Simek <monstr@monstr.eu> Cc: Nick Hu <nickhu@andestech.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Richard Weinberger <richard@nod.at> Cc: Rich Felker <dalias@libc.org> Cc: Russell King <linux@armlinux.org.uk> Cc: Stafford Horne <shorne@gmail.com> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Vincent Chen <deanbo422@gmail.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Will Deacon <will@kernel.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: http://lkml.kernel.org/r/20200514170327.31389-3-rppt@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-06-05mtd: clear cache_state to avoid writing to bad blocks repeatedlyXiaoming Ni1-4/+7
The function call process is as follows: mtd_blktrans_work() while (1) do_blktrans_request() mtdblock_writesect() do_cached_write() write_cached_data() /*if cache_state is STATE_DIRTY*/ erase_write() write_cached_data() returns failure without modifying cache_state and cache_offset. So when do_cached_write() is called again, write_cached_data() will be called again to perform erase_write() on the same cache_offset. But if this cache_offset points to a bad block, erase_write() will always return -EIO. Writing to this mtdblk is equivalent to losing the current data, and repeatedly writing to the bad block. Repeatedly writing a bad block has no real benefits, but brings some negative effects: 1 Lost subsequent data 2 Loss of flash device life 3 erase_write() bad blocks are very time-consuming. For example: the function do_erase_oneblock() in chips/cfi_cmdset_0020.c or chips/cfi_cmdset_0002.c may take more than 20 seconds to return Therefore, when erase_write() returns -EIO in write_cached_data(), clear cache_state to avoid writing to bad blocks repeatedly. Signed-off-by: Xiaoming Ni <nixiaoming@huawei.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-06-05mtd: parser: cmdline: Support MTD names containing one or more colonsBoris Brezillon1-3/+20
Looks like some drivers define MTD names with a colon in it, thus making mtdpart= parsing impossible. Let's fix the parser to gracefully handle that case: the last ':' in a partition definition sequence is considered instead of the first one. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Ron Minnich <rminnich@google.com> Tested-by: Ron Minnich <rminnich@google.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-06-05mtd: physmap_of_gemini: remove defined but not used symbol 'syscon_match'Jason Yan1-5/+0
It's not used by anyone now, remove it. Fix the following gcc warning: drivers/mtd/maps/physmap-gemini.c:49:34: warning: ‘syscon_match’ defined but not used [-Wunused-const-variable=] static const struct of_device_id syscon_match[] = { ^~~~~~~~~~~~ Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jason Yan <yanaijie@huawei.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-06-03Merge tag 'cfi/for-5.8' of ↵Richard Weinberger1-5/+8
gitolite.kernel.org:pub/scm/linux/kernel/git/mtd/linux into mtd/next CFI changes: * Support the absence of protection registers for Intel CFI flashes * Replace zero-length array with flexible-arrays
2020-06-02Merge tag 'for-5.8/block-2020-06-01' of git://git.kernel.dk/linux-blockLinus Torvalds1-2/+1
Pull block updates from Jens Axboe: "Core block changes that have been queued up for this release: - Remove dead blk-throttle and blk-wbt code (Guoqing) - Include pid in blktrace note traces (Jan) - Don't spew I/O errors on wouldblock termination (me) - Zone append addition (Johannes, Keith, Damien) - IO accounting improvements (Konstantin, Christoph) - blk-mq hardware map update improvements (Ming) - Scheduler dispatch improvement (Salman) - Inline block encryption support (Satya) - Request map fixes and improvements (Weiping) - blk-iocost tweaks (Tejun) - Fix for timeout failing with error injection (Keith) - Queue re-run fixes (Douglas) - CPU hotplug improvements (Christoph) - Queue entry/exit improvements (Christoph) - Move DMA drain handling to the few drivers that use it (Christoph) - Partition handling cleanups (Christoph)" * tag 'for-5.8/block-2020-06-01' of git://git.kernel.dk/linux-block: (127 commits) block: mark bio_wouldblock_error() bio with BIO_QUIET blk-wbt: rename __wbt_update_limits to wbt_update_limits blk-wbt: remove wbt_update_limits blk-throttle: remove tg_drain_bios blk-throttle: remove blk_throtl_drain null_blk: force complete for timeout request blk-mq: drain I/O when all CPUs in a hctx are offline blk-mq: add blk_mq_all_tag_iter blk-mq: open code __blk_mq_alloc_request in blk_mq_alloc_request_hctx blk-mq: use BLK_MQ_NO_TAG in more places blk-mq: rename BLK_MQ_TAG_FAIL to BLK_MQ_NO_TAG blk-mq: move more request initialization to blk_mq_rq_ctx_init blk-mq: simplify the blk_mq_get_request calling convention blk-mq: remove the bio argument to ->prepare_request nvme: force complete cancelled requests blk-mq: blk-mq: provide forced completion method block: fix a warning when blkdev.h is included for !CONFIG_BLOCK builds block: blk-crypto-fallback: remove redundant initialization of variable err block: reduce part_stat_lock() scope block: use __this_cpu_add() instead of access by smp_processor_id() ...
2020-06-02ubi: Select fastmap anchor PEBs considering wear level rulesArne Edholm4-25/+57
There is a risk that the fastmap anchor PEB is alternating between just two PEBs, the current anchor and the previous anchor that was just deleted. As the fastmap pools gets the first take on free PEBs, the pools may leave no free PEBs to be selected as the new anchor, resulting in the two PEBs alternating behaviour. If the anchor PEBs gets a high erase count the PEBs will not be used by the pools but remain in ubi->free, even more increasing the likelihood they will be used as anchors. Getting stuck using only a couple of PEBs continuously will result in an uneven wear, eventually leading to failure. To fix this: - Choose the fastmap anchor when the most free PEBs are available. This is during rebuilding of the fastmap pools, after the unused pool PEBs are added to ubi->free but before the pools are populated again from the free PEBs. Also reserve an additional second best PEB as a candidate for the next time the fast map anchor is updated. If a better PEB is found the next time the fast map anchor is updated, the candidate is made available for building the pools. - Enable anchor move within the anchor area again as it is useful for distributing wear. - The anchor candidate for the next fastmap update is the most suited free PEB. Check this PEB's erase count during wear leveling. If the wear leveling limit is exceeded, the PEB is considered unsuitable for now. As all other non used anchor area PEBs should be even worse, free up the used anchor area PEB with the lowest erase count. Signed-off-by: Arne Edholm <arne.edholm@axis.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-06-02mm: remove the pgprot argument to __vmallocChristoph Hellwig1-2/+2
The pgprot argument to __vmalloc is always PAGE_KERNEL now, so remove it. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Reviewed-by: Michael Kelley <mikelley@microsoft.com> [hyperv] Acked-by: Gao Xiang <xiang@kernel.org> [erofs] Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Wei Liu <wei.liu@kernel.org> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Christophe Leroy <christophe.leroy@c-s.fr> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: David Airlie <airlied@linux.ie> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Laura Abbott <labbott@redhat.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Minchan Kim <minchan@kernel.org> Cc: Nitin Gupta <ngupta@vflare.org> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Sakari Ailus <sakari.ailus@linux.intel.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Paul Mackerras <paulus@ozlabs.org> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: Will Deacon <will@kernel.org> Link: http://lkml.kernel.org/r/20200414131348.444715-22-hch@lst.de Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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