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2020-03-24mtd: rawnand: Add support for manufacturer specific suspend/resume operationMason Yang1-4/+13
Patch nand_suspend() & nand_resume() to let manufacturers overwrite suspend/resume operations. Signed-off-by: Mason Yang <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-24mtd: spi-nor: Enable locking for n25q512ax3/n25q512aJungseung Lee1-2/+6
n25q512ax3 and n25q512a use the 4 bit Block Protection scheme. Enable locking for both. Tested on n25q512ax3. The other is modified following the datasheet. Signed-off-by: Jungseung Lee <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-24mtd: spi-nor: Add SR 4bit block protection supportJungseung Lee2-18/+58
Currently we are supporting block protection only for flash chips with 3 block protection bits (BP0-2) in the SR register. Enable block protection support for flashes with 4 block protection bits (BP0-3). Add a flash_info flag for flashes that describe 4 block protection bits. Add another flash_info flag for flashes in which BP3 bit is not adjacent to the BP0-2 bits. Tested with a n25q512ax3 (BP0-3) and w25q128 (BP0-2). Signed-off-by: Jungseung Lee <[email protected]> Reviewed-by: Michael Walle <[email protected]> Tested-by: Michael Walle <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-24mtd: spi-nor: Add generic formula for SR block protection handlingJungseung Lee1-31/+41
The current mainline locking was restricted and could only be applied to flashes that have 3 block protection bits and fixed locking ratio. A new method of normalization was reached at the end of the discussion [1]. (1) - if bp slot is insufficient. (2) - if bp slot is sufficient. if (bp_slots_needed > bp_slots) // (1) min_prot_length = sector_size << (bp_slots_needed - bp_slots); else // (2) min_prot_length = sector_size; This patch changes logic to handle block protection based on min_prot_length. It is suitable for the overall flashes with exception of some corner cases (see EON and catalyst) and easy to extend and apply for the case of 2bit or 4bit block protection. [1] http://lists.infradead.org/pipermail/linux-mtd/2020-February/093934.html Signed-off-by: Jungseung Lee <[email protected]> Reviewed-by: Michael Walle <[email protected]> Tested-by: Michael Walle <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-24mtd: spi-nor: Set all BP bits to one when lock_len == mtd->sizeTudor Ambarus1-7/+13
When there are more BP settings than needed for defining the protected areas of the flash memory, most flashes will define the remaining settings as "protect all", i.e. the equivalent of having all the BP bits set to one. But there are flashes where the in-between BP values are undefined (not mentioned), and only the "all bits set" is protecting the entire memory. One such example is w25q80, where BP[2:0]=0b101 and 0b110 are not defined. Set all the BP bits to one when lock_len == mtd->size, to treat this special case. Suggested-by: Michael Walle <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Jungseung Lee <[email protected]> Reviewed-by: Michael Walle <[email protected]>
2020-03-23mtd: spi-nor: controllers: aspeed-smc: Replace zero-length array with ↵Gustavo A. R. Silva1-1/+1
flexible-array member The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-23mtd: spi-nor: Clear WEL bit when erase or program errors occurTudor Ambarus1-0/+22
When an Erase or Program error occurs on a spansion/cypress or a micron flash, the WEL bit remains set to one and should be cleared with a WRDI command in order to protect against inadvertent writes that can possible corrupt the contents of the memory. Winbond, macronix, gd, etc., do not support the E_ERR and P_ERR bits in the Status Register and always clear the WEL bit regardless of the outcome of the erase or page program operation (ex w25q40bw, MX25L25635E). Issue a WRDI command when erase or page program errors occur. Reported-by: John Garry <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Tested-by: John Garry <[email protected]>
2020-03-17mtd: spi-nor: Trim what is exposed in spi-nor.hTudor Ambarus10-42/+288
The SPI NOR controllers drivers must not be able to use structures that are meant just for the SPI NOR core. struct spi_nor_flash_parameter is filled at run-time with info gathered from flash_info, manufacturer and sfdp data. struct spi_nor_flash_parameter should be opaque to the SPI NOR controller drivers, make sure it is. spi_nor_option_flags, spi_nor_read_command, spi_nor_pp_command, spi_nor_read_command_index and spi_nor_pp_command_index are defined for the core use, make sure they are opaque to the SPI NOR controller drivers. Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-17mtd: spi-nor: Drop the MFR definitionsTudor Ambarus1-2/+0
Cross manufacturer code is unlikely and discouraged, get rid of the MFR definitions. Suggested-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Boris Brezillon <[email protected]>
2020-03-17mtd: spi-nor: Get rid of the now empty spi_nor_ids[] tableBoris Brezillon1-25/+0
All entries have been moved to manufacturer drivers. Get rid of this empty table. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-17mtd: spi-nor: Move XMC bits out of core.cBoris Brezillon4-3/+26
Create a SPI NOR manufacturer driver for XMC chips, and move the XMC definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Xilinx bits out of core.cBoris Brezillon4-86/+98
Create a SPI NOR manufacturer driver for Xilinx chips, and move the Xilinx definitions outside of core.c. While at it, remove the SPI_S3AN flag which is now useless. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Catalyst bits out of core.cBoris Brezillon4-7/+32
Create a SPI NOR manufacturer driver for Catalyst chips, and move the Catalyst definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Winbond bits out of core.cBoris Brezillon4-114/+115
Create a SPI NOR manufacturer driver for Winbond chips, and move the Winbond definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move SST bits out of core.cBoris Brezillon4-120/+156
Create a SPI NOR manufacturer driver for SST chips, and move the SST definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Spansion bits out of core.cBoris Brezillon4-58/+98
Create a SPI NOR manufacturer driver for Spansion chips, and move the Spansion definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Micron/ST bits out of core.cBoris Brezillon4-120/+158
Create a SPI NOR manufacturer driver for Micron/ST chips, and move the Micron/ST definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Macronix bits out of core.cBoris Brezillon4-68/+101
Create a SPI NOR manufacturer driver for Macronix chips, and move the Macronix definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Tested-by: Xiang Chen <[email protected]>
2020-03-17mtd: spi-nor: Move ISSI bits out of core.cBoris Brezillon4-65/+86
Create a SPI NOR manufacturer driver for ISSI chips, and move the ISSI definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Intel bits out of core.cBoris Brezillon4-14/+35
Create a SPI NOR manufacturer driver for Intel chips, and move the Intel definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Mika Westerberg <[email protected]>
2020-03-17mtd: spi-nor: Move GigaDevice bits out of core.cBoris Brezillon4-59/+62
Create a SPI NOR manufacturer driver for GigaDevice chips, and move the GigaDevice definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Fujitsu bits out of core.cBoris Brezillon4-3/+23
Create a SPI NOR manufacturer driver for Fujitsu chips, and move the Fujitsu definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Everspin bits out of core.cBoris Brezillon4-6/+30
Create a SPI NOR manufacturer driver for Everspin chips, and move the Everspin definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move ESMT bits out of core.cBoris Brezillon4-5/+28
Create a SPI NOR manufacturer driver for ESMT chips, and move the ESMT definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Eon bits out of core.cBoris Brezillon4-17/+37
Create a SPI NOR manufacturer driver for Eon chips, and move the Eon definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Move Atmel bits out of core.cBoris Brezillon4-29/+53
Create a SPI NOR manufacturer driver for Atmel chips, and move the Atmel definitions outside of core.c. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]>
2020-03-17mtd: spi-nor: Add the concept of SPI NOR manufacturer driverBoris Brezillon2-11/+81
Declare a spi_nor_manufacturer struct and add basic building blocks to move manufacturer specific code outside of the core. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-17mtd: spi-nor: Expose stuctures and functions to manufacturer driversBoris Brezillon2-158/+169
Expose the flash_info struct and some function prototypes that will be used by manufacturers. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-16mtd: spi-nor: Move SFDP logic out of the coreTudor Ambarus5-1297/+1349
It makes the core file a bit smaller and provides better separation between the SFDP parsing and core logic. Keep the core.h and sfdp.h definitions private in drivers/mtd/spi-nor/. Both expose just the definitions that are required by the core and manufacturer drivers. None of the SPI NOR controller drivers should include them. Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-16mtd: spi-nor: Prepare core / manufacturer code splitBoris Brezillon13-81/+86
Move all SPI NOR controller drivers to a controllers/ sub-directory so that we only have SPI NOR related source files under drivers/mtd/spi-nor/. Rename spi-nor.c into core.c, we are about to split this file in multiple source files (one per manufacturer, plus one for the SFDP parsing logic). Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-16mtd: spi-nor: Emphasise which is the generic set_4byte_addr_mode() methodTudor Ambarus1-16/+18
Rename (*set_4byte)() to (*set_4byte_addr_mode)() for a better differentiation between the 4 byte address mode and opcodes. Rename macronix_set_4byte() to spi_nor_set_4byte_addr_mode(), it will be the only 4 byte address mode method exposed to the manufacturer drivers. Here's how the manufacturers enter and exit the 4 byte address mode: - eon, gidadevice, issi, macronix, xmc use EN4B/EX4B - micron-st needs WEN. st_micron_set_4byte_addr_mode() will become a private method, as they are the only ones that need WEN before the EN4B/EX4B commands. - newer spansion have a 4BAM opcode (this translates to a new, public command). Older spansion flashes use the BRWR command (legacy in core.c -> spansion_set_4byte_addr_mode()) - winbond's method is hackish and may be reason for just a flash fixup hook -> private method Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-16mtd: spi-nor: Stop prefixing generic functions with a manufacturer nameBoris Brezillon1-35/+35
Replace the manufacturer prefix by something describing more precisely what those functions do. Signed-off-by: Boris Brezillon <[email protected]> [[email protected]: prepend spi_nor_ to all modified methods.] Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2020-03-13Merge tag 'mtk-mtd-spi-move' into spi-nor/nextTudor Ambarus3-574/+0
spi: Rewrite mtk-quadspi spi-nor driver with spi-mem This patchset from Chuanhong Guo <[email protected]> adds a spi-mem driver for Mediatek SPI-NOR controller, which already has limited support by mtk-quadspi. This new driver can make use of full quadspi capability of this controller. The mtk-quadspi driver is replaced by the new spi-mtk-nor driver. Merge it in spi-nor/next to avoid conflicts during the release cycle.
2020-03-12mtd: spinand: micron: Add new Micron SPI NAND devices with multiple diesShivamurthy Shastri1-0/+58
Add device table for new Micron SPI NAND devices, which have multiple dies. Also, enable support to select the dies. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-12mtd: spinand: micron: Add M70A series Micron SPI NAND devicesShivamurthy Shastri1-0/+22
Add device table for M70A series Micron SPI NAND devices. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-12mtd: spinand: micron: identify SPI NAND device with Continuous Read modeShivamurthy Shastri1-0/+16
Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with the Continuous Read mode. Some of the Micron SPI NAND devices have the "Continuous Read" feature enabled by default, which does not fit the subsystem needs. In this mode, the READ CACHE command doesn't require the starting column address. The device always output the data starting from the first column of the cache register, and once the end of the cache register reached, the data output continues through the next page. With the continuous read mode, it is possible to read out the entire block using a single READ command, and once the end of the block reached, the output pins become High-Z state. However, during this mode the read command doesn't output the OOB area. Hence, we disable the feature at probe time. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-12mtd: spinand: micron: Add new Micron SPI NAND devicesShivamurthy Shastri1-0/+33
Add device table for M79A and M78A series Micron SPI NAND devices. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-12mtd: spinand: micron: Describe the SPI NAND device MT29F2G01ABAGDShivamurthy Shastri1-0/+1
Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage details as a comment. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-12mtd: spinand: micron: Generalize the OOB layout structure and function namesShivamurthy Shastri1-14/+14
In order to add new Micron SPI NAND devices, we generalized the OOB layout structure and function names. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: spi-nor: remove mtk-quadspi driverChuanhong Guo3-574/+0
This driver is superseded by the new spi-mtk-nor driver. Signed-off-by: Chuanhong Guo <[email protected]> Acked-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-03-11mtd: rawnand: brcmnand: Add support for flash-edu for dma transfersKamal Dasu1-6/+287
Legacy mips soc platforms that have controller v5.0 and 6.0 use flash-edu block for dma transfers. This change adds support for nand dma transfers using the EDU block. Signed-off-by: Kamal Dasu <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: reinit completion before executing a new commandPiotr Sroka1-0/+1
Reing the completion object before executing CDMA command to make sure the 'done' flag is OK. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: [email protected] Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: change bad block marker sizePiotr Sroka1-6/+3
Increase bad block marker size from one byte to two bytes. Bad block marker is handled by skip bytes feature of HPNFC. Controller expects this value to be an even number. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: [email protected] Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: fix the calculation of the avaialble OOB sizePiotr Sroka1-1/+2
The value of cdns_chip->sector_count is not known at the moment of the derivation of ecc_size, leading to a zero value. Fix this by assigning ecc_size later in the code. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: [email protected] Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: get meta data size from registersPiotr Sroka1-7/+14
Add checking size of BCH meta data size in capabilities registers instead of using fixed value. BCH meta data is used to keep data from NAND flash OOB area. Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: Macronix: Add support for block protectionMason Yang1-0/+72
Macronix AC/AD series support using SET_FEATURES to change block protection and unprotection. Block protection support can be checked with GET_FEATURES. Signed-off-by: Mason Yang <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: Add support for manufacturer specific lock/unlock operationMason Yang1-2/+34
Add nand_lock() & nand_unlock() for manufacturer specific lock & unlock operation while the device supports Block Portection function. Signed-off-by: Mason Yang <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: ingenic: Add dependency on MIPS || COMPILE_TESTPaul Cercueil1-0/+1
This driver has no arch-specific instructions but is only ever useful on MIPS; so disable this driver if we're not compiling for MIPS, unless the driver is compile-tested. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: stm32_fmc2: Use dma_request_chan() instead ↵Peter Ujfalusi1-7/+37
dma_request_slave_channel() dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. Use using dma_request_chan() directly and inform user of error in case the DMA request failed. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: qcom: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi1-17/+33
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. Use using dma_request_chan() directly to return the real error code. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
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