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2020-07-24mtd: properly check all write ioctls for permissionsGreg Kroah-Hartman1-9/+47
When doing a "write" ioctl call, properly check that we have permissions to do so before copying anything from userspace or anything else so we can "fail fast". This includes also covering the MEMWRITE ioctl which previously missed checking for this. Cc: Miquel Raynal <[email protected]> Cc: Richard Weinberger <[email protected]> Cc: Vignesh Raghavendra <[email protected]> Cc: stable <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]> [rw: Fixed locking issue] Signed-off-by: Richard Weinberger <[email protected]>
2020-07-16treewide: Remove uninitialized_var() usageKees Cook4-5/+5
Using uninitialized_var() is dangerous as it papers over real bugs[1] (or can in the future), and suppresses unrelated compiler warnings (e.g. "unused variable"). If the compiler thinks it is uninitialized, either simply initialize the variable or make compiler changes. In preparation for removing[2] the[3] macro[4], remove all remaining needless uses with the following script: git grep '\buninitialized_var\b' | cut -d: -f1 | sort -u | \ xargs perl -pi -e \ 's/\buninitialized_var\(([^\)]+)\)/\1/g; s:\s*/\* (GCC be quiet|to make compiler happy) \*/$::g;' drivers/video/fbdev/riva/riva_hw.c was manually tweaked to avoid pathological white-space. No outstanding warnings were found building allmodconfig with GCC 9.3.0 for x86_64, i386, arm64, arm, powerpc, powerpc64le, s390x, mips, sparc64, alpha, and m68k. [1] https://lore.kernel.org/lkml/[email protected]/ [2] https://lore.kernel.org/lkml/CA+55aFw+Vbj0i=1TGqCR5vQkCzWJ0QxK6CernOU6eedsudAixw@mail.gmail.com/ [3] https://lore.kernel.org/lkml/CA+55aFwgbgqhbp1fkxvRKEpzyR5J8n1vKT1VZdz9knmPuXhOeg@mail.gmail.com/ [4] https://lore.kernel.org/lkml/CA+55aFz2500WfbKXAx8s67wrm9=yVJu65TpLgN_ybYNv0VEOKA@mail.gmail.com/ Reviewed-by: Leon Romanovsky <[email protected]> # drivers/infiniband and mlx4/mlx5 Acked-by: Jason Gunthorpe <[email protected]> # IB Acked-by: Kalle Valo <[email protected]> # wireless drivers Reviewed-by: Chao Yu <[email protected]> # erofs Signed-off-by: Kees Cook <[email protected]>
2020-07-13mtd: spi-nor: Disable the flash quad mode in spi_nor_restore()Yicong Yang1-0/+2
If the flash's quad mode is enabled, it'll remain in the quad mode when it's removed. If we drive the flash next time in Standard/Dual SPI mode, the QE bit is not cleared and the function of flash's WP# and RESET#/HOLD# have been switched to IO2 and IO3 and are not restored. Disable the Quad mode in spi_nor_restore(), then the flash's QE bit will be cleared when removed. This will make sure the flash always enter the Standard/Dual SPI mode when loaded. Signed-off-by: Yicong Yang <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Pratyush Yadav <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-13mtd: spi-nor: Add capability to disable flash quad modeYicong Yang2-24/+41
Previous we didn't provide a way to disable the flash's quad mode. Which means we cannot do some cleanup works when to remove or poweroff the flash, like what set 4-byte address mode does in spi_nor_restore(). Add the capability to disable the flash quad mode, by introducing an enable flag in the flash parameters quad_enable() hooks and related functions. Signed-off-by: Yicong Yang <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Pratyush Yadav <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-13mtd: spi-nor: spansion: Remove s70fl01gs from flash_infoTakahiro Kuwano1-1/+0
The s70fl01gs is a dual die stack of two s25fl512s die with dedicated chip select pins to each. Tested with the device and confirmed that is working as two s25fl512s devices. The current device ID in the flash_info table matches with s70fs01gs which does not work with current MTD (s70fs01gs does not support RDSR(05h) which is critical for erase/write). Signed-off-by: Takahiro Kuwano <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-13mtd: spi-nor: sfdp: do not make invalid quad enable fatalPratyush Yadav1-1/+2
The Micron MT35XU512ABA flash does not support the quad enable bit. But instead of programming the Quad Enable Require field to 000b ("Device does not have a QE bit"), it is programmed to 111b ("Reserved"). While this is technically incorrect, it is not reason enough to abort BFPT parsing. Instead, continue BFPT parsing and let flashes set it in their fixup hooks. Signed-off-by: Pratyush Yadav <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-07mtd: rawnand: xway: Fix build issueMiquel Raynal1-1/+1
This MIPS driver does not support COMPILE_TEST yet and failed to build under my radar. Replace 'mtd' chich is not defined in the scope of xway_nand_remove() by nand_to_mtd(chip). The mistake has been added in the long series dropping nand_release(). Tested with a 7.3.0 MIPS GCC toolchain built with Buildroot. Fixes: 9fdd78f7bcda ("mtd: rawnand: xway: Stop using nand_release()") Reported-by: kernel test robot <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-07-07mtd: rawnand: stm32_fmc2: get resources from parent nodeChristophe Kerello2-23/+51
FMC2 EBI support has been added. Common resources (registers base address and clock) can now be shared between the 2 drivers using "st,stm32mp1-fmc2-nfc" compatible string. It means that the common resources should now be found in the parent device when EBI node is available. Signed-off-by: Christophe Kerello <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-07-07mtd: rawnand: stm32_fmc2: use regmap APIsChristophe Kerello2-143/+127
This patch uses regmap APIs to access all FMC2 registers. Signed-off-by: Christophe Kerello <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-07-07mtd: rawnand: stm32_fmc2: do not display errors if the driver is deferredChristophe Kerello1-3/+3
A MDMA issue has been solved on Kernel 5.7. The effect of this fix is that the MDMA driver is now deferred and the FMC2 NFC driver is also deferred. All is working fine but there is a FMC2 log in the console: stm32_fmc2_nfc 58002000.nand-controller: failed to request tx DMA channel: -517 This patch removes the display of this log in the console in case of this error is -EPROBE_DEFER. Signed-off-by: Christophe Kerello <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-07-07mtd: rawnand: ingenic: cleanup ARRAY_SIZE() vs sizeof() useDan Carpenter1-2/+2
The ARRAY_SIZE() is the number of elements but we want to use sizeof() here for the number of bytes. Fortunately, they are the same thing because it's an array of u8 so this has no effect on runtime. Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/20200624132640.GC9972@mwanda
2020-07-03mtd: spi-nor: winbond: Add support for w25q64jvmSven Van Asbroeck1-0/+1
This chip is (nearly) identical to the Winbond w25q64 which is already supported by Linux. Compared to the w25q64, the 'jvm' has a different JEDEC ID. Signed-off-by: Sven Van Asbroeck <[email protected]> [[email protected]: Order entry alphabetically, update subject, update Sven's email address] Signed-off-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-07-03mtd: spi-nor: macronix: Add support for MX25R1635FFrieder Schrempf1-0/+3
The MX25R1635F is the smaller sibling of the MX25R3235F that is already supported. It's only half the size (16Mb). It was tested on the Kontron Electronics i.MX8MM SoM (N8010) using raw read and write from and to the mtd device and the 'flash_erase' command. Signed-off-by: Frieder Schrempf <[email protected]> [[email protected]: update subject] Signed-off-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-06-30iov_iter: Move unnecessary inclusion of crypto/hash.hHerbert Xu2-0/+2
The header file linux/uio.h includes crypto/hash.h which pulls in most of the Crypto API. Since linux/uio.h is used throughout the kernel this means that every tiny bit of change to the Crypto API causes the entire kernel to get rebuilt. This patch fixes this by moving it into lib/iov_iter.c instead where it is actually used. This patch also fixes the ifdef to use CRYPTO_HASH instead of just CRYPTO which does not guarantee the existence of ahash. Unfortunately a number of drivers were relying on linux/uio.h to provide access to linux/slab.h. This patch adds inclusions of linux/slab.h as detected by build failures. Also skbuff.h was relying on this to provide a declaration for ahash_request. This patch adds a forward declaration instead. Signed-off-by: Herbert Xu <[email protected]> Signed-off-by: Al Viro <[email protected]>
2020-06-26mtd: spi-nor: intel-spi: Add support for Intel Tiger Lake-H SPI serial flashMika Westerberg1-0/+1
Intel Tiger Lake-H has the same SPI serial flash controller as Cannon Lake. Add Tiger Lake-H PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-06-26mtd: spi-nor: intel-spi: Add support for Intel Emmitsburg SPI serial flashMika Westerberg1-0/+1
Intel Emmitsburg has the same SPI serial flash controller as Lewisburg. Add Emmitsburg PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-06-26mtd: parsers: bcm63xx: simplify CFE detectionÁlvaro Fernández Rojas1-20/+12
Instead of trying to parse CFE version string, which is customized by some vendors, let's just check that "CFE1" was passed on argument 3. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Signed-off-by: Jonas Gorski <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: brcmnand: ECC error handling on EDU transfersKamal Dasu1-0/+26
Implement ECC correctable and uncorrectable error handling for EDU reads. If ECC correctable bitflips are encountered on EDU transfer, read page again using PIO. This is needed due to a NAND controller limitation where corrected data is not transferred to the DMA buffer on ECC error. This applies to ECC correctable errors that are reported by the controller hardware based on set number of bitflips threshold in the controller threshold register, bitflips below the threshold are corrected silently and are not reported by the controller hardware. Fixes: a5d53ad26a8b ("mtd: rawnand: brcmnand: Add support for flash-edu for dma transfers") Signed-off-by: Kamal Dasu <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: brcmnand: Don't default to edu transferKamal Dasu1-2/+3
When flash-dma is absent do not default to using flash-edu. Make sure flash-edu is enabled before setting EDU transfer function. Fixes: a5d53ad26a8b ("mtd: rawnand: brcmnand: Add support for flash-edu for dma transfers") Signed-off-by: Kamal Dasu <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: qcom: set BAM mode only if not set alreadySivaprakash Murugesan1-1/+10
BAM is DMA controller on QCOM ipq platforms, BAM mode on NAND driver is set by writing BAM_MODE_EN bit on NAND_CTRL register. NAND_CTRL is an operational register and in BAM mode operational registers are read only. So, before enabling BAM mode by writing the NAND_CTRL register, check if BAM mode was already enabled by the bootloader, and enable BAM mode only if it is not enabled already. Signed-off-by: Sivaprakash Murugesan <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: qcom: avoid write to unavailable registerSivaprakash Murugesan1-1/+6
SFLASHC_BURST_CFG is only available on older ipq NAND platforms, this register has been removed when the NAND controller got implemented in the qpic controller. Avoid writing this register on devices which are based on qpic NAND controller. Fixes: dce84760b09f ("mtd: nand: qcom: Support for IPQ8074 QPIC NAND controller") Cc: [email protected] Signed-off-by: Sivaprakash Murugesan <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: trivial spellingKieran Bingham2-2/+2
The word 'descriptor' is misspelled throughout the tree. Fix it up accordingly: decriptors -> descriptors Signed-off-by: Kieran Bingham <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: gpio: Get rid of the legacy interface implementationBoris Brezillon1-35/+0
Now that exec_op() is implemented, we can get rid of the legacy interface implementation. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: gpio: Implement exec_op()Boris Brezillon1-3/+101
Implement exec_op() so we can get rid of the legacy interface implementation. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: gpio: Inherit from nand_controllerBoris Brezillon1-0/+3
Inherit from nand_controller so we don't rely on the nand_chip.legacy.dummy_controller field. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Get rid of the legacy interface implementationBoris Brezillon1-133/+0
Now that the driver implements exec_op(), we can get rid of the legacy interface implementation. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Implement exec_op()Boris Brezillon1-0/+86
Implement exec_op() so we can get rid of the legacy interface implementation. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Inherit from nand_controllerBoris Brezillon1-0/+3
Explicitly inherit from nand_controller instead of relying on the nand_chip.legacy.dummy_controller field. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Use gpio descriptorsBoris Brezillon1-34/+10
The integer-based GPIO ids are now deprecated in favor of the GPIO desc API. The PPC platforms have already been converted to GPIOLIB, so let's use gpio descs in the NAND driver too. While at it, we use devm_gpiod_get_index_optional() so we can get rid of the manual gpio desc release done in the init error path and in the remove function. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Use platform_get_resource() + devm_ioremap_resource()Boris Brezillon1-16/+7
Replace the of_address_to_resource() + devm_ioremap() calls by platform_get_resource() + devm_ioremap_resource() ones which allows us to get rid of one error message since devm_ioremap_resource() already takes care of that. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Use devm_kasprintf() to allocate the MTD nameBoris Brezillon1-5/+3
This simplifies the init() error path and the remove() handler. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Allocate the fsl_upm_nand object using devm_kzalloc()Boris Brezillon1-12/+6
This simplifies the init error path and remove function. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Get rid of the unused fsl_upm_nand.parts fieldBoris Brezillon1-1/+0
fsl_upm_nand.parts is unused, let's get rid of it. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: fsl_upm: Remove unused mtd varBoris Brezillon1-1/+0
The mtd var in fun_wait_rnb() is now unused, let's get rid of it and fix the warning resulting from this unused var. Fixes: 50a487e7719c ("mtd: rawnand: Pass a nand_chip object to chip->dev_ready()") Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: Allocate the interface configurations dynamicallyMiquel Raynal3-32/+59
Instead of manipulating the statically allocated structure and copy timings around, allocate one at identification time and save it in the nand_chip structure once it has been initialized. All NAND chips using the same interface configuration during reset and startup, we define a helper to retrieve a single reset interface configuration object, shared across all NAND chips. We use a second pointer to always have a reference on the currently applied interface configuration, which may either point to the "best interface configuration" or to the "default reset interface configuration". Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: Get rid of the default ONFI timing modeMiquel Raynal1-15/+4
The ->choose_interface() hook is here for manufacturer drivers to provide a better timing interface than the default one, this field is not needed anymore. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: toshiba: Choose the interface configuration for TH58NVG2S3HBAI4Rickard x Andersson2-0/+41
The Kioxia/Toshiba TH58NVG2S3HBAI4 NAND memory is not ONFI compliant. The timings of the NAND chip memory are quite close to ONFI mode 4 but is breaking that spec. By providing our own set of timings, erase block read speed is increased from 6910 kiB/s to 13490 kiB/s and erase block write speed is increased from 3350 kiB/s to 4410 kiB/s. Tested on IMX6SX which has a NAND controller supporting EDO mode. Signed-off-by: Rickard x Andersson <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: hynix: Implement ->choose_interface_config() for H27UCG8T2ATR-BCMiquel Raynal2-1/+15
This chip supports ONFI SDR timing mode 4, implement the new hook to advertize it. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: toshiba: Implement ->choose_interface_config() for TC58NVG0S3EMiquel Raynal2-2/+21
This chip supports ONFI SDR timing mode 2, implement the new hook to advertize it. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: toshiba: Implement ->choose_interface_config() for TC58TEG5DCLTA00Miquel Raynal1-1/+11
Implement this hook for the tc58teg5dclta00 NAND chip and stop setting ->default_timing_mode. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: Add the ->choose_interface_config() hookMiquel Raynal1-6/+11
This hook can be overloaded by NAND manufacturer drivers to propose alternative timings when not following the main standards. In this case, the manufacturer drivers is responsible for choosing the best interface configuration that fits both the controller and chip capabilities. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: Introduce nand_choose_best_sdr_timings()Miquel Raynal2-36/+61
Extract the logic out of nand_choose_interface_config() to create a public helper that can be reused by manufacturer drivers. Add the possibility to provide a specific set of timings. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: timings: Make onfi_fill_interface_config() a void helperMiquel Raynal3-18/+14
Warn the user if the parameters are wrong but basically it would mean there is a serious issue in the NAND core. So no need to ever check its output, let's make this helper return void. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: s/data_interface/interface_config/Miquel Raynal21-122/+123
The name/suffix data_interface is a bit misleading in that the field or functions actually represent a configuration that can be applied by the controller/chip. Let's rename all fields/functions/hooks that are worth renaming. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2020-06-26mtd: rawnand: Hide the chip->data_interface indirectionMiquel Raynal7-28/+34
As a preparation for allocating the data interface structure dynamically (and rename it), let's avoid accessing chip->data_interface directly. Instead, we introduce a helper, nand_get_interface_config(), and use it to retrieve the current data interface configuration out of a nand_chip object. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: timings: Use default values for tPROG_max and tBERS_maxMiquel Raynal1-12/+19
The ONFI parameter page of a chip might define more fine grained tPROG_max and tBERS_max. When we do not have this information, we default to the highest possible values (they are maxima anyway). There is no point setting these fields at runtime, so explicitly move these defaults to the main ONFI SDR timings structure. This way, we will also be able to return a pointer to mode 0 directly when we will create a default reset configuration. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: timings: Avoid redefining tR_max and tCCS_minMiquel Raynal1-3/+0
These two values are already hardcoded in the default ONFI timing structure, no need to redefine them here. Plus, we want to be able to reference timing mode 0 easily and reliably, without extra computation, so we get rid of the extra assignations. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: timings: Add a helper to find the closest ONFI modeMiquel Raynal2-0/+49
Vendors are allowed to provide their own set of timings. In this case, we provide a way to derive the "closest" timing mode so that, if the NAND controller does not support tweaking these parameters, it will be able to configure itself anyway. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: timings: onfi_fill_data_interface timing mode is unsignedMiquel Raynal2-3/+3
Turn this argument into an unsigned int, as it cannot be signed. This also spares a check. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-06-26mtd: rawnand: timings: Provide onfi_fill_data_interface() with a data interfaceMiquel Raynal3-4/+7
Right now the core uses onfi_fill_data_interface() to initialize the nand_data_interface object embedded in nand_chip, but we are about to allocate this object dynamically and let manufacturer drivers provide their own interface config. Let's patch the onfi_fill_data_interface() so it can initialize an interface config that's not the one currently attached to the nand_chip. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
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