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2019-04-08drivers: Remove explicit invocations of mmiowb()Will Deacon2-3/+0
mmiowb() is now implied by spin_unlock() on architectures that require it, so there is no reason to call it from driver code. This patch was generated using coccinelle: @mmiowb@ @@ - mmiowb(); and invoked as: $ for d in drivers include/linux/qed sound; do \ spatch --include-headers --sp-file mmiowb.cocci --dir $d --in-place; done NOTE: mmiowb() has only ever guaranteed ordering in conjunction with spin_unlock(). However, pairing each mmiowb() removal in this patch with the corresponding call to spin_unlock() is not at all trivial, so there is a small chance that this change may regress any drivers incorrectly relying on mmiowb() to order MMIO writes between CPUs using lock-free synchronisation. If you've ended up bisecting to this commit, you can reintroduce the mmiowb() calls using wmb() instead, which should restore the old behaviour on all architectures other than some esoteric ia64 systems. Acked-by: Linus Torvalds <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-04-08mtd: rawnand: Get rid of chip->ecc_{strength,step}_dsBoris Brezillon14-77/+81
nand_device embeds a nand_ecc_req object which contains the minimum strength and step-size required by the NAND device. Drop the chip->ecc_{strength,step}_ds fields and use chip->base.eccreq.{strength,step_size} instead. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: Get rid of chip->numchipsBoris Brezillon8-25/+17
The same information is provided by nanddev_ntargets(). Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: Get rid of chip->chipsizeBoris Brezillon12-34/+38
The target size can now be returned by nanddev_get_targetsize(). Get rid of the chip->chipsize field and use this helper instead. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: Get rid of chip->bits_per_cellBoris Brezillon5-8/+2
Now that we inherit from nand_device, we can use nand_device->memorg.bits_per_cell instead of having our own field at the nand_chip level. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: Use nanddev_mtd_max_bad_blocks()Boris Brezillon2-40/+1
nanddev_mtd_max_bad_blocks() is implemented by the generic NAND layer and is already doing what we need. Reuse this function instead of having our own implementation. While at it, get rid of the ->max_bb_per_die and ->blocks_per_die fields which are now unused. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: Move all page cache related fields to a sub-structBoris Brezillon1-14/+14
Looking at the field names it's hard to tell what ->data_buf, ->pagebuf and ->pagebuf_bitflips are for. Clarify that by moving those fields in a sub-struct named pagecache. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: Provide a helper to get chip->data_bufBoris Brezillon7-49/+35
We plan to move cache related fields to a pagecache struct in nand_chip but some drivers access ->pagebuf directly to invalidate the cache before they start using ->data_buf. Let's provide an helper that returns a pointer to ->data_buf after invalidating the cache. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: Initialize the nand_device objectBoris Brezillon2-7/+59
In order to use some of the nanddev_xxx() helpers, we need to initialize the nand_device object embedded in nand_chip using nanddev_init(). This requires implementing nand_ops. We also drop useless mtd->xxx initialization when they're already taken case of by nanddev_init(). Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: Fill memorg during detectionBoris Brezillon11-44/+175
If we want to use the generic NAND layer, we need to have the memorg struct appropriately filled. Patch the detection code to fill this struct. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: spinand: Implement mtd->_max_bad_blocksBoris Brezillon1-0/+1
We just have to use nanddev_mtd_max_bad_blocks(). Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: nand: Add max_bad_eraseblocks_per_lun info to memorgBoris Brezillon6-15/+49
NAND datasheets usually give the maximum number of bad blocks per LUN and this number can be used to help upper layers decide how much blocks they should reserve for bad block handling. Add a max_bad_eraseblocks_per_lun to the nand_memory_organization struct and update the NAND_MEMORG() macro (and its users) accordingly. We also provide a default mtd->_max_bad_blocks() implementation. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2019-04-08mtd: rawnand: meson: set oob layout opsLiang Yang1-0/+2
Specify the oob layout operation to avoid no oob scheme defined for some nand flash. Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") Signed-off-by: Liang Yang <[email protected]> Tested-by: Martin Blumenstingl <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: vf610: Avoid a potential NULL pointer dereferenceAditya Pakki1-0/+3
of_match_device can return NULL if there is no matching device. Avoid a potential NULL pointer dereference by checking for the return value and passing the error upstream. Signed-off-by: Aditya Pakki <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: ingenic: Move BBTs out of ECC areaPaul Cercueil1-0/+7
The generic layout for BBT markers will most likely overlap with our ECC bytes in the OOB, so move the BBT markers outside the OOB area. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: ingenic: Add ooblayout for the Qi Ben NanonotePaul Cercueil1-1/+40
The Ben Nanonote from Qi Hardware expects a specific OOB layout on its NAND. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: ingenic: Add support for the JZ4725BPaul Cercueil4-1/+353
The boot ROM of the JZ4725B SoC expects a specific OOB layout on the NAND, so we use it unconditionally in the ingenic-nand driver. Also add the jz4725b-bch driver to support the JZ4725B-specific BCH hardware. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: ingenic: Add support for the JZ4740Paul Cercueil4-11/+245
Add support for probing the ingenic-nand driver on the JZ4740 SoC from Ingenic, and the jz4740-ecc driver to support the JZ4740-specific ECC hardware. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: ingenic: Make use of ecc-engine propertyPaul Cercueil1-3/+10
Use the 'ecc-engine' standard property instead of the custom 'ingenic,bch-controller' custom property, which is now deprecated. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-04-08mtd: rawnand: ingenic: Separate top-level and SoC specific codePaul Cercueil7-203/+310
The ingenic-nand driver uses an API provided by the jz4780-bch driver. This makes it difficult to support other SoCs in the jz4780-bch driver. To work around this, we separate the API functions from the SoC-specific code, so that these API functions are SoC-agnostic. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: ingenic: Rename jz4780_bch_init to jz4780_bch_resetPaul Cercueil1-4/+5
The jz4780_bch_init name was confusing, as it suggested that its content should be executed once at init time, whereas what the function really does is reset the hardware for a new ECC operation. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: ingenic: Rename jz4780_nand driver to ingenic_nandPaul Cercueil2-74/+74
The jz4780_nand driver will be modified to handle all the Ingenic JZ47xx SoCs that the upstream Linux kernel supports (JZ4740, JZ4725B, JZ4770, JZ4780), so it makes sense to rename it. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: ingenic: Use SPDX license notifiersPaul Cercueil3-12/+3
Use SPDX license notifiers instead of GPLv2 license text in the headers. Signed-off-by: Paul Cercueil <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: Move drivers for Ingenic SoCs to subfolderPaul Cercueil8-15/+17
Before adding support for more SoCs and seeing the number of files for these drivers grow, we move them to their own subfolder to keep it tidy. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: meson: fix a potential memory leak in meson_nfc_read_bufMartin Blumenstingl1-1/+3
meson_nfc_dma_buffer_setup() is called with the "info" buffer which is allocated a few lines before using kzalloc(). If meson_nfc_dma_buffer_setup() fails we need to free the allocated "info" buffer instead of only freeing it upon success. Fixes: 8fae856c53500a ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Liang Yang <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: meson: add missing ENOMEM check in meson_nfc_read_buf()Martin Blumenstingl1-0/+3
kzalloc() can return NULL if memory could not be allocated. Check the return value of the kzalloc() call in meson_nfc_read_buf() to make it consistent with other memory allocations within the meson_nand driver. Fixes: 8fae856c53500a ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Liang Yang <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: atmel: switch to SPDX license identifiersTudor Ambarus3-13/+3
Adopt the SPDX license identifiers to ease license compliance management. Signed-off-by: Tudor Ambarus <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: atmel: add sam9x60 nand controller supportTudor Ambarus1-12/+74
The sam9x60 board defines the CCFG_EBICSA register under SFR, and not as a MATRIX register, as previous boards do. NAND Flash I/Os are connected to D16–D23, thus SFR_CCFG_EBICSA.NFD0_ON_D16 is set to 1. Signed-off-by: Tudor Ambarus <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: atmel: add generic name for EBICSA regmapTudor Ambarus1-11/+17
The sam9x60 board defines the CCFG_EBICSA register under SFR, and not as a MATRIX register, as previous boards do. Add a more generic name for the EBICSA regmap, as a prerequisite for sam9x60 nand controller support. Signed-off-by: Tudor Ambarus <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: Mark expected switch fall-throughsGustavo A. R. Silva4-3/+11
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. This patch fixes the following warning: drivers/mtd/nand/raw/diskonchip.c: In function ‘doc_probe’: ./include/linux/printk.h:303:2: warning: this statement may fall through [-Wimplicit-fallthrough=] printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mtd/nand/raw/diskonchip.c:1479:4: note: in expansion of macro ‘pr_err’ pr_err("DiskOnChip Millennium Plus 32MB is not supported, ignoring.\n"); ^~~~~~ drivers/mtd/nand/raw/diskonchip.c:1480:3: note: here default: ^~~~~~~ drivers/mtd/nand/raw/nandsim.c: In function ‘ns_init_module’: drivers/mtd/nand/raw/nandsim.c:2254:22: warning: this statement may fall through [-Wimplicit-fallthrough=] chip->bbt_options |= NAND_BBT_NO_OOB; drivers/mtd/nand/raw/nandsim.c:2255:2: note: here case 1: ^~~~ drivers/mtd/nand/raw/nuc900_nand.c: In function ‘nuc900_nand_command_lp’: ./arch/x86/include/asm/io.h:91:22: warning: this statement may fall through [-Wimplicit-fallthrough=] #define __raw_writel __writel drivers/mtd/nand/raw/nuc900_nand.c:52:2: note: in expansion of macro ‘__raw_writel’ __raw_writel((val), (dev)->reg + REG_SMCMD) ^~~~~~~~~~~~ drivers/mtd/nand/raw/nuc900_nand.c:196:3: note: in expansion of macro ‘write_cmd_reg’ write_cmd_reg(nand, NAND_CMD_READSTART); ^~~~~~~~~~~~~ drivers/mtd/nand/raw/nuc900_nand.c:197:2: note: here default: ^~~~~~~ drivers/mtd/nand/raw/omap_elm.c: In function ‘elm_context_restore’: drivers/mtd/nand/raw/omap_elm.c:512:4: warning: this statement may fall through [-Wimplicit-fallthrough=] elm_write_reg(info, ELM_SYNDROME_FRAGMENT_4 + offset, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ regs->elm_syndrome_fragment_4[i]); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mtd/nand/raw/omap_elm.c:514:3: note: here case BCH8_ECC: ^~~~ drivers/mtd/nand/raw/omap_elm.c:517:4: warning: this statement may fall through [-Wimplicit-fallthrough=] elm_write_reg(info, ELM_SYNDROME_FRAGMENT_2 + offset, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ regs->elm_syndrome_fragment_2[i]); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mtd/nand/raw/omap_elm.c:519:3: note: here case BCH4_ECC: ^~~~ drivers/mtd/nand/raw/omap_elm.c: In function ‘elm_context_save’: drivers/mtd/nand/raw/omap_elm.c:466:37: warning: this statement may fall through [-Wimplicit-fallthrough=] regs->elm_syndrome_fragment_4[i] = elm_read_reg(info, ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ ELM_SYNDROME_FRAGMENT_4 + offset); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mtd/nand/raw/omap_elm.c:468:3: note: here case BCH8_ECC: ^~~~ drivers/mtd/nand/raw/omap_elm.c:471:37: warning: this statement may fall through [-Wimplicit-fallthrough=] regs->elm_syndrome_fragment_2[i] = elm_read_reg(info, ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ ELM_SYNDROME_FRAGMENT_2 + offset); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mtd/nand/raw/omap_elm.c:473:3: note: here case BCH4_ECC: ^~~~ Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enabling -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: rawnand: gpmi: Introduce GPMI_IS_MXS() macroFabio Estevam3-5/+4
Introduce a GPMI_IS_MXS() macro to take into account the cases when mx23 or mx28 are used, which helps readability. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-03-21mtd: spinand: Use the spi-mem dirmap APIBoris Brezillon1-84/+84
Make use of the spi-mem direct mapping API to let advanced controllers optimize read/write operations when they support direct mapping. Signed-off-by: Boris Brezillon <[email protected]> Cc: Stefan Roese <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Tested-by: Stefan Roese <[email protected]>
2019-03-04Merge tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtdLinus Torvalds22-553/+4243
Pull MTD updates from Boris Brezillon: "Core MTD changes: - Use struct_size() where appropriate - mtd_{read,write}() as wrappers around mtd_{read,write}_oob() - Fix misuse of PTR_ERR() in docg3 - Coding style improvements in mtdcore.c SPI NOR changes: Core changes: - Add support of octal mode I/O transfer - Add a bunch of SPI NOR entries to the flash_info table SPI NOR controller driver changes: - cadence-quadspi: * Add support for Octal SPI controller * write upto 8-bytes data in STIG mode - mtk-quadspi: * rename config to a common one * add SNOR_HWCAPS_READ to spi_nor_hwcaps mask - Add Tudor as SPI-NOR co-maintainer NAND changes: NAND core changes: - Fourth batch of fixes/cleanup to the raw NAND core impacting various controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2). - Check the return code of nand_reset() and nand_readid_op(). - Remove ->legacy.erase and single_erase(). - Simplify the locking. - Several implicit fall through annotations. Raw NAND controllers drivers changes: - Fix various possible object reference leaks (MTK, JZ4780, Atmel) - ST: * Add support for STM32 FMC2 NAND flash controller - Meson: * Add support for Amlogic NAND flash controller - Denali: * Several cleanup patches - Sunxi: * Several cleanup patches - FSMC: * Disable NAND on remove() * Reset NAND timings on resume() SPI-NAND drivers changes: - Toshiba: * Add support for all Toshiba products. - Macronix: * Fix ECC status read. - Gigadevice: * Add support for GD5F1GQ4UExxG" * tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtd: (64 commits) mtd: spi-nor: Fix wrong abbreviation HWCPAS mtd: spi-nor: cadence-quadspi: fix spelling mistake: "Couldnt't" -> "Couldn't" mtd: spi-nor: Add support for en25qh64 mtd: spi-nor: Add support for MX25V8035F mtd: spi-nor: Add support for EN25Q80A mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller dt-bindings: cadence-quadspi: Add new compatible for AM654 SoC mtd: spi-nor: split s25fl128s into s25fl128s0 and s25fl128s1 mtd: spi-nor: cadence-quadspi: write upto 8-bytes data in STIG mode mtd: spi-nor: Add support for mx25u3235f mtd: rawnand: denali_dt: remove single anonymous clock support mtd: rawnand: mtk: fix possible object reference leak mtd: rawnand: jz4780: fix possible object reference leak mtd: rawnand: atmel: fix possible object reference leak mtd: rawnand: fsmc: Disable NAND on remove() mtd: rawnand: fsmc: Reset NAND timings on resume() mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxG mtd: rawnand: denali: remove unused dma_addr field from denali_nand_info mtd: rawnand: denali: remove unused function argument 'raw' mtd: rawnand: denali: remove unneeded denali_reset_irq() call ...
2019-02-07mtd: rawnand: denali_dt: remove single anonymous clock supportMasahiro Yamada1-23/+4
Commit 6f1fe97bec34 ("mtd: rawnand: denali_dt: add more clocks based on IP datasheet") introduced a more correct binding that requires three named clocks. Now that all upstream DT files migrated over to it, remove the single anonymous clock support. Signed-off-by: Masahiro Yamada <[email protected]> Tested-by: Dinh Nguyen <[email protected]> Acked-by: Dinh Nguyen <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-07mtd: rawnand: mtk: fix possible object reference leakWen Yang1-2/+6
of_find_device_by_node() takes a reference to the struct device when it finds a match via get_device, there is no need to call get_device() twice. We also should make sure to drop the reference to the device taken by of_find_device_by_node() on driver unbind. Fixes: 1d6b1e464950 ("mtd: mediatek: driver for MTK Smart Device") Signed-off-by: Wen Yang <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-07mtd: rawnand: jz4780: fix possible object reference leakWen Yang1-3/+6
of_find_device_by_node() takes a reference to the struct device when it finds a match via get_device, there is no need to call get_device() twice. We also should make sure to drop the reference to the device taken by of_find_device_by_node() on driver unbind. Fixes: ae02ab00aa3c ("mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs") Signed-off-by: Wen Yang <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-07mtd: rawnand: atmel: fix possible object reference leakWen Yang1-6/+15
of_find_device_by_node() takes a reference to the struct device when it finds a match via get_device, there is no need to call get_device() twice. We also should make sure to drop the reference to the device taken by of_find_device_by_node() on driver unbind. Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver") Signed-off-by: Wen Yang <[email protected]> Suggested-by: Boris Brezillon <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Acked-by: Miquel Raynal <[email protected]> Cc: Tudor Ambarus <[email protected]> Cc: Boris Brezillon <[email protected]> Cc: Miquel Raynal <[email protected]> Cc: Richard Weinberger <[email protected]> Cc: David Woodhouse <[email protected]> Cc: Brian Norris <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Nicolas Ferre <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Ludovic Desroches <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Miquel Raynal <[email protected]>
2019-02-06mtd: rawnand: gpmi: fix MX28 bus master lockup problemMartin Kepplinger1-7/+6
Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft reset may cause bus master lock up") for MX28 too. It has the same problem. Observed problem: once per 100,000+ MX28 reboots NAND read failed on DMA timeout errors: [ 1.770823] UBI: attaching mtd3 to ubi0 [ 2.768088] gpmi_nand: DMA timeout, last DMA :1 [ 3.958087] gpmi_nand: BCH timeout, last DMA :1 [ 4.156033] gpmi_nand: Error in ECC-based read: -110 [ 4.161136] UBI warning: ubi_io_read: error -110 while reading 64 bytes from PEB 0:0, read only 0 bytes, retry [ 4.171283] step 1 error [ 4.173846] gpmi_nand: Chip: 0, Error -1 Without BCH soft reset we successfully executed 1,000,000 MX28 reboots. I have a quote from NXP regarding this problem, from July 18th 2016: "As the i.MX23 and i.MX28 are of the same generation, they share many characteristics. Unfortunately, also the erratas may be shared. In case of the documented erratas and the workarounds, you can also apply the workaround solution of one device on the other one. This have been reported, but I’m afraid that there are not an estimated date for updating the Errata documents. Please accept our apologies for any inconveniences this may cause." Fixes: 6f2a6a52560a ("mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems") Cc: [email protected] Signed-off-by: Manfred Schlaegl <[email protected]> Signed-off-by: Martin Kepplinger <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Acked-by: Han Xu <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2019-02-05mtd: rawnand: fsmc: Disable NAND on remove()Linus Walleij1-0/+15
This disables the NAND on remove() and the errorpath, making sure the chipselect gets deasserted when the NAND is not in use. Cc: Miquel Raynal <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: fsmc: Reset NAND timings on resume()Linus Walleij1-0/+1
When we go through a suspend/resume cycle the NAND timings and other settings may have been lost so reset the chip to bring it up in a known working state. The FSMC only supports single CS chips so we only need to call nand_reset(chip, 0). Cc: Miquel Raynal <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxGStefan Roese1-0/+83
Add support for GigaDevice GD5F1GQ4UExxG SPI NAND chip. Signed-off-by: Stefan Roese <[email protected]> Cc: Chuanhong Guo <[email protected]> Cc: Frieder Schrempf <[email protected]> Cc: Miquel Raynal <[email protected]> Cc: Boris Brezillon <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: denali: remove unused dma_addr field from denali_nand_infoMasahiro Yamada1-1/+0
This is a leftover of commit 997cde2a2220 ("mtd: nand: denali: skip driver internal bounce buffer when possible"). Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: denali: remove unused function argument 'raw'Masahiro Yamada1-9/+9
This argument is not used at all. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: denali: remove unneeded denali_reset_irq() callMasahiro Yamada1-3/+0
This code was added by commit 26d266e10e5e ("mtd: nand: denali: fix raw and oob accessors for syndrome page layout"), but I do not see sensible reason. The IRQ flags are correctly reset by denali_cmd_ctrl(), so this code is unneeded. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: check return code of nand_reset() and nand_readid_op()Masahiro Yamada1-4/+10
nand_scan_ident() iterates over maxchips to find as many homogeneous chips as possible. Since commit 2d472aba15ff ("mtd: nand: document the NAND controller/NAND chip DT representation"), new drivers should pass in the exact number of CS lines instead of possible max, but old platforms may still rely on nand_scan_ident() to detect the actual number of connected CS lines. In that case, this loop bails out when manufacturer or device ID unmatches. The reason of unmatch is most likely no chip is connected to that CS line. If so, nand_reset() should already have failed, and the following nand_readid_op() is pointless. Before ->exec_op hook was introduced, drivers had no way to tell the failure of NAND_CMD_RESET to the framework because the legacy ->cmdfunc() has void return type. Now drivers implementing ->exec_op hook can return the error code. You can save nand_readid_op() by checking the return value of nand_reset(). The return value of nand_readid_op() should be checked as well. If it fails, probably id[0] and id[1] are undefined values. Just for consistency, it should be sensible to check the return code in nand_do_write_oob() as well. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: remove ->legacy.erase and single_erase()Masahiro Yamada1-27/+4
Now that the last user of this hook, denali.c, stopped using it, we can remove the erase hook from nand_legacy. I squashed single_erase() because only the difference between single_erase() and nand_erase_op() is the number of bit shifts. The status/ret conversion in nand_erase_nand() is unneeded since commit eb94555e9e97 ("mtd: nand: use usual return values for the ->erase() hook"). Cleaned it up now. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: denali: remove ->erase hookMasahiro Yamada1-21/+0
Commit f9ebd1bb4103 ("mtd: rawnand: Deprecate ->erase()") discouraged the use of this hook, so I am happy to follow the suggestion. Although the Denali IP provides a special MAP10 command for erasing, using it would not buy us much. The Denali IP actually works with the generic erasing by single_erase() + ->cmdfunc hook (nand_command_lp) + ->cmd_ctrl hook (denali_cmd_ctrl). This method is also deprecated, but denali_erase() can go away irrespective of ->exec_op conversion. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: Annotate implicit fall through in nand_scan_tailMathieu Malaterre1-0/+3
There is a plan to build the kernel with -Wimplicit-fallthrough and these places in the code produced warnings (W=1). This commit removes the following warnings: drivers/mtd/nand/raw/nand_base.c:5556:6: warning: this statement may fall through [-Wimplicit-fallthrough=] drivers/mtd/nand/raw/nand_base.c:5575:6: warning: this statement may fall through [-Wimplicit-fallthrough=] drivers/mtd/nand/raw/nand_base.c:5613:13: warning: this statement may fall through [-Wimplicit-fallthrough=] Signed-off-by: Mathieu Malaterre <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: rawnand: Annotate implicit fall through in nand_command/nand_command_lpMathieu Malaterre1-1/+2
There is a plan to build the kernel with -Wimplicit-fallthrough and these places in the code produced warnings (W=1). This commit removes the following warnings: drivers/mtd/nand/raw/nand_legacy.c:332:6: warning: this statement may fall through [-Wimplicit-fallthrough=] drivers/mtd/nand/raw/nand_legacy.c:483:3: warning: this statement may fall through [-Wimplicit-fallthrough=] Signed-off-by: Mathieu Malaterre <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2019-02-05mtd: spinand: Add support for all Toshiba Memory productsYoshio Furuyama1-14/+65
Add device table for Toshiba Memory products. Also, generalize OOB layout structure and function names. Signed-off-by: Yoshio Furuyama <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
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