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2018-12-07mtd: rawnand: Deprecate the ->select_chip() hookBoris Brezillon27-36/+37
Now that the CS line to be selected is passed to ->exec_op() and stored in chip->cur_cs and after patching all drivers implementing ->exec_op() to stop implementing this method, we can deprecate it by moving it to the nand_legacy structure. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: ams-delta: Stop implementing ->select_chip()Boris Brezillon1-8/+6
Now that the CS to be selected is passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() hook. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: vf610: Stop implementing ->select_chip()Boris Brezillon1-16/+18
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: tegra: Stop implementing ->select_chip()Boris Brezillon1-16/+12
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: marvell: Stop implementing ->select_chip()Boris Brezillon1-9/+18
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: fsmc: Stop implementing ->select_chip()Boris Brezillon1-11/+12
Now that the CS line to assert is directly passed through the nand_operation struct we can replace the fsmc_select_chip() implementation by an internal fsmc_ce_ctrl() function which is directly called from fsmc_exec_op() Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: Make ->select_chip() optional when ->exec_op() is implementedBoris Brezillon1-7/+6
Now that the CS to be selected on a nand_operation is passed in nand_operation->cs we can make the ->select_chip() hook optional for drivers implementing ->exec_op(). When not implemented, the core is assuming the CS line is automatically asserted/deasserted by the driver ->exec_op() implementation. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: Pass the CS line to be selected in struct nand_operationBoris Brezillon3-19/+27
In order to deprecate the ->select_chip hook we need to pass the CS line a NAND operations are targeting. This is done through the addition of a cs field to the nand_operation struct. We also need to keep track of the currently selected target to properly initialize op->cs, hence the ->cur_cs field addition to the nand_chip struct. Note that op->cs is not assigned in nand_exec_op() because we might rework the way we execute NAND operations in the future (adopt a queuing mechanism instead of the serialization we have right now). Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: Add nand_[de]select_target() helpersBoris Brezillon4-51/+100
Add a wrapper to prevent drivers and core code from directly calling the ->select_chip hook which we are about to deprecate. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: ams-delta: Explicitly inherit from nand_controllerBoris Brezillon1-0/+5
All NAND objects are supposed to inherit from nand_controller. The framework is providing a dummy controller object, but we're moving away from this approach in favor of explicit inheritance. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: ams-delta: Check mtd_device_register() return codeBoris Brezillon1-1/+7
mtd_device_register() can fail, and when it does we should propagate the error and cleanup what has been done before. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: ams-delta: cleanup ams_delta_init() error pathBoris Brezillon1-14/+12
Remove unused labels, rename out_mtd into err_unmap to make it clearer and return 0 instead of using a goto out at the end of the registration procedure. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: ams-delta: Fix various coding style issuesBoris Brezillon1-15/+8
Most of them were reported by checkpatch: * s/u_char/u8/ * remove unneeded blank lines * don't print warning messages when devm_kzalloc() fails * Use ! instead of == NULL * Remove invalid comment Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: ams-delta: Add an SPDX tag to replace the license textBoris Brezillon1-5/+2
Add an SPDX GPL-2.0 tag and update MODULE_LICENSE() to match the license text. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: ams-delta: Allow this driver to be compiled when COMPILE_TEST=yBoris Brezillon2-6/+3
Drop the asm and mach headers inclusion and allow this driver to be compiled when COMPILE_TEST=y in order to increase compile-test coverage. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: Move nand_exec_op() to internal.hBoris Brezillon1-0/+9
nand_exec_op() is only used by core code (nand_xxx.c files). Let's move this inline function in drivers/mtd/nand/raw/internals.h. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: legacy: Drop useless test in nand_legacy_set_defaults()Boris Brezillon1-1/+1
nand_legacy_set_defaults() returns directly if chip->exec_op != NULL, no need to test !chip->exec_op after that. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: Reorganize code to avoid forward declarationsBoris Brezillon2-254/+246
Avoid forward declaration of nand_get_device(), nand_do_write_oob() and nand_update_bbt() by moving functions around. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: rawnand: Stop passing mtd_info objects to internal functionsBoris Brezillon3-190/+184
After having reworked the rawnand API to avoid passing mtd_info objects around, let's do the same for internal functions. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-07mtd: spinand: Add initial support for Toshiba TC58CVG2S0HSchrempf Frieder3-1/+139
Add minimal support for the Toshiba TC58CVG2S0H SPI NAND chip. Signed-off-by: Frieder Schrempf <[email protected]> Acked-by: Clément Péron <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-12-03mtd: use DEFINE_SHOW_ATTRIBUTE() instead of open-coding itYangtao Li1-14/+3
DEFINE_SHOW_ATTRIBUTE macro can help us simplify the code, so change to it. And change the DEBUGFS_RO_ATTR macro defined in some file to a standard macro. Signed-off-by: Yangtao Li <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-11-28mtd: nand: Fix memory allocation in nanddev_bbt_init()Frieder Schrempf1-1/+2
Fix the size of the buffer allocated to store the in-memory BBT. This bug was previously hidden by a different bug, that was fixed in commit d098093ba06e ("mtd: nand: Fix nanddev_neraseblocks()"). Fixes: 9c3736a3de21 ("mtd: nand: Add core infrastructure to deal with NAND devices") Cc: <[email protected]> Signed-off-by: Frieder Schrempf <[email protected]> Acked-by: Miquel Raynal <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-11-18mtd: rawnand: qcom: Namespace prefix some commandsOlof Johansson1-16/+16
PAGE_READ is used by RISC-V arch code included through mm headers, and it makes sense to bring in a prefix on these in the driver. drivers/mtd/nand/raw/qcom_nandc.c:153: warning: "PAGE_READ" redefined #define PAGE_READ 0x2 In file included from include/linux/memremap.h:7, from include/linux/mm.h:27, from include/linux/scatterlist.h:8, from include/linux/dma-mapping.h:11, from drivers/mtd/nand/raw/qcom_nandc.c:17: arch/riscv/include/asm/pgtable.h:48: note: this is the location of the previous definition Caught by riscv allmodconfig. Signed-off-by: Olof Johansson <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-11-18mtd: rawnand: atmel: fix OF child-node lookupJohan Hovold1-4/+7
Use the new of_get_compatible_child() helper to lookup the nfc child node instead of using of_find_compatible_node(), which searches the entire tree from a given start node and thus can return an unrelated (i.e. non-child) node. This also addresses a potential use-after-free (e.g. after probe deferral) as the tree-wide helper drops a reference to its first argument (i.e. the node of the device being probed). While at it, also fix a related nfc-node reference leak. Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver") Cc: stable <[email protected]> # 4.11 Cc: Nicolas Ferre <[email protected]> Cc: Josh Wu <[email protected]> Cc: Boris Brezillon <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-11-13mtd: rawnand: sh_flctl: convert to SPDX identifiersKuninori Morimoto1-15/+2
This patch updates license to use SPDX-License-Identifier instead of verbose license text. As original license mentioned, it is GPL-2.0 in SPDX. Then, MODULE_LICENSE() should be "GPL v2" instead of "GPL". See ${LINUX}/include/linux/module.h "GPL" [GNU Public License v2 or later] "GPL v2" [GNU Public License v2] Signed-off-by: Kuninori Morimoto <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-13Merge tag 'v4.20-rc2' of ↵Miquel Raynal1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into nand/next Linux 4.20-rc2
2018-11-06mtd: rawnand: Flag 1.8V AC chips with a broken GET_FEATURES(TIMINGS)Mason Yang1-0/+7
Make sure we flag all 1.8V broken chips as not supporting this feature. Signed-off-by: Mason Yang <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: r852: use generic DMA APIChristoph Hellwig1-13/+13
Use the generic DMA API instead of the legacy PCI DMA API. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: denali: include <linux/bits.h> instead of <linux/bitops.h>Masahiro Yamada1-1/+1
The reason of including <linux/bitops.h> here is just for BIT() and GENMASK macros. Since commit 8bd9cb51daac8 ("locking/atomics, asm-generic: Move some macros from <linux/bitops.h> to a new <linux/bits.h> file"), <linux/bits.h> is enough for such compile-time macros. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: ams-delta: Convert the driver to ->exec_op()Janusz Krzysztofik1-44/+56
Replace legacy callbacks with ->select_chip() and ->exec_op(). Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: ams-delta: Stop using legacy .IOADDR_R/WJanusz Krzysztofik1-4/+2
Replace use of legacy .IOADDR_R/W with runtime calculations based on priv->io_base. Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: Provide helper for polling GPIO R/B pinJanusz Krzysztofik1-0/+31
Each controller driver having access to NAND R/B pin over GPIO would have to reimplement the polling loop otherwise. Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: rawnand: fsmc: Fix unchecked return value in fsmc_read_page_hweccGustavo A. R. Silva1-3/+4
Check return value of nand_read_data_op. Notice that, currently, all instances of nand_read_data_op() are being checked, with the exception of two of them in marvell_nand driver, in which the caller function explicitly returns 0 every time. Also, notice that I moved the declaration of *ret* to the top of fsmc_read_page_hwecc(). Addresses-Coverity-ID: 1471968 ("Unchecked return value") Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: spinand: winbond: Add support for W25N01GVRobert Marko1-0/+8
W25N01GV is a single die version of the already supported W25M02GV with half the capacity. Everything else is the same so introduce support for W25N01GV. Datasheet:http://www.winbond.com/resource-files/w25n01gv%20revl%20050918%20unsecured.pdf Tested on 8devices Jalapeno dev board under OpenWrt running 4.19-rc5. Signed-off-by: Robert Marko <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-11-05mtd: nand: drop kernel-doc notation for a deleted function parameterRandy Dunlap1-1/+0
Remove kernel-doc notation for a deleted function parameter to prevent a kernel-doc warning: ../drivers/mtd/nand/raw/nand_base.c:603: warning: Excess function parameter 'mtd' description in 'panic_nand_wait' Fixes: f1d46942e823 ("mtd: rawnand: Pass a nand_chip object to chip->waitfunc()") Signed-off-by: Randy Dunlap <[email protected]> Cc: Boris Brezillon <[email protected]> Cc: Miquel Raynal <[email protected]> Cc: Richard Weinberger <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-10-23Merge tag 'mtd/for-4.20' of git://git.infradead.org/linux-mtdLinus Torvalds75-4938/+3669
Pull mtd updates from Boris Brezillon: "SPI NOR core changes: - Support non-uniform erase size - Support controllers with limited TX fifo size Driver changes: - m25p80: Re-issue a WREN command after each write access - cadence: Pass a proper dir value to dma_[un]map_single() - fsl-qspi: Check fsl_qspi_get_seqid() return val make sure 4B addressing opcodes are properly handled - intel-spi: Add a new PCI entry for Ice Lake Raw NAND core changes: - Two batchs of cleanups of the NAND API, including: * Deprecating a lot of interfaces (now replaced by ->exec_op()). * Moving code in separate drivers (JEDEC, ONFI), in private files (internals), in platform drivers, etc. * Functions/structures reordering. * Exclusive use of the nand_chip structure instead of the MTD one all across the subsystem. - Addition of the nand_wait_readrdy/rdy_op() helpers. Raw NAND controllers drivers changes: - Various coccinelle patches. - Marvell: * Use regmap_update_bits() for syscon access. * More documentation. * BCH failure path rework. * More layouts to be supported. * IRQ handler complete() condition fixed. - Fsl_ifc: * SRAM initialization fixed for newer controller versions. - Denali: * Fix licenses mismatch and use a SPDX tag. * Set SPARE_AREA_SKIP_BYTES register to 8 if unset. - Qualcomm: * Do not include dma-direct.h. - Docg4: * Removed. - Ams-delta: * Use of a GPIO lookup table * Internal machinery changes. Raw NAND chip drivers changes: - Toshiba: * Add support for Toshiba memory BENAND * Pass a single nand_chip object to the status helper. - ESMT: * New driver to retrieve the ECC requirements from the 5th ID byte. MTD changes: - physmap cleanups/fixe - gpio-addr-flash cleanups/fixes" * tag 'mtd/for-4.20' of git://git.infradead.org/linux-mtd: (93 commits) jffs2: free jffs2_sb_info through jffs2_kill_sb() mtd: spi-nor: fsl-quadspi: fix read error for flash size larger than 16MB mtd: spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flash mtd: maps: gpio-addr-flash: Convert to gpiod mtd: maps: gpio-addr-flash: Replace array with an integer mtd: maps: gpio-addr-flash: Use order instead of size mtd: spi-nor: fsl-quadspi: Don't let -EINVAL on the bus mtd: devices: m25p80: Make sure WRITE_EN is issued before each write mtd: spi-nor: Support controllers with limited TX FIFO size mtd: spi-nor: cadence-quadspi: Use proper enum for dma_[un]map_single mtd: spi-nor: parse SFDP Sector Map Parameter Table mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories mtd: rawnand: marvell: fix the IRQ handler complete() condition mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES register to 8 if unset mtd: rawnand: r852: fix spelling mistake "card_registred" -> "card_registered" mtd: rawnand: toshiba: Pass a single nand_chip object to the status helper mtd: maps: gpio-addr-flash: Use devm_* functions mtd: maps: gpio-addr-flash: Fix ioremapped size mtd: maps: gpio-addr-flash: Replace custom printk mtd: physmap_of: Release resources on error ...
2018-10-08mtd: rawnand: marvell: fix the IRQ handler complete() conditionMiquel Raynal1-1/+1
With the current implementation, the complete() in the IRQ handler is supposed to be called only if the register status has one or the other RDY bit set. Other events might trigger an interrupt as well if enabled, but should not end-up with a complete() call. For this purpose, the code was checking if the other bits were set, in this case complete() was not called. This is wrong as two events might happen in a very tight time-frame and if the NDSR status read reports two bits set (eg. RDY(0) and RDDREQ) at the same time, complete() was not called. This logic would lead to timeouts in marvell_nfc_wait_op() and has been observed on PXA boards (NFCv1) in the Hamming write path. Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: [email protected] Reported-by: Daniel Mack <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Tested-by: Daniel Mack <[email protected]>
2018-10-08mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES register to 8 if unsetMasahiro Yamada1-4/+10
NAND devices need additional data area (OOB) for error correction, but it is also used for Bad Block Marker (BBM). In many cases, the first byte in OOB is used for BBM, but the location actually depends on chip vendors. The NAND controller should preserve the precious BBM to keep track of bad blocks. In Denali IP, the SPARE_AREA_SKIP_BYTES register is used to specify the number of bytes to skip from the start of OOB. The ECC engine will automatically skip the specified number of bytes when it gets access to OOB area. The same value for SPARE_AREA_SKIP_BYTES should be used between firmware and the operating system if you intend to use the NAND device across the control hand-off. In fact, the current denali.c code expects firmware to have already set the SPARE_AREA_SKIP_BYTES register, then reads the value out. If no firmware (or bootloader) has initialized the controller, the register value is zero, which is the default after power-on-reset. In other words, the Linux driver cannot initialize the controller by itself. Some possible solutions are: [1] Add a DT property to specify the skipped bytes in OOB [2] Associate the preferred value with compatible [3] Hard-code the default value in the driver My first attempt was [1], but in the review process, [3] was suggested as a counter-implementation. (https://lore.kernel.org/patchwork/patch/983055/) The default value 8 was chosen to match to the boot ROM of the UniPhier platform. The preferred value may vary by platform. If so, please trade up to a different solution. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-08mtd: rawnand: r852: fix spelling mistake "card_registred" -> "card_registered"Colin Ian King2-8/+8
Trivial fix to spelling mistake struct field name, rename it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-08mtd: rawnand: toshiba: Pass a single nand_chip object to the status helperMiquel Raynal1-6/+4
Now that most of the raw NAND API is consistent and has almost all its helpers and hooks using a single nand_chip object instead of an mtd_info one (or both), let's do the same cleanup in the raw NAND vendors drivers. Apply this change to the Toshiba driver so that the internal helper to retrieve the ECC status does only take a nand_chip object. Suggested-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Boris Brezillon <[email protected]>
2018-10-03mtd: rawnand: Allow selection of ECC byte ordering at runtimeBoris Brezillon5-53/+49
Currently, the selection of ECC byte ordering for software hamming is done at compilation time, which doesn't make sense when ECC byte calculation is done in hardware and byte ordering is forced by the hardware engine. In this case, only the correction is done in software and we want to force the byte-ordering no matter the value of CONFIG_MTD_NAND_ECC_SMC. This is typically the case for the FSMC (Smart Media ordering), TMIO and TXX9NDFMC (regular byte ordering) blocks. For all other use cases (pure software implementation, SM FTL and nandecctest), we keep selecting the byte ordering based on the CONFIG_MTD_NAND_ECC_SMC value. It might not be ideal for SM FTL (I'd expect Smart Media ordering to be employed by the Smart Media FTL), but this option doesn't seem to be enabled in the existing _defconfig, so I can't tell setting sm_order to true is the right choice. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: sh_flctl: Use proper enum for flctl_dma_fifo0_transferNathan Chancellor1-2/+2
Clang warns when one enumerated type is converted implicitly to another: drivers/mtd/nand/raw/sh_flctl.c:483:46: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_DEV_TO_MEM) > 0) ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~ drivers/mtd/nand/raw/sh_flctl.c:542:46: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_MEM_TO_DEV) > 0) ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~ 2 warnings generated. Use the proper enums from dma_data_direction to satisfy Clang. DMA_MEM_TO_DEV = DMA_TO_DEVICE = 1 DMA_DEV_TO_MEM = DMA_FROM_DEVICE = 2 Reported-by: Nick Desaulniers <[email protected]> Signed-off-by: Nathan Chancellor <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: ams-delta: Set port direction when neededJanusz Krzysztofik1-17/+40
In its current shape, the driver sets data port direction before each byte read/write operation, even during multi-byte transfers. Improve performance of the driver by setting the port direction only when needed. This optimisation will become particularly important as soon as planned conversion of the driver to GPIO API for data I/O will be implemented. Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: ams-delta: Use private structureJanusz Krzysztofik1-56/+66
Introduce a driver private structure and allocate it on device probe. Use it for storing nand_chip structure, GPIO descriptors prevoiusly stored in static variables as well as io_base pointer previously passed as nand controller data or platform driver data. Subsequent patches may populate the structure with more members as needed. Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: ams-delta: show parent device in sysfsJanusz Krzysztofik1-1/+1
Fix a bug where parent device symlinks aren't shown in sysfs. While at it, make use of the default owner set by mtdcore. Signed-off-by: Janusz Krzysztofik <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: ams-delta: use GPIO lookup tableJanusz Krzysztofik1-59/+67
Now as Amstrad Delta board - the only user of this driver - provides GPIO lookup tables, switch from GPIO numbers to GPIO descriptors and use the table to locate required GPIO pins. Declare static variables for storing GPIO descriptors and replace gpio_ function calls with their gpiod_ equivalents. Pin naming used by the driver should be followed while respective GPIO lookup table is initialized by a board init code. Signed-off-by: Janusz Krzysztofik <[email protected]> Acked-by: Boris Brezillon <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: atmel: Fix potential NULL pointer dereferenceGustavo A. R. Silva1-0/+4
There is a potential execution path in which function of_find_compatible_node() returns NULL. In such a case, we end up having a NULL pointer dereference when accessing pointer *nfc_np* in function of_clk_get(). So, we better don't take any chances and fix this by null checking pointer *nfc_np* before calling of_clk_get(). Addresses-Coverity-ID: 1473052 ("Dereference null return value") Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver") Signed-off-by: Gustavo A. R. Silva <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Acked-by: Tudor Ambarus <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: marvell: Add support for 8kiB pages NAND chips layoutKonstantin Porotchkin1-0/+2
Add support for two new layouts: 8kiB pages NAND chips, requesting either 4 or 8 bit of correctability per 512B step. Signed-off-by: Konstantin Porotchkin <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: ESMT: retrieve ECC requirements from 5th id byteMarcel Ziswiler4-1/+50
This patch enables support to read the ECC level from the NAND flash using ESMT SLC NAND ID byte 5 information as documented e.g. in the following data sheet: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F59L1G81LA(2Y).pdf Signed-off-by: Marcel Ziswiler <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
2018-10-03mtd: rawnand: reorder NAND manufacturer IDsMarcel Ziswiler2-24/+24
Reorder NAND manufacturer IDs for clarity. Signed-off-by: Marcel Ziswiler <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
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