aboutsummaryrefslogtreecommitdiff
path: root/drivers/mmc
AgeCommit message (Collapse)AuthorFilesLines
2024-01-09Merge tag 'spi-v6.8' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A moderately busy release for SPI, the main core update was the merging of support for multiple chip selects, used in some flash configurations. There were also big overhauls for the AXI SPI Engine and PL022 drivers, plus some new device support for ST. There's a few patches for other trees, API updates to allow the multiple chip select support and one of the naming modernisations touched a controller embedded in the USB code. - Support for multiple chip selects. - A big overhaul for the AXI SPI engine driver, modernising it and adding a bunch of new features. - Modernisation of the PL022 driver, fixing some issues with submitting messages while in atomic context in the process. - Many drivers were converted to use new APIs which avoid outdated terminology for devices and controllers. - Support for ST Microelectronics STM32F7 and STM32MP25, and Renesas RZ/Five" * tag 'spi-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (83 commits) spi: stm32: add st,stm32mp25-spi compatible supporting STM32MP25 soc dt-bindings: spi: stm32: add st,stm32mp25-spi compatible spi: stm32: use dma_get_slave_caps prior to configuring dma channel spi: axi-spi-engine: fix struct member doc warnings spi: pl022: update description of internal_cs_control() spi: pl022: delete description of cur_msg spi: dw: Remove Intel Thunder Bay SOC support spi: dw: Remove Intel Thunder Bay SOC support spi: sh-msiof: Enforce fixed DTDL for R-Car H3 spi: ljca: switch to use devm_spi_alloc_host() spi: cs42l43: switch to use devm_spi_alloc_host() spi: zynqmp-gqspi: switch to use modern name spi: zynq-qspi: switch to use modern name spi: xtensa-xtfpga: switch to use modern name spi: xlp: switch to use modern name spi: xilinx: switch to use modern name spi: xcomm: switch to use modern name spi: uniphier: switch to use modern name spi: topcliff-pch: switch to use modern name spi: wpcm-fiu: switch to use devm_spi_alloc_host() ...
2024-01-05mmc: xenon: Add ac5 support via bounce bufferElad Nachman2-1/+33
AC5/X/IM SOCs has a variant of the Xenon eMMC controller, in which only 31-bit of addressing pass from the controller on the AXI bus. Since we cannot guarantee that only buffers from the first 2GB of memory will reach the driver, the driver is configured for SDMA mode, without 64-bit mode, overriding the DMA mask to 34-bit to support the DDR memory mapping, which starts at offset 8GB. Signed-off-by: Elad Nachman <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-05mmc: sdhci-brcmstb: add new sdhci reset sequence for brcm 74165b0Kamal Dasu1-5/+64
74165b0 shall use a new sdio controller core version which requires a different reset sequence. For core reset we use sdhci_reset. For CMD and/or DATA reset added a new function to also enable SDHCI clocks SDHCI_CLOCK_CARD_EN SDHCI_CLOCK_INT_EN along with the SDHCI_RESET_CMD and/or SDHCI_RESET_DATA fields. Signed-off-by: Kamal Dasu <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-03mmc: Merge branch fixes into nextUlf Hansson1-3/+7
Merge the mmc fixes for v6.7-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.8. Signed-off-by: Ulf Hansson <[email protected]>
2024-01-03mmc: core: Do not force a retune before RPMB switchJorge Ramirez-Ortiz1-2/+1
Requesting a retune before switching to the RPMB partition has been observed to cause CRC errors on the RPMB reads (-EILSEQ). Since RPMB reads can not be retried, the clients would be directly affected by the errors. This commit disables the retune request prior to switching to the RPMB partition: mmc_retune_pause() no longer triggers a retune before the pause period begins. This was verified with the sdhci-of-arasan driver (ZynqMP) configured for HS200 using two separate eMMC cards (DG4064 and 064GB2). In both cases, the error was easy to reproduce triggering every few tenths of reads. With this commit, systems that were utilizing OP-TEE to access RPMB variables will experience an enhanced performance. Specifically, when OP-TEE is configured to employ RPMB as a secure storage solution, it not only writes the data but also the secure filesystem within the partition. As a result, retrieving any variable involves multiple RPMB reads, typically around five. For context, on ZynqMP, each retune request consumed approximately 8ms. Consequently, reading any RPMB variable used to take at the very minimum 40ms. After droping the need to retune before switching to the RPMB partition, this is no longer the case. Signed-off-by: Jorge Ramirez-Ortiz <[email protected]> Acked-by: Avri Altman <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-03mmc: sdhci-sprd: Fix eMMC init failure after hw resetWenchao Chen1-3/+7
Some eMMC devices that do not close the auto clk gate after hw reset will cause eMMC initialization to fail. Let's fix this. Signed-off-by: Wenchao Chen <[email protected]> Fixes: ff874dbc4f86 ("mmc: sdhci-sprd: Disable CLK_AUTO when the clock is less than 400K") Reviewed-by: Baolin Wang <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-02mmc: core: Add HS400 tuning in HS400es initializationMengqi Zhang1-2/+7
During the initialization to HS400es stage, add a HS400 tuning flow as an optional process. For Mediatek IP, the HS400es mode requires a specific tuning to ensure the correct HS400 timing setting. Signed-off-by: Mengqi Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-02mmc: sdhci_omap: Fix TI SoC dependenciesPeter Robinson1-2/+3
The sdhci_omap is specific to older TI SoCs, update the dependencies for those SoCs and compile testing. While we're at it update the text to reflect the wider range of supported TI SoCS the driver now supports. Fixes: 7d326930d352 ("mmc: sdhci-omap: Add OMAP SDHCI driver") Signed-off-by: Peter Robinson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-02mmc: sdhci_am654: Fix TI SoC dependenciesPeter Robinson1-2/+3
The sdhci_am654 is specific to recent TI SoCs, update the dependencies for those SoCs and compile testing. While we're at it update the text to reflect the wider range of supported TI SoCS the driver now supports. Fixes: 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver") Signed-off-by: Peter Robinson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-02mmc: core: Add wp_grp_size sysfs nodeLin Gui1-1/+15
The eMMC card can be set into write-protected mode to prevent data from being accidentally modified or deleted. Wp_grp_size (Write Protect Group Size) refers to an attribute of the eMMC card, used to manage write protection and is the CSD register [36:32] of the eMMC device. Wp_grp_size (Write Protect Group Size) indicates how many eMMC blocks are contained in each write protection group on the eMMC card. To allow userspace easy access of the CSD register bits, let's add sysfs node "wp_grp_size". Signed-off-by: Lin Gui <[email protected]> Signed-off-by: Bo Ye <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-02mmc: mmc_test: Add re-tuning testAdrian Hunter1-6/+27
Add a test to repeatedly re-tune in between random reads. The test is non-destructive of data on the card and runs for 30 seconds. It can be repeated to test for longer durations. If re-tuning is not supported, the test is skipped. Example: # echo 'mmc1:0001' > /sys/bus/mmc/drivers/mmcblk/unbind # echo 'mmc1:0001' > /sys/bus/mmc/drivers/mmc_test/bind [ 36.642257] mmc_test mmc1:0001: Card claimed for testing. # cat /sys/kernel/debug/mmc1/mmc1\:0001/testlist | grep tuning 52: Re-tuning reliability # echo 52 > /sys/kernel/debug/mmc1/mmc1\:0001/test [ 91.522555] mmc1: Starting tests of card mmc1:0001... [ 91.528425] mmc1: Test case 52. Re-tuning reliability... [ 121.536682] mmc1: Result: OK [ 121.539572] mmc1: Tests completed. Signed-off-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2024-01-02mmc: mmc_spi: remove custom DMA mapped buffersAndy Shevchenko1-181/+5
There is no need to duplicate what SPI core or individual controller drivers already do, i.e. mapping the buffers for DMA capable transfers. Note, that the code, besides its redundancy, was buggy: strictly speaking there is no guarantee, while it's true for those which can use this code (see below), that the SPI host controller _is_ the device which does DMA. Also see the Link tags below. Additional notes. Currently only two SPI host controller drivers may use premapped (by the user) DMA buffers: - drivers/spi/spi-au1550.c - drivers/spi/spi-fsl-spi.c Both of them have DMA mapping support code. I don't expect that SPI host controller code is worse than what has been done in mmc_spi. Hence I do not expect any regressions here. Otherwise, I'm pretty much sure these regressions have to be fixed in the respective drivers, and not here. That said, remove all related pieces of DMA mapping code from mmc_spi. Link: https://lore.kernel.org/linux-mmc/[email protected]/ Link: https://stackoverflow.com/questions/67620728/mmc-spi-issue-not-able-to-setup-mmc-sd-card-in-linux Signed-off-by: Andy Shevchenko <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-15mmc: rtsx: add rts5264 to support sd express cardRicky Wu1-1/+16
rts5264 can support sd express card, so add the id in sd express card init to do rts5264 register setting when the sd express card insert Signed-off-by: Ricky Wu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-11Merge 6.7-rc5 into tty-nextGreg Kroah-Hartman5-49/+85
We need the serial fixes in here as well to build off of. Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-08tty: mmc: sdio: use u8 for flagJiri Slaby (SUSE)1-2/+1
Switch character types to u8. To conform to characters in the rest of the tty layer. Signed-off-by: "Jiri Slaby (SUSE)" <[email protected]> Cc: Ulf Hansson <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-08tty: make tty_operations::send_xchar accept u8 charJiri Slaby (SUSE)1-1/+1
tty_operations::send_xchar is one of the last users of 'char' type for characters in the tty layer. Convert it to u8 now. Signed-off-by: "Jiri Slaby (SUSE)" <[email protected]> Cc: Karsten Keil <[email protected]> Cc: Ulf Hansson <[email protected]> Cc: Marcel Holtmann <[email protected]> Cc: Johan Hedberg <[email protected]> Cc: Luiz Augusto von Dentz <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-08tty: mmc: sdio_uart: switch sdio_in() to return u8Jiri Slaby (SUSE)1-11/+8
sdio_in() returns a value returned from sdio_readb(). The latter returns u8. So should the former. Therefore, switch sdio_in() return type to u8 and all its callers too. Signed-off-by: "Jiri Slaby (SUSE)" <[email protected]> Cc: Ulf Hansson <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-07mmc: Merge branch fixes into nextUlf Hansson1-0/+1
Merge the mmc fixes for v6.7-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.8. Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: core: Cancel delayed work before releasing hostGeert Uytterhoeven1-0/+1
On RZ/Five SMARC EVK, where probing of SDHI is deferred due to probe deferral of the vqmmc-supply regulator: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 0 at kernel/time/timer.c:1738 __run_timers.part.0+0x1d0/0x1e8 Modules linked in: CPU: 0 PID: 0 Comm: swapper Not tainted 6.7.0-rc4 #101 Hardware name: Renesas SMARC EVK based on r9a07g043f01 (DT) epc : __run_timers.part.0+0x1d0/0x1e8 ra : __run_timers.part.0+0x134/0x1e8 epc : ffffffff800771a4 ra : ffffffff80077108 sp : ffffffc800003e60 gp : ffffffff814f5028 tp : ffffffff8140c5c0 t0 : ffffffc800000000 t1 : 0000000000000001 t2 : ffffffff81201300 s0 : ffffffc800003f20 s1 : ffffffd8023bc4a0 a0 : 00000000fffee6b0 a1 : 0004010000400000 a2 : ffffffffc0000016 a3 : ffffffff81488640 a4 : ffffffc800003e60 a5 : 0000000000000000 a6 : 0000000004000000 a7 : ffffffc800003e68 s2 : 0000000000000122 s3 : 0000000000200000 s4 : 0000000000000000 s5 : ffffffffffffffff s6 : ffffffff81488678 s7 : ffffffff814886c0 s8 : ffffffff814f49c0 s9 : ffffffff81488640 s10: 0000000000000000 s11: ffffffc800003e60 t3 : 0000000000000240 t4 : 0000000000000a52 t5 : ffffffd8024ae018 t6 : ffffffd8024ae038 status: 0000000200000100 badaddr: 0000000000000000 cause: 0000000000000003 [<ffffffff800771a4>] __run_timers.part.0+0x1d0/0x1e8 [<ffffffff800771e0>] run_timer_softirq+0x24/0x4a [<ffffffff80809092>] __do_softirq+0xc6/0x1fa [<ffffffff80028e4c>] irq_exit_rcu+0x66/0x84 [<ffffffff80800f7a>] handle_riscv_irq+0x40/0x4e [<ffffffff80808f48>] call_on_irq_stack+0x1c/0x28 ---[ end trace 0000000000000000 ]--- What happens? renesas_sdhi_probe() { tmio_mmc_host_alloc() mmc_alloc_host() INIT_DELAYED_WORK(&host->detect, mmc_rescan); devm_request_irq(tmio_mmc_irq); /* * After this, the interrupt handler may be invoked at any time * * tmio_mmc_irq() * { * __tmio_mmc_card_detect_irq() * mmc_detect_change() * _mmc_detect_change() * mmc_schedule_delayed_work(&host->detect, delay); * } */ tmio_mmc_host_probe() tmio_mmc_init_ocr() -EPROBE_DEFER tmio_mmc_host_free() mmc_free_host() } When expire_timers() runs later, it warns because the MMC host structure containing the delayed work was freed, and now contains an invalid work function pointer. Fix this by cancelling any pending delayed work before releasing the MMC host structure. Signed-off-by: Geert Uytterhoeven <[email protected]> Tested-by: Lad Prabhakar <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/205dc4c91b47e31b64392fe2498c7a449e717b4b.1701689330.git.geert+renesas@glider.be Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: mtk-sd: Extend number of tuning stepsAxe Yang1-48/+110
Previously, during the MSDC calibration process, a full clock cycle actually not be covered, which in some cases didn't yield the best results and could cause CRC errors. This problem is particularly evident when MSDC is used as an SDIO host. In fact, MSDC support tuning up to a maximum of 64 steps, but by default, the step number is 32. By increase the tuning step, we are more likely to cover more parts of a clock cycle, and get better calibration result. To illustrate, when tuning 32 steps, if the obtained window has a hole near the middle, like this: 0xffc07ff (hex), then the selected delay will be the 6 (counting from right to left). (32 <- 1) 1111 1111 1100 0000 0000 0111 11(1)1 1111 However, if we tune 64 steps, the window obtained may look like this: 0xfffffffffffc07ff. The final selected delay will be 44, which is safer as it is further away from the hole: (64 <- 1) 1111 ... (1)111 1111 1111 1111 1111 1100 0000 0000 0111 1111 1111 In this case, delay 6 selected through 32 steps tuning is obviously not optimal, and this delay is closer to the hole, using it would easily cause CRC problems. As per mesaurements taken on mediatek SoC platform, the tuning phase will take: eMMC - 32 steps: ~3ms - 64 steps: ~6ms SDIO - 32 steps: ~4ms - 64 steos: ~7ms Tuning more steps won't prolong boot times by any meaningful amount of time, so for SD/SDIO the default tuning steps will be adjust to 64. But for eMMC, it is still preferred to use 32 steps tuning as otherwise there would be performance lose when accessing the RPMB partition(requiring retuning each time). You can configure property "mediatek,tuning-step" in MSDC dts node to adjust the step number. Signed-off-by: Axe Yang <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: sdhci-omap: don't misuse kernel-doc markerRandy Dunlap1-1/+1
Use "/*" instead of "/**" for common C comments to prevent warnings from scripts/kernel-doc. sdhci-omap.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst sdhci-omap.c:3: warning: missing initial short description on line: * SDHCI Controller driver for TI's OMAP SoCs Signed-off-by: Randy Dunlap <[email protected]> Reported-by: kernel test robot <[email protected]> Link: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: Merge branch fixes into nextUlf Hansson2-24/+9
Merge the mmc fixes for v6.7-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.8. Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: rpmb: fixes pause retune on all RPMB partitions.Jorge Ramirez-Ortiz1-3/+4
When RPMB was converted to a character device, it added support for multiple RPMB partitions (Commit 97548575bef3 ("mmc: block: Convert RPMB to a character device"). One of the changes in this commit was transforming the variable target_part defined in __mmc_blk_ioctl_cmd into a bitmask. This inadvertently regressed the validation check done in mmc_blk_part_switch_pre() and mmc_blk_part_switch_post(), so let's fix it. Fixes: 97548575bef3 ("mmc: block: Convert RPMB to a character device") Signed-off-by: Jorge Ramirez-Ortiz <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Cc: <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: mtk-sd: Increase the verbosity of msdc_track_cmd_dataPin-yen Lin1-3/+5
This log message is necessary for debugging, so enable it by default to debug issues that are hard to reproduce locally. Signed-off-by: Pin-yen Lin <[email protected]> Reviewed-by: Wenbin Mei <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: core: Use mrq.sbc in close-ended ffuAvri Altman1-3/+43
Field Firmware Update (ffu) may use close-ended or open ended sequence. Each such sequence is comprised of a write commands enclosed between 2 switch commands - to and from ffu mode. So for the close-ended case, it will be: cmd6->cmd23-cmd25-cmd6. Some host controllers however, get confused when multi-block rw is sent without sbc, and may generate auto-cmd12 which breaks the ffu sequence. I encountered this issue while testing fwupd (github.com/fwupd/fwupd) on HP Chromebook x2, a qualcomm based QC-7c, code name - strongbad. Instead of a quirk, or hooking the request function of the msm ops, it would be better to fix the ioctl handling and make it use mrq.sbc instead of issuing SET_BLOCK_COUNT separately. Signed-off-by: Avri Altman <[email protected]> Acked-by: Adrian Hunter <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: sdhci_am654: Drop lookup for deprecated ti,otap-del-selVignesh Raghavendra1-31/+6
ti,otap-del-sel has been deprecated since v5.7 and there are no users of this property and no documentation in the DT bindings either. Drop the fallback code looking for this property, this makes sdhci_am654_get_otap_delay() much easier to read as all the TAP values can be handled via a single iterator loop. Signed-off-by: Vignesh Raghavendra <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: sdhci-of-dwcmshc: Use logical OR instead of bitwise OR in dwcmshc_probe()Nathan Chancellor1-3/+3
Clang warns (or errors with CONFIG_WERROR=y): drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: error: use of bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical] 873 | if ((device_property_read_bool(dev, "mmc-ddr-1_8v")) | | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 874 | (device_property_read_bool(dev, "mmc-hs200-1_8v")) | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | || 875 | (device_property_read_bool(dev, "mmc-hs400-1_8v"))) | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: note: cast one or both operands to int to silence this warning drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: error: use of bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical] 873 | if ((device_property_read_bool(dev, "mmc-ddr-1_8v")) | | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | || 874 | (device_property_read_bool(dev, "mmc-hs200-1_8v")) | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mmc/host/sdhci-of-dwcmshc.c:873:7: note: cast one or both operands to int to silence this warning 2 errors generated. There is little reason for this if statement to use bitwise ORs, as the short circuiting of logical OR does not need to be avoided in this context; it would be wasteful to call device_property_read_bool() three times if the first two calls returned true. Switch to logical OR to fix the warning. While in the area, the parentheses around the calls to device_property_read_bool() are not necessary and make the if statement harder to read, so remove them. Closes: https://github.com/ClangBuiltLinux/linux/issues/1960 Signed-off-by: Nathan Chancellor <[email protected]> Acked-by: Adrian Hunter <[email protected]> Tested-by: Drew Fustini <[email protected]> Link: https://lore.kernel.org/r/20231116-sdhci-of-dwcmshc-fix-wbitwise-instead-of-logical-v1-1-7e1a7f4ccaab@kernel.org Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520Drew Fustini1-0/+349
Add support for the mmc controller in the T-Head TH1520 with the new compatible "thead,th1520-dwcmshc". Implement custom sdhci_ops for set_uhs_signaling, reset, voltage_switch, and platform_execute_tuning. Acked-by: Adrian Hunter <[email protected]> Signed-off-by: Drew Fustini <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: sdhci: add __sdhci_execute_tuning() to headerDrew Fustini2-1/+3
Expose __sdhci_execute_tuning() so that it can be called from the mmc host controller drivers. In the sdhci-of-dwcmshc driver, sdhci_dwcmshc_th1520_ops sets platform_execute_tuning to th1520_execute_tuning(). That function has to manipulate phy registers before tuning can be performed. To avoid copying the code verbatim from __sdhci_execute_tuning() into th1520_execute_tuning(), make it possible for __sdhci_execute_tuning() to be called from sdhci-of-dwcmshc. Acked-by: Adrian Hunter <[email protected]> Signed-off-by: Drew Fustini <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: mmci: stm32: add SDIO in-band interrupt modeChristophe Kerello2-2/+69
Add the support of SDIO in-band interrupt mode for STM32 and Ux500 variants. It allows the SD I/O card to interrupt the host on SDMMC_D1 data line. It is not enabled by default on Ux500 variant as this is unstable and Ux500 users should use out-of-band IRQs. Signed-off-by: Christophe Kerello <[email protected]> Signed-off-by: Yann Gautier <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: core: Remove packed command leftoversAvri Altman1-5/+0
Packed commands support was removed long time ago, but some bits got left behind. Remove them. Signed-off-by: Avri Altman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-12-07mmc: meson-mx-sdhc: Fix initialization frozen issueZiyang Huang1-21/+5
Commit 4bc31edebde5 ("mmc: core: Set HS clock speed before sending HS CMD13") set HS clock (52MHz) before switching to HS mode. For this freq, FCLK_DIV5 will be selected and div value is 10 (reg value is 9). Then we set rx_clk_phase to 11 or 15 which is out of range and make hardware frozen. After we send command request, no irq will be interrupted and the mmc driver will keep to wait for request finished, even durning rebooting. So let's set it to Phase 90 which should work in most cases. Then let meson_mx_sdhc_execute_tuning() to find the accurate value for data transfer. If this doesn't work, maybe need to define a factor in dts. Fixes: e4bf1b0970ef ("mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC host") Signed-off-by: Ziyang Huang <[email protected]> Tested-by: Anand Moon <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/TYZPR01MB5556A3E71554A2EC08597EA4C9CDA@TYZPR01MB5556.apcprd01.prod.exchangelabs.com Signed-off-by: Ulf Hansson <[email protected]>
2023-11-23mmc: sdhci-sprd: Fix vqmmc not shutting down after the card was pulledWenchao Chen1-0/+25
With cat regulator_summary, we found that vqmmc was not shutting down after the card was pulled. cat /sys/kernel/debug/regulator/regulator_summary 1.before fix 1)Insert SD card vddsdio 1 1 0 unknown 3500mV 0mA 1200mV 3750mV 71100000.mmc-vqmmc 1 0mA 3500mV 3600mV 2)Pull out the SD card vddsdio 1 1 0 unknown 3500mV 0mA 1200mV 3750mV 71100000.mmc-vqmmc 1 0mA 3500mV 3600mV 2.after fix 1)Insert SD cardt vddsdio 1 1 0 unknown 3500mV 0mA 1200mV 3750mV 71100000.mmc-vqmmc 1 0mA 3500mV 3600mV 2)Pull out the SD card vddsdio 0 1 0 unknown 3500mV 0mA 1200mV 3750mV 71100000.mmc-vqmmc 0 0mA 3500mV 3600mV Fixes: fb8bd90f83c4 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Signed-off-by: Wenchao Chen <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-23mmc: sdhci-pci-gli: Disable LPM during initializationKornel Dulęba1-25/+29
To address IO performance commit f9e5b33934ce ("mmc: host: Improve I/O read/write performance for GL9763E") limited LPM negotiation to runtime suspend state. The problem is that it only flips the switch in the runtime PM resume/suspend logic. Disable LPM negotiation in gl9763e_add_host. This helps in two ways: 1. It was found that the LPM switch stays in the same position after warm reboot. Having it set in init helps with consistency. 2. Disabling LPM during the first runtime resume leaves us susceptible to the performance issue in the time window between boot and the first runtime suspend. Fixes: f9e5b33934ce ("mmc: host: Improve I/O read/write performance for GL9763E") Cc: [email protected] Signed-off-by: Kornel Dulęba <[email protected]> Reviewed-by: Sven van Ashbrook <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-16treewide, spi: Get rid of SPI_MASTER_HALF_DUPLEXAndy Shevchenko1-1/+1
The SPI_MASTER_HALF_DUPLEX is the legacy name of a definition for a half duplex flag. Since all others had been replaced with the respective SPI_CONTROLLER prefix get rid of the last one as well. There is no functional change intended. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Greg Kroah-Hartman <[email protected]> Acked-by: Ulf Hansson <[email protected]> # For MMC Acked-by: Dmitry Torokhov <[email protected]> # for input Acked-by: Paolo Abeni <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-11-14mmc: cqhci: Fix task clearing in CQE error recoveryAdrian Hunter1-16/+16
If a task completion notification (TCN) is received when there is no outstanding task, the cqhci driver issues a "spurious TCN" warning. This was observed to happen right after CQE error recovery. When an error interrupt is received the driver runs recovery logic. It halts the controller, clears all pending tasks, and then re-enables it. On some platforms, like Intel Jasper Lake, a stale task completion event was observed, regardless of the CQHCI_CLEAR_ALL_TASKS bit being set. This results in either: a) Spurious TC completion event for an empty slot. b) Corrupted data being passed up the stack, as a result of premature completion for a newly added task. Rather than add a quirk for affected controllers, ensure tasks are cleared by toggling CQHCI_ENABLE, which would happen anyway if cqhci_clear_all_tasks() timed out. This is simpler and should be safe and effective for all controllers. Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host") Cc: [email protected] Reported-by: Kornel Dulęba <[email protected]> Tested-by: Kornel Dulęba <[email protected]> Co-developed-by: Kornel Dulęba <[email protected]> Signed-off-by: Kornel Dulęba <[email protected]> Signed-off-by: Adrian Hunter <[email protected]> Reviewed-by: Avri Altman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-14mmc: cqhci: Warn of halt or task clear failureAdrian Hunter1-3/+3
A correctly operating controller should successfully halt and clear tasks. Failure may result in errors elsewhere, so promote messages from debug to warnings. Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host") Cc: [email protected] Signed-off-by: Adrian Hunter <[email protected]> Reviewed-by: Avri Altman <[email protected]> Reviewed-by: Avri Altman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-14mmc: block: Retry commands in CQE error recoveryAdrian Hunter1-2/+5
It is important that MMC_CMDQ_TASK_MGMT command to discard the queue is successful because otherwise a subsequent reset might fail to flush the cache first. Retry it and the previous STOP command. Fixes: 72a5af554df8 ("mmc: core: Add support for handling CQE requests") Cc: [email protected] Signed-off-by: Adrian Hunter <[email protected]> Reviewed-by: Avri Altman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-14mmc: block: Be sure to wait while busy in CQE error recoveryAdrian Hunter1-0/+2
STOP command does not guarantee to wait while busy, but subsequent command MMC_CMDQ_TASK_MGMT to discard the queue will fail if the card is busy, so be sure to wait by employing mmc_poll_for_busy(). Fixes: 72a5af554df8 ("mmc: core: Add support for handling CQE requests") Cc: [email protected] Signed-off-by: Adrian Hunter <[email protected]> Reviewed-by: Avri Altman <[email protected]> Reviewed-by: Christian Loehle <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-14mmc: cqhci: Increase recovery halt timeoutAdrian Hunter1-3/+3
Failing to halt complicates the recovery. Additionally, unless the card or controller are stuck, which is expected to be very rare, then the halt should succeed, so it is better to wait. Set a large timeout. Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host") Cc: [email protected] Signed-off-by: Adrian Hunter <[email protected]> Reviewed-by: Avri Altman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-14mmc: block: Do not lose cache flush during CQE error recoveryAdrian Hunter1-0/+2
During CQE error recovery, error-free data commands get requeued if there is any data left to transfer, but non-data commands are completed even though they have not been processed. Requeue them instead. Note the only non-data command is cache flush, which would have resulted in a cache flush being lost if it was queued at the time of CQE recovery. Fixes: 1e8e55b67030 ("mmc: block: Add CQE support") Cc: [email protected] Signed-off-by: Adrian Hunter <[email protected]> Reviewed-by: Avri Altman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-07mmc: sdhci-pci-gli: GL9750: Mask the replay timer timeout of AERVictor Shih1-0/+8
Due to a flaw in the hardware design, the GL9750 replay timer frequently times out when ASPM is enabled. As a result, the warning messages will often appear in the system log when the system accesses the GL9750 PCI config. Therefore, the replay timer timeout must be masked. Fixes: d7133797e9e1 ("mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2") Signed-off-by: Victor Shih <[email protected]> Acked-by: Adrian Hunter <[email protected]> Acked-by: Kai-Heng Feng <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-07mmc: sdhci-pci-gli: GL9755: Mask the replay timer timeout of AERVictor Shih1-0/+8
Due to a flaw in the hardware design, the GL9755 replay timer frequently times out when ASPM is enabled. As a result, the warning messages will often appear in the system log when the system accesses the GL9755 PCI config. Therefore, the replay timer timeout must be masked. Fixes: 36ed2fd32b2c ("mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2") Signed-off-by: Victor Shih <[email protected]> Acked-by: Adrian Hunter <[email protected]> Acked-by: Kai-Heng Feng <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-03Revert "mmc: core: Capture correct oemid-bits for eMMC cards"Dominique Martinet1-1/+1
This reverts commit 84ee19bffc9306128cd0f1c650e89767079efeff. The commit above made quirks with an OEMID fail to be applied, as they were checking card->cid.oemid for the full 16 bits defined in MMC_FIXUP macros but the field would only contain the bottom 8 bits. eMMC v5.1A might have bogus values in OEMID's higher bits so another fix will be made, but it has been decided to revert this until that is ready. Fixes: 84ee19bffc93 ("mmc: core: Capture correct oemid-bits for eMMC cards") Link: https://lkml.kernel.org/r/[email protected] Link: https://lkml.kernel.org/r/CAPDyKFqkKibcXnwjnhc3+W1iJBHLeqQ9BpcZrSwhW2u9K2oUtg@mail.gmail.com Signed-off-by: Dominique Martinet <[email protected]> Cc: [email protected] Cc: Alex Fetters <[email protected]> Reviewed-by: Avri Altman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-03mmc: vub300: fix an error codeDan Carpenter1-0/+1
This error path should return -EINVAL instead of success. Fixes: 88095e7b473a ("mmc: Add new VUB300 USB-to-SD/SDIO/MMC driver") Signed-off-by: Dan Carpenter <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-03mmc: Add quirk MMC_QUIRK_BROKEN_CACHE_FLUSH for Micron eMMC Q2J54ABean Huo4-6/+17
Micron MTFC4GACAJCN eMMC supports cache but requires that flush cache operation be allowed only after a write has occurred. Otherwise, the cache flush command or subsequent commands will time out. Signed-off-by: Bean Huo <[email protected]> Signed-off-by: Rafael Beims <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-11-03mmc: sdhci_am654: fix start loop index for TAP value parsingNitin Yadav1-1/+1
ti,otap-del-sel-legacy/ti,itap-del-sel-legacy passed from DT are currently ignored for all SD/MMC and eMMC modes. Fix this by making start loop index to MMC_TIMING_LEGACY. Fixes: 8ee5fc0e0b3b ("mmc: sdhci_am654: Update OTAPDLY writes") Signed-off-by: Nitin Yadav <[email protected]> Acked-by: Adrian Hunter <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-10-27mmc: Merge branch fixes into nextUlf Hansson1-1/+0
Merge the mmc fixes for v6.6-rc[n] into the next branch, to allow them to get tested together with the new mmc changes that are targeted for v6.7. Signed-off-by: Ulf Hansson <[email protected]>
2023-10-27mmc: meson-gx: Remove setting of CMD_CFG_ERRORRong Chen1-1/+0
For the t7 and older SoC families, the CMD_CFG_ERROR has no effect. Starting from SoC family C3, setting this bit without SG LINK data address will cause the controller to generate an IRQ and stop working. To fix it, don't set the bit CMD_CFG_ERROR anymore. Fixes: 18f92bc02f17 ("mmc: meson-gx: make sure the descriptor is stopped on errors") Signed-off-by: Rong Chen <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2023-10-10mmc: jz4740: Use device_get_match_data()Rob Herring1-10/+5
Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Paul Cercueil <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>