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2013-09-25mmc: dw_mmc: guarantee stop-abort cmd in data errorsSeungwon Jeon1-20/+64
In error cases, DTO interrupt may or may not be generated depending on remained data. Stop/Abort command ensures DTO generation for that situation. Currently if 'stop' field of data is empty, there is no stop/abort command. So, it could hang waiting DTO. This change reinforces these cases. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: fix error handling on response errorSeungwon Jeon1-5/+21
Even if response error is detected in case data command, data transfer is continued. It means that data can live in FIFO. Current handling just breaks out the request when seeing the command error. This causes kernel panic in dw_mci_read_data_pio() [host->data = NULL]. And also, FIFO should be guaranteed to be empty. Unable to handle kernel NULL pointer dereference at virtual address 00000018 <...> [<c02af814>] (dw_mci_read_data_pio+0x68/0x198) from [<c02b04b4>] (dw_mci_interrupt+0x374/0x3a0) [<c02b04b4>] (dw_mci_interrupt+0x374/0x3a0) from [<c006b094>] (handle_irq_event_percpu+0x50/0x194) [<c006b094>] (handle_irq_event_percpu+0x50/0x194) from [<c006b214>] (handle_irq_event+0x3c/0x5c) [<c006b214>] (handle_irq_event+0x3c/0x5c) from [<c006de1c>] (handle_fasteoi_irq+0xa4/0x148) [<c006de1c>] (handle_fasteoi_irq+0xa4/0x148) from [<c006aa88>] (generic_handle_irq+0x20/0x30) [<c006aa88>] (generic_handle_irq+0x20/0x30) from [<c000f154>] (handle_IRQ+0x38/0x90) [<c000f154>] (handle_IRQ+0x38/0x90) from [<c00085bc>] (gic_handle_irq+0x34/0x68) [<c00085bc>] (gic_handle_irq+0x34/0x68) from [<c0011f40>] (__irq_svc+0x40/0x70) Exception stack(0xef0b1c00 to 0xef0b1c48) 1c00: 000eb0cf ffffffff 00001300 c01a7738 ef295e10 0000000a c04df298 ef0b1dc0 1c20: ef295ec0 00000000 00000000 00000006 00000000 ef0b1c48 c02b1274 c01a7764 1c40: 20000113 ffffffff [<c0011f40>] (__irq_svc+0x40/0x70) from [<c01a7764>] (__loop_delay+0x0/0xc) Code: e1a00005 e0891006 e0662004 e12fff33 (e59a3018) ---[ end trace a7043b9ba9aed1db ]--- Kernel panic - not syncing: Fatal exception in interrupt Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: control card read thresholdSeungwon Jeon2-2/+39
Card Read Threshold should be ensured that the card clock does not stop in the middle of a block of data being transferred from the card to the Host. Specially, clock stop is allowed in fast transfer such as HS200 or SDR104 mode. And so, it should be enabled. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: adjust the fifoth with block sizeSeungwon Jeon2-3/+75
This change helps to choose msize, rx_watermark and tx_watermark depending on block size for IDMAC mode. For SDIO block size can be variable, so if these values are set incorrectly, card clock may stop. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: set the supported max/min frequencySeungwon Jeon1-2/+12
Both f_max and f_min will be informed for core layer to request valid clock rate. But current setting from 'host->bus_hz' may not represent the max/min frequency properly. Even if host can actually support high speed than bus_hz, core layer will not request clock rate over bus_hz. Basically, f_max/f_min can be set with the values according to spec. And then host will make its best effort to meet the rate. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: move supports-highspeed of quirks to capsSeungwon Jeon1-6/+3
'supports-highspeed' is not one of the quirks but is a capability. So, it's removed from quirks. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: add the capability to support hs200 modeSeungwon Jeon1-0/+6
As host controller can support eMMC's HS200 mode at 1.8V or 1.2V, these capability will be added. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: exynos: adjust the clock rate with speed modeSeungwon Jeon1-13/+42
Exynos's host has divider logic before 'cclk_in' to controller core. It means that actual clock rate of ciu clock comes from this divider value. So, source clock should be adjusted along with 'ciu_div' which indicates the host's divider ratio. Setting clock rate basically fits the required speed. Specially, 'cclk_in' should have double rate of target speed in case of DDR 8-bit mode. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: exynos: add variable delay tuning sequenceSeungwon Jeon1-0/+124
Implements variable delay tuning. In this change, exynos host can determine the correct sampling point for the HS200 and SDR104 speed mode. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: add support tuning schemeSeungwon Jeon2-37/+108
For the speed modes HS200 and SDR104, tuning is needed to determine the correct sampling point. Actual tuning procedure is provided by specific host controller driver. This patch defines the tuning command and tuning data. Additionally, 'struct dw_mci_slot' is moved to header file to consider the extensive usages in driver. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Alim Akhtar <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: exynos: configure SMU in exynos5420Yuvaraj Kumar C D1-1/+37
Exynos5420 Mobile Storage Host controller has Security Management Unit (SMU) for channel 0 and channel 1 (mainly for eMMC). This time, SMU configuration is set for non-encryption mode. Signed-off-by: Yuvaraj Kumar C D <[email protected]> Signed-off-by: Alim Akhtar <[email protected]> Tested-by: Jaehoon Chung <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: move the platform specific init callYuvaraj Kumar C D2-7/+9
Current platform specific private data initialization call dw_mci_exynos_priv_init() can be used to do platform specific initialization of SMU and others in future. So the drv_data->init call has moved to dw_mci_probe(). Signed-off-by: Yuvaraj Kumar C D <[email protected]> Tested-by: Alim Akhtar <[email protected]> Tested-by: Jaehoon Chung <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: socfpga: move socfpga private initYuvaraj Kumar C D1-16/+14
Currently platform specific private data initialization is done by dw_mci_socfpga_priv_init and dw_mci_socfpga_parse_dt. As we already have separate platform specific device tree parser dw_mci_socfpga_parse_dt, move the dw_mci_socfpga_priv_init code to dw_mci_socfpga_parse_dt. We can use the dw_mci_socfpga_priv_init to do some actual platform specific initialization. Signed-off-by: Yuvaraj Kumar C D <[email protected]> Tested-by: Alim Akhtar <[email protected]> Tested-by: Jaehoon Chung <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: exynos: move the exynos private initYuvaraj Kumar C D1-18/+16
Currently platform specific private data initialization is done by dw_mci_exynos_priv_init and dw_mci_exynos_parse_dt. As we already have separate platform specific device tree parser dw_mci_exynos_parse_dt, move the dw_mci_exynos_priv_init code to dw_mci_exynos_parse_dt. We can use the dw_mci_exynos_priv_init to do some actual platform specific initialization of SMU and etc. Signed-off-by: Yuvaraj Kumar C D <[email protected]> Tested-by: Alim Akhtar <[email protected]> Tested-by: Jaehoon Chung <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: Set timeout to max upon resumeDoug Anderson1-0/+3
The TMOUT register is set to 0xffffffff at probe time but isn't set after suspend/resume. Add an init of this value. No problems were observed without this (it will also be set in __dw_mci_start_request if there is data to send), but it makes the register dump before and after suspend cleaner. Signed-off-by: Doug Anderson <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: Honor requests to set the clock to 0Doug Anderson1-16/+28
Previously the dw_mmc driver would ignore any requests to disable the card's clock. This doesn't seem like a good thing in general, but had one extra bad side effect in the following situation: * mmc core would set clk to 400kHz at boot time while scanning * mmc core would set clk to 0 since no card, but it would be ignored. * suspend to ram and resume; clocks in the dw_mmc IP block are now 0 but dw_mmc thinks that they're 400kHz (it ignored the set to 0). * insert card * mmc core would set clk to 400kHz which would be considered a no-op. Note that if there is no card in the slot and we do a suspend/resume cycle, we _do_ still end up with differences in a dw_mmc register dump, but the differences are clock related and we've got the clock disabled both before and after, so this should be OK. Signed-off-by: Doug Anderson <[email protected]> Signed-off-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: Add exynos resume_noirq callback to clear WAKEUP_INTDoug Anderson1-1/+52
If the WAKEUP_INT is asserted at wakeup and not cleared, we'll end up looping around forever. This has been seen to happen on exynos5420 silicon despite the fact that we haven't enabled any wakeup events due to a silicon errata. It is safe to do on all exynos variants. Signed-off-by: Doug Anderson <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: dw_mmc: don't queue up a card detect at slot startupDoug Anderson1-6/+0
The MMC subsystem handles looking for a card at probe time. Queuing up our own can race with the rest of the MMC subsystem and cause problems if we get unlucky with timing. Just remove driver own detection triggering. While progressing the request from 'mmc_rescan', if 'dw_mci_work_routine_card' routine is activated, it will cancel the current request. The problem case is that 'mmc_rescan' is prior to 'dw_mci_work_routine_card' from host own. Specifically, the following message shows the detection problem in driver's probing. It would get an err -123 (-ENOMEDIUM) during probe. [ 4.216595] dwmmc_exynos 12210000.dwmmc1: Using internal DMA controller. [ 4.395935] dwmmc_exynos 12210000.dwmmc1: Version ID is 250a [ 4.401948] dwmmc_exynos 12210000.dwmmc1: DW MMC controller at irq 108, 64 bit host data width, 64 deep fifo [ 4.424430] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0) [ 4.453975] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0) [ 4.459592] mmc_host mmc1: Bus speed (slot 0) = 100000000Hz (slot req 400000Hz, actual 400000HZ div = 125) [ 4.484258] dwmmc_exynos 12210000.dwmmc1: 1 slots initialized [ 4.485406] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0) [ 4.487606] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0) [ 4.489794] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0) [ 4.509757] mmc1: error -123 whilst initialising SDIO card Signed-off-by: Doug Anderson <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-25mmc: core: remove dead function mmc_try_claim_hostGrant Grundler1-25/+0
cscope says there are no callers for mmc_try_claim_host in the kernel. No reason to keep it. Signed-off-by: Grant Grundler <[email protected]> Acked-by: Ulf Hansson <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-09-21ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> formatGuennadi Liakhovetski1-8/+8
Currently DT compatibility strings of both types can be found in the kernel sources: <unit>-<soc> and <soc>-<unit>, whereas a unique format should be followed and the former one is preferred. This patch converts the SDHI MMC driver and its users to the common standard. This is safe for now, since ATM no real products are using this driver with DT. Signed-off-by: Guennadi Liakhovetski <[email protected]> Acked-by: Chris Ball <[email protected]> [Removed r8a7740.dtsi portion as it is not applicable] Signed-off-by: Simon Horman <[email protected]>
2013-09-19ARM: 7834/1: mmc: mmci: Save and restore register contextUlf Hansson1-0/+43
If a corresponding power domain exists for the device and it manages to cut the domain regulator while the device is runtime suspended, the IP loses it's registers context. We restore the context in the .runtime_resume callback from the existing register caches to adapt to this situation. We also want to make sure the registers are in a known state while restoring context in the case when the power domain did not drop the power, since there are restrictions for the order of writing to these registers. To handle this, we clear the registers in the .runtime_suspend callback. Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Rickard Andersson <[email protected]> Reviewed-by: Daniel Lezcano <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-09-19ARM: 7833/1: mmc: mmci: Adapt to register write restrictionsUlf Hansson1-0/+16
After a write to the MMCICLOCK register data cannot be written to this register for three feedback clock cycles. Writes to the MMCIPOWER register must be separated by three MCLK cycles. Previously no issues has been observered, but using higher ARM clock frequencies on STE- platforms has triggered this problem. The MMCICLOCK register is written to in .set_ios and for some data transmissions for SDIO. We do not need a delay at the data transmission path, because sending and receiving data will require more than three clock cycles. Then we use a simple logic to only delay in .set_ios and thus we don't affect throughput performance. Signed-off-by: Johan Rudholm <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Rickard Andersson <[email protected]> Reviewed-by: Daniel Lezcano <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-09-19ARM: 7832/1: mmc: mmci: Use optional sleep pinctrl stateUlf Hansson1-0/+2
By optionally putting the pins into sleep state in the .runtime_suspend callback we can accomplish two things. One is to minimize current leakage from pins and thus save power, second we can prevent the IP from driving pins output in an uncontrolled manner, which may happen if the power domain drops the domain regulator. When returning from idle, entering .runtime_resume callback, the pins are restored to default state. Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Rickard Andersson <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-09-19ARM: 7831/1: mmc: mmci: Adapt to new pinctrl handlingUlf Hansson2-21/+0
There is no need for every driver to fetch a pinctrl handle and to select the default state. Instead this is handled by the device driver core, thus we can remove this piece of code from mmci. Signed-off-by: Ulf Hansson <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Russell King <[email protected]>
2013-09-13Remove GENERIC_HARDIRQ config optionMartin Schwidefsky1-1/+1
After the last architecture switched to generic hard irqs the config options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code for !CONFIG_GENERIC_HARDIRQS can be removed. Signed-off-by: Martin Schwidefsky <[email protected]>
2013-09-10Merge tag 'mmc-updates-for-3.12-rc1' of ↵Linus Torvalds32-189/+298
git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC updates from Chris Ball: "MMC highlights for 3.12: Core: - Support Allocation Units 8MB-64MB in SD3.0, previous max was 4MB. - The slot-gpio helper can now handle GPIO debouncing card-detect. - Read supported voltages from DT "voltage-ranges" property. Drivers: - dw_mmc: Add support for ARC architecture, and support exynos5420. - mmc_spi: Support CD/RO GPIOs. - sh_mobile_sdhi: Add compatibility for more Renesas SoCs. - sh_mmcif: Add DT support for DMA channels" * tag 'mmc-updates-for-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (50 commits) Revert "mmc: tmio-mmc: Remove .set_pwr() callback from platform data" mmc: dw_mmc: Add support for ARC mmc: sdhci-s3c: initialize host->quirks2 for using quirks2 mmc: sdhci-s3c: fix the wrong register value, when clock is disabled mmc: esdhc: add support to get voltage from device-tree mmc: sdhci: get voltage from sdhc host mmc: core: parse voltage from device-tree mmc: omap_hsmmc: use the generic config for omap2plus devices mmc: omap_hsmmc: clear status flags before starting a new command mmc: dw_mmc: exynos: Add a new compatible string for exynos5420 mmc: sh_mmcif: revision-specific CLK_CTRL2 handling mmc: sh_mmcif: revision-specific Command Completion Signal handling mmc: sh_mmcif: add support for Device Tree DMA bindings mmc: sh_mmcif: move header include from header into .c mmc: SDHI: add DT compatibility strings for further SoCs mmc: dw_mmc-pci: enable bus-mastering mode mmc: dw_mmc-pci: get resources from a proper BAR mmc: tmio-mmc: Remove .set_pwr() callback from platform data mmc: tmio-mmc: Remove .get_cd() callback from platform data mmc: sh_mobile_sdhi: Remove .set_pwr() callback from platform data ...
2013-09-07Merge tag 'mfd-3.12-1' of ↵Linus Torvalds1-19/+51
git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-next Pull MFD (multi-function device) updates from Samuel Ortiz: "For the 3.12 merge window we have one new driver for the DA9063 PMIC from Dialog Semiconductor. Besides that driver we also have: - Device tree support for the s2mps11 driver - More devm_* conversion for the pm8921, max89xx, menelaus, tps65010, wl1273 and pcf50633-adc drivers. - A conversion to threaded IRQ and IRQ domain for the twl6030 driver. - A fairly big update for the rtsx driver: Better power saving support, better vendor settings handling, and a few fixes. - Support for a couple more boards (COMe-bHL6 and COMe-cTH6) for the Kontron driver. - A conversion to the dev_get_platdata() API for all MFD drivers. - A removal of non-DT (legacy) support for the twl6040 driver. - A few fixes and additions (Mic detect level) to the wm5110 register tables. - Regmap support for the davinci_voicecodec driver. - The usual bunch of minor cleanups and janitorial fixes" * tag 'mfd-3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-next: (81 commits) mfd: ucb1x00-core: Rewrite ucb1x00_add_dev() mfd: ab8500-debugfs: Apply a check for -ENOMEM after allocating memory for event name mfd: ab8500-debugfs: Apply a check for -ENOMEM after allocating memory for sysfs mfd: timberdale: Use module_pci_driver mfd: timberdale: Remove redundant break mfd: timberdale: Staticize local variables mfd: ab8500-debugfs: Staticize local variables mfd: db8500-prcmu: Staticize clk_mgt mfd: db8500-prcmu: Use ANSI function declaration mfd: omap-usb-host: Staticize usbhs_driver_name mfd: 88pm805: Fix potential NULL pdata dereference mfd: 88pm800: Fix potential NULL pdata dereference mfd: twl6040: Use regmap for register cache mfd: davinci_voicecodec: Provide a regmap for register I/O mfd: davinci_voicecodec: Remove unused read and write functions mmc: memstick: rtsx: Modify copyright comments mmc: rtsx: Clear SD_CLK toggle enable bit if switching voltage fail mfd: mmc: rtsx: Change default tx phase mfd: pcf50633-adc: Use devm_*() functions mfd: rtsx: Copyright modifications ...
2013-09-06Merge tag 'boards-for-linus' of ↵Linus Torvalds1-9/+9
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC board updates from Olof Johansson: "Board updates for 3.12. Again, a bit of domain overlap with SoC and DT branches, but most of this is around legacy code and board support. We've found that platform maintainers have a hard time separating all of these out and might move towards fewer branches for next release. - Removal of a number of Marvell Kirkwood board files, since contents is now common and mostly configured via DT. - Device-tree updates for Marvell Dove, including irqchip and clocksource setup. - Defconfig updates. Gotta go somewhere. One new one for Renesas Lager. - New backlight drivers for backlights used on Renesas shmobile platforms. - Removal of Renesas leds driver. - Shuffling of some of the new Broadcom platforms to give room for others in the same mach directory. More in 3.13" * tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits) mmc: sdhci-bcm-kona: Staticize sdhci_bcm_kona_card_event mmc: sdhci-bcm-kona: Remove unneeded version.h inclusion ARM: bcm: Make secure API call optional ARM: DT: binding fixup to align with vendor-prefixes.txt (drivers) ARM: mmc: fix NONREMOVABLE test in sdhci-bcm-kona ARM: bcm: Rename board_bcm mmc: sdhci-bcm-kona: make linker-section warning go away ARM: tegra: defconfig updates ARM: dove: add initial DT file for Globalscale D2Plug ARM: dove: add GPIO IR receiver node to SolidRun CuBox ARM: dove: add common pinmux functions to DT ARM: dove: add cpu device tree node ARM: dove: update dove_defconfig with SI5351, PCI, and xHCI arch/arm/mach-kirkwood: Avoid using ARRAY_AND_SIZE(e) as a function argument ARM: kirkwood: fix DT building and update defconfig ARM: kirkwood: Remove all remaining trace of DNS-320/325 platform code ARM: configs: disable DEBUG_LL in bcm_defconfig ARM: bcm281xx: Board specific reboot code ARM bcm281xx: Turn on socket & network support. ARM: bcm281xx: Turn on L2 cache. ...
2013-09-06Revert "mmc: tmio-mmc: Remove .set_pwr() callback from platform data"Chris Ball2-0/+8
This reverts commit 3af9d15c719017feb63fa99f89ac6009a5a3d467, which causes a build failure: drivers/mfd/asic3.c:724:2: error: unknown field 'set_pwr' specified in initializer
2013-08-30mmc: memstick: rtsx: Modify copyright commentsWei WANG1-2/+1
Update copyright date, and remove author address. Signed-off-by: Wei WANG <[email protected]> Acked-by: Chris Ball <[email protected]> Signed-off-by: Samuel Ortiz <[email protected]>
2013-08-30mmc: rtsx: Clear SD_CLK toggle enable bit if switching voltage failWei WANG1-1/+8
If switching voltage fails, SD_CLK toggle enable bit should been cleared so that SD host can control SD clock automatically. Signed-off-by: Wei WANG <[email protected]> Acked-by: Chris Ball <[email protected]> Signed-off-by: Samuel Ortiz <[email protected]>
2013-08-30mfd: mmc: rtsx: Change default tx phaseWei WANG1-16/+42
The default phase can meet most cards' requirement, but it is not the optimal one. In some extreme situation, the rx phase point produced by the following tuning process will drift quite a distance. Before tuning UHS card, this patch will set a more proper initial tx phase point, which is calculated from statistic data, and can achieve a much better tx signal quality. Signed-off-by: Wei WANG <[email protected]> Acked-by: Lee Jones <[email protected]> Acked-by: Chris Ball <[email protected]> Signed-off-by: Samuel Ortiz <[email protected]>
2013-08-29mmc: dw_mmc: Add support for ARCMischa Jonker1-1/+1
Adapt Kconfig to include ARC in supported architectures Signed-off-by: Mischa Jonker <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-29mmc: sdhci-s3c: initialize host->quirks2 for using quirks2Jaehoon Chung1-0/+1
In order to use the quirks2, initialized the host->quirks2. Signed-off-by: Jaehoon Chung <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-29mmc: sdhci-s3c: fix the wrong register value, when clock is disabledJaehoon Chung1-2/+5
When use the QUIRK_NONSTANDARD_CLOCK, then never set to 0 at clock control register. This patch fixes this problem. Signed-off-by: Jaehoon Chung <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-29Merge tag 'bcm-for-3.12-late-soc' of git://github.com/broadcom/bcm11351 into ↵Olof Johansson1-2/+1
next/boards From Christian Daudt, late changes for 3.12 broadcom mmc driver. Small trivial changes so I'll take them through arm-soc. * tag 'bcm-for-3.12-late-soc' of git://github.com/broadcom/bcm11351: mmc: sdhci-bcm-kona: Staticize sdhci_bcm_kona_card_event mmc: sdhci-bcm-kona: Remove unneeded version.h inclusion
2013-08-27mmc: sdhci-bcm-kona: Staticize sdhci_bcm_kona_card_eventSachin Kamat1-1/+1
sdhci_bcm_kona_card_event is referenced only in this file. Make it static. Signed-off-by: Sachin Kamat <[email protected]> Acked-by: Christian Daudt <[email protected]>
2013-08-27mmc: sdhci-bcm-kona: Remove unneeded version.h inclusionSachin Kamat1-1/+0
version.h header inclusion is not necessary as detected by versioncheck. Signed-off-by: Sachin Kamat <[email protected]> Acked-by: Christian Daudt <[email protected]>
2013-08-26mmc: esdhc: add support to get voltage from device-treeHaijun Zhang1-0/+1
Add suppport to get voltage from device-tree node for esdhc host, if voltage-ranges was specified in device-tree node we can get ocr_mask instead of read from host capacity register. If not voltages still can be get from host capacity register. Signed-off-by: Haijun Zhang <[email protected]> Acked-by: Anton Vorontsov <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-26mmc: sdhci: get voltage from sdhc hostHaijun Zhang1-0/+3
We use host->ocr_mask to hold the voltage get from device-tree node, In case host->ocr_mask was available, we use host->ocr_mask as the final available voltage can be used by MMC/SD/SDIO card. Signed-off-by: Haijun Zhang <[email protected]> Reviewed-by: Anton Vorontsov <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-26mmc: core: parse voltage from device-treeHaijun Zhang1-0/+44
Add function to support getting voltage from device-tree. If voltage-range is specified in device-tree node, this function will parse it and return the available voltage mask. Signed-off-by: Haijun Zhang <[email protected]> Acked-by: Anton Vorontsov <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: omap_hsmmc: use the generic config for omap2plus devicesAmarinder Bindra1-3/+3
OMAP's hs_mmc driver is used for MMC controller operation on many omap2plus SoCs (OMAP2430, OMAP3, 4, 5 and AM335x). Considering that the device tree entries are already present for these, allow the driver to be built using the config ARCH_OMAP2PLUS rather than individually adding a config for each SoC to enable the support. Use COMPILE_TEST to enable the build for other platforms. Signed-off-by: Amarinder Bindra <[email protected]> Cc: Ezequiel Garcia <[email protected]> Cc: Nishanth Menon <[email protected]> Acked-by: Felipe Balbi <[email protected]> Acked-by: Balaji T K <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: omap_hsmmc: clear status flags before starting a new commandFrancesco Lavra1-1/+1
Commit 1f6b9fa40e76fffaaa0b3bd6a0bfdcf1cdc06efa consolidated writes to the STAT register in one location, moving them from omap_hsmmc_do_irq() to omap_hsmmc_irq(). This move has the unwanted side effect that the controller status flags are potentially cleared after a new command has been started as a consequence of reading the previous status flags. This means that if the new command changes the status flags before the IRQ routine returns, those flags may be cleared without handling the event which asserted them, and thus missing the event. Move the writing of the STAT register back in omap_hsmmc_do_irq(), before handling the status flags which generated the interrupt. Signed-off-by: Francesco Lavra <[email protected]> Reviewed-and-Tested-by: Balaji T K <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: dw_mmc: exynos: Add a new compatible string for exynos5420Yuvaraj Kumar C D1-1/+8
The Exynos5420 has a DWMMC controller which is different from prior versions.This patch adds a new compatible string for Exynos5420. Signed-off-by: Abhilash Kesavan <[email protected]> Reviewed-by: Alim Akhtar <[email protected]> Signed-off-by: Yuvaraj Kumar C D <[email protected]> Acked-by: Jaehoon Chung <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: sh_mmcif: revision-specific CLK_CTRL2 handlingGuennadi Liakhovetski1-0/+4
Some newer MMCIF IP revisions contain a CE_CLK_CTRL2 register, that has to be set for proper operation. Support for this feature is added in a way to preserve the current behaviour by default, i.e. when it is not enabled in platform data. Patch is based on work by Nobuyuki HIRAI. Signed-off-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: sh_mmcif: revision-specific Command Completion Signal handlingGuennadi Liakhovetski1-6/+21
Some earlier MMCIF IP revisions contained Command Completion Signal support, which has been dropped again in modern versions. Sopport for this feature is added in a way to preserve the current behaviour by default, i.e. when it is not enabled in platform data. Patch is based on work by Nobuyuki HIRAI. Signed-off-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: sh_mmcif: add support for Device Tree DMA bindingsGuennadi Liakhovetski1-10/+16
To use DMA in the Device Tree case the driver has to be modified to use suitable API to obtain DMA channels. Signed-off-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: sh_mmcif: move header include from header into .cGuennadi Liakhovetski1-0/+1
sh_dma.h isn't needed in sh_mmcif.h, move it into sh_mmcif.c. Signed-off-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: SDHI: add DT compatibility strings for further SoCsGuennadi Liakhovetski1-0/+5
Add further OF compatibility strings to the SDHI driver to be able to precisely control driver's behaviour on each of them. Signed-off-by: Guennadi Liakhovetski <[email protected]> Acked-by: Magnus Damm <[email protected]> Acked-by: Simon Horman <[email protected]> Signed-off-by: Chris Ball <[email protected]>
2013-08-25mmc: dw_mmc-pci: enable bus-mastering modeAndy Shevchenko1-0/+2
This patch enables bus-mastering mode for MMC controller to allow IDMAC transfers. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Seungwon Jeon <[email protected]> Tested-by: Prabu Thangamuthu <[email protected]> Signed-off-by: Chris Ball <[email protected]>
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