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path: root/drivers/mailbox/qcom-apcs-ipc-mailbox.c
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2020-08-03mailbox: qcom: Add msm8994 apcs compatibleKonrad Dybcio1-0/+5
MSM8994 has an APCS block similar to 8916, but with a different clock driver due to the former one having 2 clusters. Signed-off-by: Konrad Dybcio <[email protected]> Acked-by: Rob Herring <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2020-08-03mailbox: qcom: Add sdm660 hmss compatibleKonrad Dybcio1-0/+5
The Qualcomm SDM660 platform has a APCS HMSS GLOBAL block, add the compatible for this. Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2020-06-10mailbox: qcom: Add ipq6018 apcs compatibleSivaprakash Murugesan1-0/+5
The Qualcomm ipq6018 has apcs block, add compatible for the same. Also, the ipq6018 apcs provides a clock functionality similar to msm8916 but the clock driver is different. Create a child device based on the apcs compatible for the clock controller functionality. Signed-off-by: Sivaprakash Murugesan <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2020-06-10mailbox: qcom: Add clock driver name in apcs mailbox driver dataSivaprakash Murugesan1-18/+38
Some apcs mailbox devices supports a clock driver, the compatible strings of devices supporting clock driver along with the clock driver name are maintained in a separate structure within the mailbox driver. And the clock driver is added based on device match. With increase in number of devices supporting the clock feature move the clock driver name inside the driver data. so that we can use a single API to get the register offset of mailbox driver and clock driver name together, and the clock driver will be added based on the driver data. Signed-off-by: Sivaprakash Murugesan <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2019-09-17mailbox: qcom-apcs: fix max_register valueJorge Ramirez-Ortiz1-1/+1
The mailbox length is 0x1000 hence the max_register value is 0xFFC. Fixes: c6a8b171ca8e ("mailbox: qcom: Convert APCS IPC driver to use regmap") Signed-off-by: Jorge Ramirez-Ortiz <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2019-09-17mailbox: qcom: Add support for IPQ8074 APCSGokul Sriram Palanisamy1-0/+1
Add support of IPQ8074 with IPC register offset as 8. Signed-off-by: Gokul Sriram Palanisamy <[email protected]> Signed-off-by: Sricharan R <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2019-09-17mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCsSibi Sankar1-0/+2
Add the corresponding APSS shared offset for SM8150 and SC7180 SoCs. Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Sibi Sankar <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2019-09-17mbox: qcom: replace integer with valid macroJorge Ramirez-Ortiz1-1/+2
Use the correct macro when registering the platform device. Co-developed-by: Niklas Cassel <[email protected]> Signed-off-by: Niklas Cassel <[email protected]> Signed-off-by: Jorge Ramirez-Ortiz <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2019-09-17mbox: qcom: add APCS child device for QCS404Jorge Ramirez-Ortiz1-2/+6
There is clock controller functionality in the APCS hardware block of qcs404 devices similar to msm8916. Co-developed-by: Niklas Cassel <[email protected]> Signed-off-by: Niklas Cassel <[email protected]> Signed-off-by: Jorge Ramirez-Ortiz <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284Thomas Gleixner1-9/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 and only version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 294 file(s). Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Allison Randal <[email protected]> Reviewed-by: Alexios Zavras <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-12-21mailbox: qcom-apcs: Use device-managed registration APIThierry Reding1-2/+1
Get rid of some boilerplate driver removal code by using the newly added device-managed registration API. Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Thierry Reding <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2018-09-29mailbox: qcom: Add QCS404 APPS Global compatibleBjorn Andersson1-0/+1
Add support for the QCS404 APPS Global block with IPC register at offset 8. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Vinod Koul <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2018-06-06mailbox: Add support for Qualcomm SDM845 SoCsSibi Sankar1-0/+1
Add the corresponding APSS shared offset for SDM845 SoC Signed-off-by: Sibi Sankar <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2018-06-06mailbox: qcom: Add msm8998 hmss compatibleBjorn Andersson1-0/+1
The Qualcomm MSM8998 platform has a APCS HMSS GLOBAL block, add the compatible for this. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2018-02-04mailbox: qcom: Create APCS child device for clock controllerGeorgi Djakov1-0/+11
There is a clock controller functionality provided by the APCS hardware block of msm8916 devices. The device-tree would represent an APCS node with both mailbox and clock provider properties. Create a platform child device for the clock controller functionality so the driver can probe and use APCS as parent. Signed-off-by: Georgi Djakov <[email protected]> Acked-by: Bjorn Andersson <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2018-02-04mailbox: qcom: Convert APCS IPC driver to use regmapGeorgi Djakov1-5/+19
This hardware block provides more functionalities that just IPC. Convert it to regmap to allow other child platform devices to use the same regmap. Signed-off-by: Georgi Djakov <[email protected]> Acked-by: Bjorn Andersson <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2017-06-14mailbox: Introduce Qualcomm APCS IPC driverBjorn Andersson1-0/+129
This implements a driver that exposes the IPC bits found in the APCS Global block in various Qualcomm platforms. The bits are used to signal inter-processor communication signals from the application CPU to other masters. Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
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