| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2020-07-27 | irqchip/ativic32: Constify irq_domain_ops | Masahiro Yamada | 1 | -1/+1 | |
| This is passed to irq_domain_add_linear(), which accepts a pointer to a const structure. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] | |||||
| 2018-11-06 | nds32: Power management for nds32 | Nick Hu | 1 | -0/+31 | |
| There are three sleep states in nds32: suspend to idle, suspend to standby, suspend to ram In suspend to ram, we use the 'standby' instruction to emulate power management device to hang the system util wakeup source send wakeup events to break the loop. First, we push the general purpose registers and system registers to stack. Second, we translate stack pointer to physical address and store to memory to save the stack pointer. Third, after write back and invalid the cache we hang in 'standby' intruction. When wakeup source trigger wake up events, the loop will be break and resume the system. Signed-off-by: Nick Hu <[email protected]> Acked-by: Pavel Machek <[email protected]> Acked-by: Greentime Hu <[email protected]> Signed-off-by: Greentime Hu <[email protected]> | |||||
| 2018-02-22 | irqchip: Andestech Internal Vector Interrupt Controller driver | Greentime Hu | 1 | -0/+107 | |
| This patch adds the Andestech Internal Vector Interrupt Controller driver. You can find the spec here. Ch4.9 of AndeStar SPA V3 Manual. http://www.andestech.com/product.php?cls=9 Signed-off-by: Rick Chen <[email protected]> Signed-off-by: Greentime Hu <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> | |||||