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2020-11-27coresight-tpiu: Fix W=1 warning in TPIU driverMathieu Poirier1-1/+1
CC drivers/hwtracing/coresight/coresight-etm4x-core.o CC drivers/hwtracing/coresight/coresight-etm4x-sysfs.o CC drivers/hwtracing/coresight/coresight-stm.o drivers/hwtracing/coresight/coresight-tpiu.c:53: warning: Cannot understand * @base: memory mapped base address for this component. on line 53 - I thought it was a doc line CC drivers/hwtracing/coresight/coresight-cpu-debug.o CC drivers/hwtracing/coresight/coresight-catu.o Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: Fix W=1 warnings in core frameworkMathieu Poirier1-1/+7
CC drivers/hwtracing/coresight/coresight-etm4x-sysfs.o CC drivers/hwtracing/coresight/coresight-stm.o drivers/hwtracing/coresight/coresight-core.c:440: warning: Function parameter or member 'csdev' not described in 'coresight_disable_source' drivers/hwtracing/coresight/coresight-core.c:670: warning: Function parameter or member 'csdev' not described in 'coresight_get_ref' drivers/hwtracing/coresight/coresight-core.c:687: warning: Function parameter or member 'csdev' not described in 'coresight_put_ref' drivers/hwtracing/coresight/coresight-core.c:758: warning: Function parameter or member 'sink' not described in '_coresight_build_path' CC drivers/hwtracing/coresight/coresight-cpu-debug.o CC drivers/hwtracing/coresight/coresight-catu.o Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: tmc-etr: Check if page is valid before dma_map_page()Mao Jinlong1-0/+2
alloc_pages_node() return should be checked before calling dma_map_page() to make sure that valid page is mapped or else it can lead to aborts as below: Unable to handle kernel paging request at virtual address ffffffc008000000 Mem abort info: <snip>... pc : __dma_inv_area+0x40/0x58 lr : dma_direct_map_page+0xd8/0x1c8 Call trace: __dma_inv_area tmc_pages_alloc tmc_alloc_data_pages tmc_alloc_sg_table tmc_init_etr_sg_table tmc_alloc_etr_buf tmc_enable_etr_sink_sysfs tmc_enable_etr_sink coresight_enable_path coresight_enable enable_source_store dev_attr_store sysfs_kf_write Fixes: 99443ea19e8b ("coresight: Add generic TMC sg table framework") Cc: [email protected] Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mao Jinlong <[email protected]> Signed-off-by: Sai Prakash Ranjan <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: tmc-etr: Assign boolean values to a bool variableKaixu Xia1-2/+2
Fix the following coccinelle warnings: ./drivers/hwtracing/coresight/coresight-tmc-etr.c:957:2-15: WARNING: Assignment of 0/1 to bool variable Fix them by assigning boolean values. Reported-by: Tosk Robot <[email protected]> Signed-off-by: Kaixu Xia <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: etb10: Fix possible NULL ptr dereference in etb_enable_perf()Sai Prakash Ranjan1-1/+3
There was a report of NULL pointer dereference in ETF enable path for perf CS mode with PID monitoring. It is almost 100% reproducible when the process to monitor is something very active such as chrome and with ETF as the sink, not ETR. But code path shows that ETB has a similar path as ETF, so there could be possible NULL pointer dereference crash in ETB as well. Currently in a bid to find the pid, the owner is dereferenced via task_pid_nr() call in etb_enable_perf() and with owner being NULL, we can get a NULL pointer dereference, so have a similar fix as ETF where we cache PID in alloc_buffer() callback which is called as the part of etm_setup_aux(). Fixes: 75d7dbd38824 ("coresight: etb10: Add support for CPU-wide trace scenarios") Cc: [email protected] Signed-off-by: Sai Prakash Ranjan <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: tmc-etf: Fix NULL ptr dereference in tmc_enable_etf_sink_perf()Sai Prakash Ranjan2-1/+5
There was a report of NULL pointer dereference in ETF enable path for perf CS mode with PID monitoring. It is almost 100% reproducible when the process to monitor is something very active such as chrome and with ETF as the sink and not ETR. Currently in a bid to find the pid, the owner is dereferenced via task_pid_nr() call in tmc_enable_etf_sink_perf() and with owner being NULL, we get a NULL pointer dereference. Looking at the ETR and other places in the kernel, ETF and the ETB are the only places trying to dereference the task(owner) in tmc_enable_etf_sink_perf() which is also called from the sched_in path as in the call trace. Owner(task) is NULL even in the case of ETR in tmc_enable_etr_sink_perf(), but since we cache the PID in alloc_buffer() callback and it is done as part of etm_setup_aux() when allocating buffer for ETR sink, we never dereference this NULL pointer and we are safe. So lets do the same thing with ETF and cache the PID to which the cs_buffer belongs in tmc_alloc_etf_buffer() as done for ETR. This will also remove the unnecessary function calls(task_pid_nr()) since we are caching the PID. Easily reproducible running below: perf record -e cs_etm/@tmc_etf0/ -N -p <pid> Unable to handle kernel NULL pointer dereference at virtual address 0000000000000548 Mem abort info: ESR = 0x96000006 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000006 CM = 0, WnR = 0 <snip>... Call trace: tmc_enable_etf_sink+0xe4/0x280 coresight_enable_path+0x168/0x1fc etm_event_start+0x8c/0xf8 etm_event_add+0x38/0x54 event_sched_in+0x194/0x2ac group_sched_in+0x54/0x12c flexible_sched_in+0xd8/0x120 visit_groups_merge+0x100/0x16c ctx_flexible_sched_in+0x50/0x74 ctx_sched_in+0xa4/0xa8 perf_event_sched_in+0x60/0x6c perf_event_context_sched_in+0x98/0xe0 __perf_event_task_sched_in+0x5c/0xd8 finish_task_switch+0x184/0x1cc schedule_tail+0x20/0xec ret_from_fork+0x4/0x18 Fixes: 880af782c6e8 ("coresight: tmc-etf: Add support for CPU-wide trace scenarios") Cc: [email protected] Signed-off-by: Sai Prakash Ranjan <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: Remove unnecessary THIS_MODULE of funnel and replicator driverQi Liu2-2/+2
As THIS_MODULE has been set in platform_driver_register(), so remove it from static funnel driver and static replicator driver to avoid set it twice. Signed-off-by: Qi Liu <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: etm4x: Handle TRCVIPCSSCTLR accessesSuzuki K Poulose1-4/+7
TRCVIPCSSCTLR is not present if the TRCIDR4.NUMPC > 0. Thus we should only access the register if it is present, preventing any undesired behavior. Cc: [email protected] Signed-off-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: etm4x: Fix accesses to TRCPROCSELRSuzuki K Poulose1-4/+6
TRCPROCSELR is not implemented if the TRCIDR3.NUMPROC == 0. Skip accessing the register in such cases. Cc: [email protected] Cc: Mathieu Poirier <[email protected]> Cc: Mike Leach <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: etm4x: Update TRCIDR3.NUMPROCS handling to match v4.2Suzuki K Poulose1-2/+7
Since ETMv4.2, TRCIDR3.NUMPROCS has been extended to a 5bit field by encoding the top 2 bits[4:3] in TRCIDR3.[13:12], which were RES0. Fix the driver to compute the field correctly for ETMv4.2+ Cc: Mike Leach <[email protected]> Cc: Mathieu Poirier <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: etm4x: Fix accesses to TRCCIDCTLR1Suzuki K Poulose1-3/+6
The TRCCIDCTLR1 is only implemented if TRCIDR4.NUMCIDC > 4. Don't touch the register if it is not implemented. Cc: [email protected] Cc: Mathieu Poirier <[email protected]> Cc: Mike Leach <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: etm4x: Fix accesses to TRCVMIDCTLR1Suzuki K Poulose1-3/+6
TRCVMIDCTRL1 is only implemented only if the TRCIDR4.NUMVMIDC > 4. We must not touch the register otherwise. Cc: [email protected] Cc: Mathieu Poirier <[email protected]> Cc: Mike Leach <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: core: Remove unneeded semicolonZou Wei1-1/+1
Fixes coccicheck warning: ./drivers/hwtracing/coresight/coresight-core.c:421:4-5: Unneeded semicolon Reported-by: Hulk Robot <[email protected]> Signed-off-by: Zou Wei <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-11-27coresight: etm4x: Skip setting LPOVERRIDE bit for qcom, skip-power-upSai Prakash Ranjan1-1/+1
There is a bug on the systems supporting to skip power up (qcom,skip-power-up) where setting LPOVERRIDE bit(low-power state override behaviour) will result in CPU hangs/lockups even on the implementations which supports it. So skip setting the LPOVERRIDE bit for such platforms. Fixes: 02510a5aa78d ("coresight: etm4x: Add support to skip trace unit power up") Cc: [email protected] Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Sai Prakash Ranjan <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-29coresight: cti: Initialize dynamic sysfs attributesSuzuki K Poulose1-0/+7
With LOCKDEP enabled, CTI driver triggers the following splat due to uninitialized lock class for dynamically allocated attribute objects. [ 5.372901] coresight etm0: CPU0: ETM v4.0 initialized [ 5.376694] coresight etm1: CPU1: ETM v4.0 initialized [ 5.380785] coresight etm2: CPU2: ETM v4.0 initialized [ 5.385851] coresight etm3: CPU3: ETM v4.0 initialized [ 5.389808] BUG: key ffff00000564a798 has not been registered! [ 5.392456] ------------[ cut here ]------------ [ 5.398195] DEBUG_LOCKS_WARN_ON(1) [ 5.398233] WARNING: CPU: 1 PID: 32 at kernel/locking/lockdep.c:4623 lockdep_init_map_waits+0x14c/0x260 [ 5.406149] Modules linked in: [ 5.415411] CPU: 1 PID: 32 Comm: kworker/1:1 Not tainted 5.9.0-12034-gbbe85027ce80 #51 [ 5.418553] Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT) [ 5.426453] Workqueue: events amba_deferred_retry_func [ 5.433299] pstate: 40000005 (nZcv daif -PAN -UAO -TCO BTYPE=--) [ 5.438252] pc : lockdep_init_map_waits+0x14c/0x260 [ 5.444410] lr : lockdep_init_map_waits+0x14c/0x260 [ 5.449007] sp : ffff800012bbb720 ... [ 5.531561] Call trace: [ 5.536847] lockdep_init_map_waits+0x14c/0x260 [ 5.539027] __kernfs_create_file+0xa8/0x1c8 [ 5.543539] sysfs_add_file_mode_ns+0xd0/0x208 [ 5.548054] internal_create_group+0x118/0x3c8 [ 5.552307] internal_create_groups+0x58/0xb8 [ 5.556733] sysfs_create_groups+0x2c/0x38 [ 5.561160] device_add+0x2d8/0x768 [ 5.565148] device_register+0x28/0x38 [ 5.568537] coresight_register+0xf8/0x320 [ 5.572358] cti_probe+0x1b0/0x3f0 ... Fix this by initializing the attributes when they are allocated. Fixes: 3c5597e39812 ("coresight: cti: Add connection information to sysfs") Reported-by: Leo Yan <[email protected]> Tested-by: Leo Yan <[email protected]> Cc: Mike Leach <[email protected]> Cc: Mathieu Poirier <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Cc: stable <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-29coresight: Fix uninitialised pointer bug in etm_setup_aux()Mike Leach1-1/+1
Commit [bb1860efc817] changed the sink handling code introducing an uninitialised pointer bug. This results in the default sink selection failing. Prior to commit: static void etm_setup_aux(...) <snip> struct coresight_device *sink; <snip> /* First get the selected sink from user space. */ if (event->attr.config2) { id = (u32)event->attr.config2; sink = coresight_get_sink_by_id(id); } else { sink = coresight_get_enabled_sink(true); } <ctd> *sink always initialised - possibly to NULL which triggers the automatic sink selection. After commit: static void etm_setup_aux(...) <snip> struct coresight_device *sink; <snip> /* First get the selected sink from user space. */ if (event->attr.config2) { id = (u32)event->attr.config2; sink = coresight_get_sink_by_id(id); } <ctd> *sink pointer uninitialised when not providing a sink on the perf command line. This breaks later checks to enable automatic sink selection. Fixes: bb1860efc817 ("coresight: etm: perf: Sink selection using sysfs is deprecated") Signed-off-by: Mike Leach <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-29coresight: add module licenseArnd Bergmann1-0/+1
When built as a loadable module, coresight now causes a warning about missing license information. WARNING: modpost: missing MODULE_LICENSE() in drivers/hwtracing/coresight/coresight.o Fixes: 8e264c52e1da ("coresight: core: Allow the coresight core driver to be built as a module") Signed-off-by: Arnd Bergmann <[email protected]> Cc: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-05intel_th: pci: Add Alder Lake CPU supportAlexander Shishkin1-0/+5
This adds support for the Trace Hub in Alder Lake CPU. Signed-off-by: Alexander Shishkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-05intel_th: pci: Add Alder Lake-S supportAlexander Shishkin1-0/+5
This adds support for the Trace Hub in Alder Lake-S. Signed-off-by: Alexander Shishkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-05stm class: ftrace: Use different channel accroding to CPUTingwei Zhang1-1/+4
To avoid mixup of packets from differnt ftrace packets simultaneously, use different channel for packets from different CPU. Reviewed-by: Steven Rostedt (VMware) <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Alexander Shishkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-05stm class: ftrace: Enable supported trace export flagTingwei Zhang1-0/+2
Set flags for trace_export. Export function trace, event trace and trace marker to stm. Reviewed-by: Steven Rostedt (VMware) <[email protected]> Reviewed-by: Alexander Shishkin <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Alexander Shishkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-10-05stm class: ftrace: Change dependency to TRACINGTingwei Zhang1-1/+1
We will support copying event trace to STM. Change STM_SOURCE_FTRACE to depend on TRACING since we will support multiple tracers. Reviewed-by: Steven Rostedt (VMware) <[email protected]> Reviewed-by: Alexander Shishkin <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Alexander Shishkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 registerSai Prakash Ranjan1-2/+2
In commit f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states"), mistakenly TRCVMIDCCTLR1 register value was saved in trcvmidcctlr0 state variable which is used to store TRCVMIDCCTLR0 register value in etm4x_cpu_save() and then same value is written back to both TRCVMIDCCTLR0 and TRCVMIDCCTLR1 in etm4x_cpu_restore(). There is already a trcvmidcctlr1 state variable available for TRCVMIDCCTLR1, so use it. Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states") Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Sai Prakash Ranjan <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: core: Allow the coresight core driver to be built as a moduleTingwei Zhang5-15/+48
Enhance coresight developer's efficiency to debug coresight drivers. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight by the Makefile - modules can have only one init/exit, so we add the etm_perf register/unregister function calls to the core init/exit functions. - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: catu: Allow catu drivers to be built as modulesTingwei Zhang2-1/+19
Allow to build coresight-catu as modules, for ease of development. - Kconfig becomes a tristate, to allow =m - add catu_remove functions, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Reviewed-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: tmc-etr: Add function to register catu opsMian Yousaf Kaukab4-6/+36
Make etr_catu_buf_ops static. Instead of directly accessing it in etr_buf_ops[], add a function to let catu driver register the ops at runtime. Break circular dependency between tmc-etr and catu drivers. Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mian Yousaf Kaukab <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cti: Allow cti to be built as a moduleTingwei Zhang5-5/+28
Allow to build coresight-cti as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-cti by the Makefile - add an cti_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot - move cti_remove_conn_xrefs to cti_remove since all sysfs links have gone when system calls device_release. Reviewed-by Mike Leach <[email protected]> Tested-by: Mike Leach <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cti: Increase reference count when enabling ctiTingwei Zhang1-3/+14
CTI device is enabled when associated coresight device is enabled. Increase the module and device reference count for CTI device when it's enabled. This can prevent CTI device be removed or module be unloaded when CTI device is enabled by an active trace session. Signed-off-by: Mike Leach <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cti: Don't disable ect device if it's not enabledTingwei Zhang1-3/+8
If associated ect device is not enabled at first place, disable routine should not be called. Add ect_enabled flag to check whether ect device is enabled. Fix the issue in below case. Ect device is not available when associated coresight device enabled and the association is established after coresight device is enabled. Signed-off-by: Mike Leach <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cti: Fix bug clearing sysfs links on callbackMike Leach2-3/+3
During module unload, a coresight driver module will call back into the CTI driver to remove any links between the two devices. The current code has 2 issues:- 1) in the CTI driver the matching code is matching to the wrong device so misses all the links. 2) The callback is called too late in the unload process resulting in a crash. This fixes both the issues. Fixes: 177af8285b59 ("coresight: cti: Enable CTI associated with devices") Reported-by: Tingwei Zhang <[email protected]> Acked-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mike Leach <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cti: Fix remove sysfs link errorMike Leach1-3/+6
CTI code to remove sysfs link to other devices on shutdown, incorrectly tries to remove a single ended link when these are all double ended. This implementation leaves elements in the link info structure undefined which results in a crash in recent tests for driver module unload. This patch corrects the link removal code. Fixes: 73274abb6557 ("coresight: cti: Add in sysfs links to other coresight devices") Reported-by: Tingwei Zhang <[email protected]> Signed-off-by: Mike Leach <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cti: Add function to register cti associate opsTingwei Zhang3-16/+55
Add static cti_assoc_ops to coresight core driver. Let cti driver register the add_assoc and remove_assoc call back. Avoid coresight core driver to depend on cti driver. Tested-by: Mike Leach <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: replicator: Allow replicator driver to be built as moduleKim Phillips2-3/+67
Allow to build coresight-replicator as modules, for ease of development. - Kconfig becomes a tristate, to allow =m - combine static and dynamic replicator init into single module_init/exit call - add replicator_remove functions, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Co-developed-by: Mian Yousaf Kaukab <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Mian Yousaf Kaukab <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: funnel: Allow funnel driver to be built as moduleKim Phillips1-2/+63
Allow to build coresight-funnel as module, for ease of development. - combine static and dynamic funnel init into single module_init/exit call - add funnel_remove functions, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Co-developed-by: Mian Yousaf Kaukab <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mian Yousaf Kaukab <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: tmc: Allow tmc to be built as a moduleKim Phillips3-5/+32
Allow to build coresight-tmc as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-tmc by the Makefile - add an tmc_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: tpiu: Allow tpiu to be built as a moduleKim Phillips2-2/+23
Allow to build coresight-tpiu as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - add a tpiu_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Reviewed-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: etb: Allow etb to be built as a moduleKim Phillips2-2/+29
Allow to build coresight-etb10 as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - add an etb_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: etm4x: Allow etm4x to be built as a moduleKim Phillips3-24/+69
Allow to build coresight-etm4x as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-etm4x by the Makefile - add an etm4_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot - delay advertising the per-cpu etmdrvdata - protect etmdrvdata[] by modifying it on relevant CPU Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: etm3x: Allow etm3x to be built as a moduleKim Phillips3-42/+122
Allow to build coresight-etm3x as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-etm3x by the Makefile - add an etm_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot - delay advertising the per-cpu etmdrvdata - protect etmdrvdata[] by modifying it on relevant CPU Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: etm: perf: Fix warning caused by etm_setup_aux failureTingwei Zhang1-2/+2
When coresight_build_path() fails on all the cpus, etm_setup_aux calls etm_free_aux() to free allocated event_data. WARN_ON(cpumask_empty(mask) will be triggered since cpu mask is empty. Check event_data->snk_config is not NULL first to avoid this warning. Fixes: f5200aa9831f38 ("coresight: perf: Refactor function free_event_data()") Reviewed-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: stm: Allow to build coresight-stm as a moduleTingwei Zhang2-2/+23
- Kconfig becomes a tristate, to allow =m - add a stm_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: Add try_get_module() in coresight_grab_device()Tingwei Zhang1-7/+53
When coresight device is in an active session, driver module of that device should not be removed. Use try_get_module() in coresight_grab_device() to prevent module to be unloaded. Use get_device()/put_device() to protect device data in the middle of active session. Suggested-by: Suzuki K Poulose <[email protected]> Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: Export global symbolsMian Yousaf Kaukab4-0/+17
Export symbols used among coresight modules. Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mian Yousaf Kaukab <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: Add coresight prefix to barrier_pktTingwei Zhang4-7/+6
Add coresight prefix to make it specific. It will be a export symbol. Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Mian Yousaf Kaukab <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: Use IS_ENABLED for CONFIGs that may be modulesKim Phillips2-2/+2
Checking for ifdef CONFIG_x fails if CONFIG_x=m. Use IS_ENABLED that is true for both built-ins and modules, instead. Required when building coresight components as modules. Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Randy Dunlap <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Russell King <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cpu_debug: Define MODULE_DEVICE_TABLETingwei Zhang1-0/+2
Define a MODULE_DEVICE_TABLE for cpu_debug so module can be auto loaded on boot. Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-28coresight: cpu_debug: Add module name in KconfigTingwei Zhang1-0/+3
Provide name of cpu_debug module in Kconfig help section. Tested-by: Mike Leach <[email protected]> Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Tingwei Zhang <[email protected]> Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-17coresight: etm4x: Fix number of resources check for ETM 4.3 and aboveMike Leach2-1/+10
The initialisation code checks TRCIDR4 to determine the number of resource selectors available on the system. Since ETM v 4.3, the value 0 has a different meaning. This patch takes into account this change. Signed-off-by: Mike Leach <[email protected]> [Removed '.' in patch title, added stable] Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-17coresight: etm4x: Fix mis-usage of nr_resource in sysfs interfaceJonathan Zhou1-3/+6
The member @nr_resource represents how many resource selector pairs, and the pair 0 is always implemented and reserved. So let's multiply by 2 when resetting the selector configuration. And also update the validation of the input @idx. Cc: Mathieu Poirier <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Mike Leach <[email protected]> Cc: Shaokun Zhang <[email protected]> Signed-off-by: Jonathan Zhou <[email protected]> [Fixed typographical error in changelog, added stable] Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-09-17coresight: Make sysfs functional on topologies with per core sinkLinu Cherian2-36/+29
Coresight driver assumes sink is common across all the ETMs, and tries to build a path between ETM and the first enabled sink found using bus based search. This breaks sysFS usage on implementations that has multiple per core sinks in enabled state. To fix this, coresight_get_enabled_sink API is updated to do a connection based search starting from the given source, instead of bus based search. With sink selection using sysfs depecrated for perf interface, provision for reset is removed as well in this API. Signed-off-by: Linu Cherian <[email protected]> [Fixed indentation problem and removed obsolete comment] Signed-off-by: Mathieu Poirier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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