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2023-11-29drm/amd/display: replay: Augment Frameupdate CommandMax Tseng4-3/+61
[Why] Sending certain Frameupdate number for Replay Power Evaluation Reviewed-by: Dennis Chan <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Max Tseng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Increase num voltage states to 40Alvin Lee1-1/+1
[Description] If during driver init stage there are greater than 20 intermediary voltage states while constructing the SOC BB we could hit issues because we will index outside of the clock_limits array and start overwriting data. Increase the total number of states to 40 to avoid this issue. Cc: [email protected] # 6.1+ Reviewed-by: Samson Tam <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Do not read DPREFCLK spread info from LUT on DCN35Michael Strauss1-22/+0
[WHY] Currently DCN35 does not spread DPREFCLK [HOW] Remove hardcoded table with nonzero caps Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: replay: generalize the send command function usageMax Tseng6-6/+16
Augment the function to allow send different format data in different use case. Reviewed-by: Dennis Chan <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Max Tseng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Refactor DSC into component folderBhuvana Chandra Pinninti9-3/+28
[why] To refactor DSC and make DSC files unit testable. [how] moved the dcnxx_dsc.c and .h files into corresponding dcn folders inside the dsc and cleared the linkage errors. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Bhuvana Chandra Pinninti <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Use DRAM speed from validation for dummy p-stateAlvin Lee1-1/+2
[Description] When choosing which dummy p-state latency to use, we need to use the DRAM speed from validation. The DRAMSpeed DML variable can change because we use different input params to DML when populating watermarks set B. Cc: [email protected] # 6.1+ Reviewed-by: Samson Tam <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Fix MPCC 1DLUT programmingIlya Bakoulin1-4/+2
[Why] Wrong function is used to translate LUT values to HW format, leading to visible artifacting in some cases. [How] Use the correct cm3_helper function. Cc: [email protected] # 6.1+ Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Feed SR and Z8 watermarks into DML2 for DCN35Nicholas Kazlauskas1-0/+9
[Why] We've updated the table but the values aren't being reflected in DML2 calculation. [How] Pass them into the bbox overrides. Reviewed-by: Jun Lei <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amdgpu: Force order between a read and write to the same addressAlex Sierra2-0/+10
Setting register to force ordering to prevent read/write or write/read hazards for un-cached modes. Signed-off-by: Alex Sierra <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amdgpu: Do not issue gpu reset from nbio v7_9 bif interruptHawking Zhang1-5/+0
In nbio v7_9, host driver should not issu gpu reset Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Stanley Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Add Z8 watermarks for DML2 bbox overridesNicholas Kazlauskas2-15/+34
[Why] We can override SR watermarks but not Z8 ones. [How] Add new parameters for Z8 matching the SR ones and feed them into the states. These also weren't being applied to every state, so make sure that we loop over and update all SOC states if given an override. Reviewed-by: Jun Lei <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: always use mpc factor of 2 for stereo timingsWenjing Liu3-10/+20
[why] In the new pipe resource management logic, the special handling for stereo timings is missing. This commit implements the same stereo timings handling as old pipe resource management code. Reviewed-by: Chaitanya Dhere <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: update pixel clock params after stream slice count change ↵Wenjing Liu7-14/+21
in context [why] When ODM slice count is changed, otg master pipe's pixel clock params is no longer valid as the value is dependent on ODM slice count. Reviewed-by: Chaitanya Dhere <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amdgpu: optimize RLC powerdown notification on VangoghPerry Yuan8-3/+43
The smu needs to get the rlc power down message to sync the rlc state with smu, the rlc state updating message need to be sent at while smu begin suspend sequence , otherwise SMU will crash while RLC state is not notified by driver, and rlc state probally changed after that notification, so it needs to notify rlc state to smu at the end of the suspend sequence in amdgpu_device_suspend() that can make sure the rlc state is correctly set to SMU. [ 101.000590] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 101.000598] amdgpu 0000:03:00.0: amdgpu: Failed to disable gfxoff! [ 110.838026] amdgpu 0000:03:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x0000001E SMN_C2PMSG_82:0x00000000 [ 110.838035] amdgpu 0000:03:00.0: amdgpu: Failed to disable smu features. [ 110.838039] amdgpu 0000:03:00.0: amdgpu: Fail to disable dpm features! [ 110.838040] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62 [ 110.884394] PM: suspend of devices aborted after 21213.620 msecs [ 110.884402] PM: start suspend of devices aborted after 21213.882 msecs [ 110.884405] PM: Some devices failed to suspend, or early wake event detected Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Perry Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amdgpu: Retire query/reset_ras_err_status from gfx_v9_4_3Hawking Zhang1-156/+0
Not needed anymore. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Stanley Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: fix a pipe mapping error in dcn32_fpuWenjing Liu1-8/+12
[why] In dcn32 DML pipes are ordered the same as dc pipes but only for used pipes. For example, if dc pipe 1 and 2 are used, their dml pipe indices would be 0 and 1 respectively. However update_pipe_slice_table_with_split_flags doesn't skip indices for free pipes. This causes us to not reference correct dml pipe output when building pipe topology. [how] Use two variables to iterate dc and dml pipes respectively and only increment dml pipe index when current dc pipe is not free. Cc: [email protected] # 6.1+ Reviewed-by: Chaitanya Dhere <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: add skip_implict_edp_power_control flag for dce110Ian Chen1-1/+2
If the link requests to skip implicit eDP power control, we should honor that request. Reviewed-by: Robin Chen <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Ian Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Update DCN35 watermarksNicholas Kazlauskas2-20/+20
[Why & How] Update to the new values per HW team request. Affects both stutter and z8. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amdgpu: update xgmi num links info post gc9.4.2Jonathan Kim1-1/+1
GC IP 9.4.2 and up support TA reporting of the number of xGMI links between peers. Tested-by: Vignesh Chander <[email protected]> Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Mukul Joshi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amdkfd: Copy HW exception data to user eventDavid Yat Sin1-0/+4
Fixes issue where user events of type KFD_EVENT_TYPE_HW_EXCEPTION do not have valid data Signed-off-by: David Yat Sin <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Add z-state support policy for dcn35Nicholas Kazlauskas4-0/+44
[Why] DML2 means that the dcn3x policy for calculating z-state support no longer runs from validate_bandwidth. This means we are unconditionally allowing Z8, the hardware default. [How] Port the policy over to DCN35, but with a few modifications: - Don't use min_dst_y_next_start as a check for Z8/Z10 allow - Add support for overriding the Z10 stutter period per ASIC - Cleanup the code to make the policy assignment more clear Reviewed-by: Charlene Liu <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Include udelay when waiting for INBOX0 ACKAlvin Lee1-0/+1
When waiting for the ACK for INBOX0 message, we have to ensure to include the udelay for proper wait time Cc: [email protected] # 6.1+ Reviewed-by: Samson Tam <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Add new Replay command and Disabled Replay Timing ResyncDennis Chan6-0/+44
[why] To support dynamic switching for Replay timing sync mechanism. Reviewed-by: ChunTao Tso <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Dennis Chan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/pm: Add sysfs attribute to get pm metricsLijo Lazar1-0/+40
Add sysfs attribute to read power management metrics. A snapshot is captured to the buffer when the attribute is read. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/pm: Add pm metrics support to SMU v13.0.6Lijo Lazar1-0/+47
Add support to fetch PM metrics sample from SMU v13.0.6 Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/pm: Add support to fetch pm metrics sampleLijo Lazar6-1/+57
Add API support to fetch a snapshot of power management metrics from PMFW. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Remove redundant DRM device struct in amdgpu_dm_, mst_types.cSrinivasan Shanmugam2-8/+4
Declaration of 'struct drm_device *dev' is redundant, as 'connector->dev' & 'dev_get_drvdata(kdev)' can be directly passed to 'drm_to_adev', without any intermediate DRM device 'dev' variable Cc: Roman Li <[email protected]> Cc: Hamza Mahfooz <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd: Document device reset methodsAndré Almeida1-0/+25
Document what each amdgpu driver reset method does. Signed-off-by: André Almeida <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/i915/display: Fix IP version of the WAsBalasubramani Vivekanandan1-3/+3
WAs 14011508470, 14011503030 were applied on IP versions beyond which they are applicable. Fixed the IP version checks for these workarounds. Signed-off-by: Balasubramani Vivekanandan <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29drm/i915: correct the input parameter on _intel_dsb_commit()heminhong1-1/+1
Current, the dewake_scanline variable is defined as unsigned int, an unsigned int variable that is always greater than or equal to 0. when _intel_dsb_commit function is called by intel_dsb_commit function, the dewake_scanline variable may have an int value. So the dewake_scanline variable is necessary to defined as an int. Fixes: f83b94d23770 ("drm/i915/dsb: Use DEwake to combat PkgC latency") Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Cc: Ville Syrjälä <[email protected]> Cc: Uma Shankar <[email protected]> Signed-off-by: heminhong <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29drm/i915/irq: Improve error logging for unexpected DE Misc interruptsRahul Rameshbabu1-1/+1
Dump the iir value in hex when the interrupt is unexpected. Link: https://gitlab.freedesktop.org/drm/intel/-/issues/9652#note_2178501 Cc: Jani Nikula <[email protected]> Signed-off-by: Rahul Rameshbabu <[email protected]> Reviewed-by: Chaitanya Kumar Borah <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29drm/panel: nt36523: fix return value check in nt36523_probe()Yang Yingliang1-2/+2
mipi_dsi_device_register_full() never returns NULL pointer, it will return ERR_PTR() when it fails, so replace the check with IS_ERR(). Fixes: 0993234a0045 ("drm/panel: Add driver for Novatek NT36523") Signed-off-by: Yang Yingliang <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29drm/panel: starry-2081101qfh032011-53g: Fine tune the panel power sequencexiazhengqiao1-0/+1
For the "starry, 2081101qfh032011-53g" panel, it is stipulated in the panel spec that MIPI needs to keep the LP11 state before the lcm_reset pin is pulled high. Fixes: 6069b66cd962 ("drm/panel: support for STARRY 2081101QFH032011-53G MIPI-DSI panel") Signed-off-by: xiazhengqiao <[email protected]> Reviewed-by: Jessica Zhang <[email protected]> Link: https://lore.kernel.org/r/20231129084115.7918-1-xiazhengqiao@huaqin.corp-partner.google.com Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20231129084115.7918-1-xiazhengqiao@huaqin.corp-partner.google.com
2023-11-29drm/i915: Clean up some DISPLAY_VER checksVille Syrjälä10-21/+22
Use the >= and < operators for the DISPLAY_VER checks everywhere. This is what most of the code does, but especially recently random pieces of code have started doing this differently for no good reason. Conversion done with the following cocci: @find@ expression i915; constant ver; @@ ( DISPLAY_VER(i915) <= ver | DISPLAY_VER(i915) > ver ) @script:python inc@ old_ver << find.ver; new_ver; @@ coccinelle.new_ver = str(int(old_ver) + 1) @@ expression find.i915; constant find.ver; identifier inc.new_ver; @@ ( - DISPLAY_VER(i915) <= ver + DISPLAY_VER(i915) < new_ver | - DISPLAY_VER(i915) > ver + DISPLAY_VER(i915) >= new_ver ) Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-11-29drm/i915/mst: Reject modes that require the bigjoinerVille Syrjälä1-0/+4
We have no bigjoiner support in the MST code, so .mode_valid() pretending otherwise is just going to result black screens for users. Reject any mode that needs the joiner. Cc: [email protected] Cc: Stanislav Lisovskiy <[email protected]> Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-11-29drm/i915/mst: Fix .mode_valid_ctx() return valuesVille Syrjälä1-4/+8
.mode_valid_ctx() returns an errno, not the mode status. Fix the code to do the right thing. Cc: [email protected] Cc: Stanislav Lisovskiy <[email protected]> Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-11-29drm/i915: Skip some timing checks on BXT/GLK DSI transcodersVille Syrjälä12-3/+79
Apparently some BXT/GLK systems have DSI panels whose timings don't agree with the normal cpu transcoder hblank>=32 limitation. This is perhaps fine as there are no specific hblank/etc. limits listed for the BXT/GLK DSI transcoders. Move those checks out from the global intel_mode_valid() into into connector specific .mode_valid() hooks, skipping BXT/GLK DSI connectors. We'll leave the basic [hv]display/[hv]total checks in intel_mode_valid() as those seem like sensible upper limits regardless of the transcoder used. Cc: [email protected] Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9720 Fixes: 8f4b1068e7fc ("drm/i915: Check some transcoder timing minimum limits") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-11-29drm/i915/psr: Include some basic PSR information in the state dumpVille Syrjälä1-0/+6
Currently no one can figure out what the PSR code is doing since we're including any of it in the basic state dump. Add at least the bare minimum there. v2: Also dump has_panel_replay (Jouni) Cc: Jouni Högander <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jouni Högander <[email protected]>
2023-11-29drm/bridge: anx7625: Fix Set HPD irq detect window to 2msXin Ji2-15/+40
Polling firmware HPD GPIO status, set HPD irq detect window to 2ms after firmware HPD GPIO initial done Signed-off-by: Xin Ji <[email protected]> Reviewed-by: Robert Foss <[email protected]> Signed-off-by: Robert Foss <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29Revert "drm/bridge: Add 200ms delay to wait FW HPD status stable"Xin Ji1-3/+0
This reverts commit 330140d7319fcc4ec68bd924ea212e476bf12275 200ms delay will cause panel display image later than backlight turn on, revert this patch. Fixes: 330140d7319fcc ("drm/bridge: Add 200ms delay to wait FW HPD status stable") Signed-off-by: Xin Ji <[email protected]> Reviewed-by: Robert Foss <[email protected]> Signed-off-by: Robert Foss <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29drm/i915/xe2lpd: remove the FBC restriction if PSR2 is enabledVinod Govindapillai1-1/+1
In earlier versions, FBC was restricted if PSR2 is enabled. From xe2lpd onwards no such restrictions are needed anymore. HSD: 14014305387 Signed-off-by: Vinod Govindapillai <[email protected]> Reviewed-by: Mika Kahola <[email protected]> Signed-off-by: Mika Kahola <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29drm/i915: Call intel_pre_plane_updates() also for pipes getting enabledVille Syrjälä1-1/+2
We used to call intel_pre_plane_updates() for any pipe going through a modeset whether the pipe was previously enabled or not. This in fact needed to apply all the necessary clock gating workarounds/etc. Restore the correct behaviour. Fixes: 39919997322f ("drm/i915: Disable all planes before modesetting any pipes") Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit e0d5ce11ed0a21bb2bf328ad82fd261783c7ad88) Signed-off-by: Jani Nikula <[email protected]>
2023-11-29drm/i915: Also check for VGA converter in eDP probeVille Syrjälä1-6/+22
Unfortunately even the HPD based detection added in commit cfe5bdfb27fa ("drm/i915: Check HPD live state during eDP probe") fails to detect that the VBT's eDP/DDI-A is a ghost on Asus B360M-A (CFL+CNP). On that board eDP/DDI-A has its HPD asserted despite nothing being actually connected there :( The straps/fuses also indicate that the eDP port is present. So if one boots with a VGA monitor connected the eDP probe will mistake the DP->VGA converter hooked to DDI-E for an eDP panel on DDI-A. As a last resort check what kind of DP device we've detected, and if it looks like a DP->VGA converter then conclude that the eDP port should be ignored. Cc: [email protected] Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9636 Fixes: cfe5bdfb27fa ("drm/i915: Check HPD live state during eDP probe") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]> (cherry picked from commit fcd479a79120bf0cd507d85f898297a3b868dda6) Signed-off-by: Jani Nikula <[email protected]>
2023-11-29drm/i915/gsc: Mark internal GSC engine with reserved uabi classTvrtko Ursulin1-17/+22
The GSC CS is not exposed to the user, so we skipped assigning a uabi class number for it. However, the trace logs use the uabi class and instance to identify the engine, so leaving uabi class unset makes the GSC CS show up as the RCS in those logs. Given that the engine is not exposed to the user, we can't add a new case in the uabi enum, so we insted internally define a kernel internal class as -1. At the same time remove special handling for the name and complete the uabi_classes array so internal class is automatically correctly assigned. Engine will show as 65535:0 other0 in the logs/traces which should be unique enough. v2: * Fix uabi class u8 vs u16 type confusion. Signed-off-by: Tvrtko Ursulin <[email protected]> Fixes: 194babe26bdc ("drm/i915/mtl: don't expose GSC command streamer to the user") Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Cc: Matt Roper <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit dfed6b58d54f3a5d7e6bc1fb060e2c936330eba2) Signed-off-by: Jani Nikula <[email protected]>
2023-11-29drm/loongson: Add platform dependencyJean Delvare1-0/+1
Only offer the Loongson DRM driver as an option on platforms where it makes sense. Signed-off-by: Jean Delvare <[email protected]> Cc: Sui Jingfeng <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Signed-off-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29nouveau/gsp: replace zero-length array with flex-array member and use ↵Gustavo A. R. Silva2-2/+2
__counted_by Fake flexible arrays (zero-length and one-element arrays) are deprecated, and should be replaced by flexible-array members. So, replace zero-length array with a flexible-array member in `struct PACKED_REGISTRY_TABLE`. Also annotate array `entries` with `__counted_by()` to prepare for the coming implementation by GCC and Clang of the `__counted_by` attribute. Flexible array members annotated with `__counted_by` can have their accesses bounds-checked at run-time via `CONFIG_UBSAN_BOUNDS` (for array indexing) and `CONFIG_FORTIFY_SOURCE` (for strcpy/memcpy-family functions). This fixes multiple -Warray-bounds warnings: drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c:1069:29: warning: array subscript 0 is outside array bounds of 'PACKED_REGISTRY_ENTRY[0]' [-Warray-bounds=] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c:1070:29: warning: array subscript 0 is outside array bounds of 'PACKED_REGISTRY_ENTRY[0]' [-Warray-bounds=] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c:1071:29: warning: array subscript 0 is outside array bounds of 'PACKED_REGISTRY_ENTRY[0]' [-Warray-bounds=] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c:1072:29: warning: array subscript 0 is outside array bounds of 'PACKED_REGISTRY_ENTRY[0]' [-Warray-bounds=] While there, also make use of the struct_size() helper, and address checkpatch.pl warning: WARNING: please, no spaces at the start of a line This results in no differences in binary output. Signed-off-by: Gustavo A. R. Silva <[email protected]> Reviewed-by: Kees Cook <[email protected]> Signed-off-by: Danilo Krummrich <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ZVZbX7C5suLMiBf+@work
2023-11-29nouveau/gsp/r535: remove a stray unlock in r535_gsp_rpc_send()Dan Carpenter1-3/+1
This unlock doesn't belong here and it leads to a double unlock in the caller, r535_gsp_rpc_push(). Fixes: 176fdcbddfd2 ("drm/nouveau/gsp/r535: add support for booting GSP-RM") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Timur Tabi <[email protected]> Signed-off-by: Danilo Krummrich <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-29nouveau: find the smallest page allocation to cover a buffer alloc.Dave Airlie1-2/+3
With the new uapi we don't have the comp flags on the allocation, so we shouldn't be using the first size that works, we should be iterating until we get the correct one. This reduces allocations from 2MB to 64k in lots of places. Fixes dEQP-VK.memory.allocation.basic.size_8KiB.forward.count_4000 on my ampere/gsp system. Cc: [email protected] # v6.6 Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Faith Ekstrand <[email protected]> Signed-off-by: Danilo Krummrich <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-28drm/bridge: ti-sn65dsi86: Simplify using pm_runtime_resume_and_get()Uwe Kleine-König1-4/+2
pm_runtime_resume_and_get() already drops the runtime PM usage counter in the error case. So a call to pm_runtime_put_sync() can be dropped. Signed-off-by: Uwe Kleine-König <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-28drm/panel-edp: Avoid adding multiple preferred modesHsin-Yi Wang1-7/+7
If a non generic edp-panel is under aux-bus, the mode read from edid would still be selected as preferred and results in multiple preferred modes, which is ambiguous. If both hard-coded mode and edid exists, only add mode from hard-coded. Signed-off-by: Hsin-Yi Wang <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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