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2024-01-29drm/amd/include: Add missing registers/mask for DCN316 and 350Rodrigo Siqueira4-0/+103
Cc: Jun Lei <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Hamza Mahfooz <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-29Documentation/gpu: Add simple doc page for DCHUBBUBRodrigo Siqueira1-0/+6
Enable the documentation to extract code documentation from dchubbub.h file. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Hamza Mahfooz <[email protected]> Cc: Christian König <[email protected]> Cc: Aurabindo Pillai <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-29Documentation/gpu: Add basic page for HUBPRodrigo Siqueira1-1/+12
Create the HUBP documentation page and add the doc references to extract the HUBP code documentation. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Hamza Mahfooz <[email protected]> Cc: Christian König <[email protected]> Cc: Aurabindo Pillai <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-29drm/xe: Grab mem_access when disabling C6 on skip_guc_pc platformsMatt Roper1-0/+2
If skip_guc_pc is set for a platform, C6 is disabled directly without acquiring a mem_access reference, triggering an assertion inside xe_gt_idle_disable_c6. Fixes: 975e4a3795d4 ("drm/xe: Manually setup C6 when skip_guc_pc is set") Cc: Rodrigo Vivi <[email protected]> Cc: Vinay Belgaumkar <[email protected]> Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-29Revert "drm/amd/pm: fix the high voltage and temperature issue"Mario Limonciello5-63/+11
This reverts commit 5f38ac54e60562323ea4abb1bfb37d043ee23357. This causes issues with rebooting and the 7800XT. Cc: Kenneth Feng <[email protected]> Cc: [email protected] Fixes: 5f38ac54e605 ("drm/amd/pm: fix the high voltage and temperature issue") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3062 Signed-off-by: Mario Limonciello <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-29Merge drm/drm-next into drm-misc-nextMaxime Ripard1160-8716/+78512
Kickstart 6.9 development cycle. Signed-off-by: Maxime Ripard <[email protected]>
2024-01-29drm/panel: simple: Add EDT ETML1010G3DRA panelPrimoz Fiser1-0/+30
Add support for the EDT ETML1010G3DRA 10.1" 1280x800 LVDS panel. Datasheet can be found at [1]. [1] https://www.glynshop.com/erp/owweb/Daten/DSS/EDT/Products/Specifications/Active%20Displays/ETML1010G3DRA%20Ver.3-RoHS.pdf Signed-off-by: Primoz Fiser <[email protected]> Signed-off-by: Yannic Moog <[email protected]> Reviewed-by: Jessica Zhang <[email protected]> Link: https://lore.kernel.org/r/20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-2-8ec5b48eec05@phytec.de Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-2-8ec5b48eec05@phytec.de
2024-01-29drm/virtio: Set segment size for virtio_gpu deviceSebastian Ott1-0/+1
Set the segment size of the virtio_gpu device to the value used by the drm helpers when allocating sg lists to fix the following complaint from DMA_API debug code: DMA-API: virtio-pci 0000:07:00.0: mapping sg segment longer than device claims to support [len=262144] [max=65536] Cc: [email protected] Tested-by: Zhenyu Zhang <[email protected]> Acked-by: Vivek Kasireddy <[email protected]> Signed-off-by: Sebastian Ott <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-29drm/mediatek: Support MT8188 VDOSYS1 in display driverHsiao Chien Sung1-1/+3
- The mmsys_dev_num in MT8188 VDOSYS0 was set to 1 since VDOSYS1 was not available before. Increase it to support VDOSYS1 in display driver. - Add compatible name for MT8188 VDOSYS1 (shares the same driver data with MT8195 VDOSYS1) Reviewed-by: CK Hu <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Hsiao Chien Sung <[email protected]> Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2024-01-29drm/mediatek: Add Padding to OVL adaptorHsiao Chien Sung1-0/+26
Add MT8188 Padding to OVL adaptor to probe the driver. Reviewed-by: CK Hu <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Hsiao Chien Sung <[email protected]> Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2024-01-28drm/loongson: Error out if no VRAM detectedHuacai Chen1-1/+1
When a Loongson laptop is equipped with a Radeon GPU, it can be true that there is no dedicated VRAM soldered on the motherboard. This is probably for cost reason, but drm/loongson driver is probed because the platform BIOS (either UEFI or PMON) forget to disable the integrated GPU. So in the lsdc_get_dedicated_vram() function, we error out if no dedicated VRAM detected. This fix nothing, but serve as a sanity check only. Tested-by: Xiaotian Wu <[email protected]> Signed-off-by: Huacai Chen <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Signed-off-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm/xe: correct the assertion for number of PTEsFei Yang1-1/+2
While one MI_STORE_DATA_IMM can take no more than 0x1fe qwords, the size of the pgtable can be 512 entries. Fixes: 43d48379c939 ("drm/xe: correct the calculation of remaining size") Cc: Matt Roper <[email protected]> Signed-off-by: Fei Yang <[email protected]> Tested-by: José Roberto de Souza <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm/xe/guc: Flush G2H handler when turning off CTsMatthew Brost1-2/+10
Make sure G2H handler is not running when changing the CT state to drop messages or disabled. This will help prevent races in the code ensuring that G2H are not being processed after changing the state. v2: - s/flush_g2h_handler/stop_g2h_handler (Michal) Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: Michal Wajdeczko <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> [Rodrigo remove the extra line while pushing] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm/xe: Move TLB invalidation reset before HW resetMatthew Brost1-2/+2
This is a software reset which can be done immediately after stopping the UC. Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: Michal Wajdeczko <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm/xe/guc: Add more GuC CT statesMatthew Brost4-22/+88
The Guc CT has more than enabled / disables states rather it has 4. The 4 states are not initialized, disabled, stopped, and enabled. Change the code to reflect this. These states will enable proper return codes from functions and therefore enable proper error messages. v2: - s/XE_GUC_CT_STATE_DROP_MESSAGES/XE_GUC_CT_STATE_STOPPED (Michal) - Add assert for CT being initialized (Michal) - Fix kernel for CT state enum (Michal) v3: - Kernel doc (Michal) - s/reiecved/received (Michal) - assert CT state not initialized in xe_guc_ct_init (Michal) - add argument xe_guc_ct_set_state to clear g2h (Michal) v4: - Drop clear_outstanding_g2h argument (Michal) v5: - Move xa_destroy outside of fast lock (CI) Cc: Michal Wajdeczko <[email protected]> Cc: Tejas Upadhyay <[email protected]> Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: Michal Wajdeczko <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm/ttm: Make sure the mapped tt pages are decrypted when neededZack Rusin2-2/+23
Some drivers require the mapped tt pages to be decrypted. In an ideal world this would have been handled by the dma layer, but the TTM page fault handling would have to be rewritten to able to do that. A side-effect of the TTM page fault handling is using a dma allocation per order (via ttm_pool_alloc_page) which makes it impossible to just trivially use dma_mmap_attrs. As a result ttm has to be very careful about trying to make its pgprot for the mapped tt pages match what the dma layer thinks it is. At the ttm layer it's possible to deduce the requirement to have tt pages decrypted by checking whether coherent dma allocations have been requested and the system is running with confidential computing technologies. This approach isn't ideal but keeping TTM matching DMAs expectations for the page properties is in general fragile, unfortunately proper fix would require a rewrite of TTM's page fault handling. Fixes vmwgfx with SEV enabled. v2: Explicitly include cc_platform.h v3: Use CC_ATTR_GUEST_MEM_ENCRYPT instead of CC_ATTR_MEM_ENCRYPT to limit the scope to guests and log when memory decryption is enabled. Signed-off-by: Zack Rusin <[email protected]> Fixes: 3bf3710e3718 ("drm/ttm: Add a generic TTM memcpy move for page-based iomem") Reviewed-by: Thomas Hellström <[email protected]> Acked-by: Christian König <[email protected]> Cc: Huang Rui <[email protected]> Cc: [email protected] Cc: [email protected] Cc: <[email protected]> # v5.14+ Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm/vmwgfx: Fix possible null pointer derefence with invalid contextsZack Rusin1-3/+11
vmw_context_cotable can return either an error or a null pointer and its usage sometimes went unchecked. Subsequent code would then try to access either a null pointer or an error value. The invalid dereferences were only possible with malformed userspace apps which never properly initialized the rendering contexts. Check the results of vmw_context_cotable to fix the invalid derefs. Thanks: ziming zhang(@ezrak1e) from Ant Group Light-Year Security Lab who was the first person to discover it. Niels De Graef who reported it and helped to track down the poc. Fixes: 9c079b8ce8bf ("drm/vmwgfx: Adapt execbuf to the new validation api") Cc: <[email protected]> # v4.20+ Reported-by: Niels De Graef <[email protected]> Signed-off-by: Zack Rusin <[email protected]> Cc: Martin Krastev <[email protected]> Cc: Maaz Mombasawala <[email protected]> Cc: Ian Forbes <[email protected]> Cc: Broadcom internal kernel review list <[email protected]> Cc: [email protected] Reviewed-by: Maaz Mombasawala <[email protected]> Reviewed-by: Martin Krastev <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-27Merge tag 'drm-misc-fixes-for-v6.8-rc2' of ↵Dave Airlie1-30/+2
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes One regression fixup to samsung-dsim.c module - The FORCE_STOP_STATE bit is ineffective for forcing DSI link into LP-11 mode, causing timing issues and potential bridge failures. This patch reverts previous commits and corrects this issue. Signed-off-by: Dave Airlie <[email protected]> From: Inki Dae <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-27Revert "nouveau: push event block/allowing out of the fence context"Dave Airlie2-27/+6
This reverts commit eacabb5462717a52fccbbbba458365a4f5e61f35. This commit causes some regressions in desktop usage, this will reintroduce the original deadlock in DRI_PRIME situations, I've got an idea to fix it by offloading to a workqueue in a different spot, however this code has a race condition where we sometimes miss interrupts so I'd like to fix that as well. Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
2024-01-27Merge tag 'drm-intel-fixes-2024-01-26' of ↵Dave Airlie1-2/+12
git://anongit.freedesktop.org/drm/drm-intel into drm-fixes - PSR fix for HSW Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-27Merge tag 'drm-misc-fixes-2024-01-26' of ↵Dave Airlie10-19/+80
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes Plenty of ivpu fixes to improve the general stability and debugging, a suspend fix for the anx7625 bridge, a revert to fix an initialization order bug between i915 and simpledrm and a documentation warning fix for dp_mst. Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/tp77e5fokigup6cgmpq6mtg46kzdw2dpze6smpnwfoml4kmwpq@bo6mbkezpkle
2024-01-26drm/vmwgfx: Add SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 to command array.Ian Forbes1-0/+2
Without this definition device errors will display the command name as (null) when debug logging is enabled. Signed-off-by: Ian Forbes <[email protected]> Signed-off-by: Zack Rusin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm: bridge: samsung-dsim: Don't use FORCE_STOP_STATEMichael Walle1-30/+2
The FORCE_STOP_STATE bit is unsuitable to force the DSI link into LP-11 mode. It seems the bridge internally queues DSI packets and when the FORCE_STOP_STATE bit is cleared, they are sent in close succession without any useful timing (this also means that the DSI lanes won't go into LP-11 mode). The length of this gibberish varies between 1ms and 5ms. This sometimes breaks an attached bridge (TI SN65DSI84 in this case). In our case, the bridge will fail in about 1 per 500 reboots. The FORCE_STOP_STATE handling was introduced to have the DSI lanes in LP-11 state during the .pre_enable phase. But as it turns out, none of this is needed at all. Between samsung_dsim_init() and samsung_dsim_set_display_enable() the lanes are already in LP-11 mode. The code as it was before commit 20c827683de0 ("drm: bridge: samsung-dsim: Fix init during host transfer") and 0c14d3130654 ("drm: bridge: samsung-dsim: Fix i.MX8M enable flow to meet spec") was correct in this regard. This patch basically reverts both commits. It was tested on an i.MX8M SoC with an SN65DSI84 bridge. The signals were probed and the DSI packets were decoded during initialization and link start-up. After this patch the first DSI packet on the link is a VSYNC packet and the timing is correct. Command mode between .pre_enable and .enable was also briefly tested by a quick hack. There was no DSI link partner which would have responded, but it was made sure the DSI packet was send on the link. As a side note, the command mode seems to just work in HS mode. I couldn't find that the bridge will handle commands in LP mode. Fixes: 20c827683de0 ("drm: bridge: samsung-dsim: Fix init during host transfer") Fixes: 0c14d3130654 ("drm: bridge: samsung-dsim: Fix i.MX8M enable flow to meet spec") Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Inki Dae <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26drm/i915: Convert PLL flags to booleansVille Syrjälä2-21/+22
No real reason why the PLL flags need to be a bitmask. Switch to booleans to make the code simpler. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-01-26drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLsVille Syrjälä2-4/+23
TC ports have both the MG/TC and TBT PLLs selected simultanously (so that we can switch from MG/TC to TBT as a fallback). This doesn't play well with the state checker that assumes that the old PLL shouldn't have the pipe in its pipe_mask anymore. Suppress that check for these PLLs to avoid spurious WARNs when you disconnect a TC port and a non-disabling modeset happens before actually disabling the port. v2: Only suppress when one of the PLLs is the TBT PLL and the other one is not Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9816 Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-01-26drm/i915: Include the PLL name in the debug messagesVille Syrjälä1-19/+20
Make the log easier to parse by including the name of the PLL in the debug prints regarding said PLL. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-01-26drm/sched: Drain all entities in DRM sched run job workerMatthew Brost1-8/+7
All entities must be drained in the DRM scheduler run job worker to avoid the following case. An entity found that is ready, no job found ready on entity, and run job worker goes idle with other entities + jobs ready. Draining all ready entities (i.e. loop over all ready entities) in the run job worker ensures all job that are ready will be scheduled. Cc: Thorsten Leemhuis <[email protected]> Reported-by: Mikhail Gavrilov <[email protected]> Closes: https://lore.kernel.org/all/CABXGCsM2VLs489CH-vF-1539-s3in37=bwuOWtoeeE+q26zE+Q@mail.gmail.com/ Reported-and-tested-by: Mario Limonciello <[email protected]> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3124 Link: https://lore.kernel.org/all/[email protected]/ Reported-and-tested-by: Vlastimil Babka <[email protected]> Closes: https://lore.kernel.org/dri-devel/[email protected]/T/#m0c31d4d1b9ae9995bb880974c4f1dbaddc33a48a Signed-off-by: Matthew Brost <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26Merge tag 'amd-drm-fixes-6.8-2024-01-25' of ↵Dave Airlie24-36/+229
https://gitlab.freedesktop.org/agd5f/linux into drm-fixes amd-drm-fixes-6.8-2024-01-25: amdgpu: - AC/DC power supply tracking fix - Don't show invalid vram vendor data - SMU 13.0.x fixes - GART fix for umr on systems without VRAM - GFX 10/11 UNORD_DISPATCH fixes - IPS display fixes (required for S0ix on some platforms) - Misc fixes Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-01-26Merge tag 'drm-xe-fixes-2024-01-25' of ↵Dave Airlie8-30/+31
https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes Driver Changes: - Make an ops struct static - Fix an implicit 0 to NULL conversion - A couple of 32-bit fixes - A migration coherency fix for Lunar Lake. - An error path vm id leak fix - Remove PVC references in kunit tests Signed-off-by: Dave Airlie <[email protected]> From: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ZbIb7l0EhpVp5cXE@fedora
2024-01-25drm/msm/mdss: specify cfg bandwidth for SDM670Dmitry Baryshkov1-0/+1
Lower the requested CFG bus bandwidth for the SDM670 platform. The default value is 153600 kBps, which is twice as big as required by the platform according to the vendor kernel. Fixes: a55c8ff252d3 ("drm/msm/mdss: Handle the reg bus ICC path") Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Tested-by: Richard Acayan <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/572182/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abhinav Kumar <[email protected]>
2024-01-25drm/amd/display: "Enable IPS by default"Roman Li1-1/+2
[Why] IPS was temporary disabled due to instability. It was fixed in dmub firmware and with: - "drm/amd/display: Add IPS checks before dcn register access" - "drm/amd/display: Disable ips before dc interrupt setting" [How] Enable IPS by default. Disable IPS if 0x800 bit set in amdgpu.dcdebugmask module params Signed-off-by: Roman Li <[email protected]> Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amd: Add a DC debug mask for IPSRoman Li1-0/+1
For debugging IPS-related issues, expose a new debug mask that allows to disable IPS. Usage: amdgpu.dcdebugmask=0x800 Signed-off-by: Roman Li <[email protected]> Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amd/display: Disable ips before dc interrupt settingRoman Li1-1/+4
[Why] While in IPS2 an access to dcn registers is not allowed. If interrupt results in dc call, we should disable IPS. [How] Safeguard register access in IPS2 by disabling idle optimization before calling dc interrupt setting api. Signed-off-by: Roman Li <[email protected]> Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amd/display: Replay + IPS + ABM in Full Screen VPBChunTao Tso4-0/+57
[Why] Because ABM will wait VStart to start getting histogram data, it will cause we can't enter IPS while full screnn video playing. [How] Modify the panel refresh rate to the maximun multiple of current refresh rate. Reviewed-by: Dennis Chan <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: ChunTao Tso <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amd/display: Add IPS checks before dcn register accessRoman Li1-10/+6
[Why] With IPS enabled a system hangs once PSR is active. PSR active triggers transition to IPS2 state. While in IPS2 an access to dcn registers results in hard hang. Existing check doesn't cover for PSR sequence. [How] Safeguard register access by disabling idle optimization in atomic commit and crtc scanout. It will be re-enabled on next vblank. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amd/display: Add Replay IPS register for DMUB command tableAlvin Lee1-0/+1
- Introduce a new Replay mode for DMUB version 0.0.199.0 Reviewed-by: Martin Leung <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amd/display: Allow IPS2 during ReplayNicholas Kazlauskas3-1/+11
[Why & How] Add regkey to block video playback in IPS2 by default Allow idle optimizations in the same spot we allow Replay for video playback usecases. Avoid sending it when there's an external display connected by modifying the allow idle checks to check for active non-eDP screens. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amdgpu/gfx11: set UNORD_DISPATCH in compute MQDsAlex Deucher2-1/+2
This needs to be set to 1 to avoid a potential deadlock in the GC 10.x and newer. On GC 9.x and older, this needs to be set to 0. This can lead to hangs in some mixed graphics and compute workloads. Updated firmware is also required for AQL. Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-01-25drm/amdgpu/gfx10: set UNORD_DISPATCH in compute MQDsAlex Deucher2-1/+2
This needs to be set to 1 to avoid a potential deadlock in the GC 10.x and newer. On GC 9.x and older, this needs to be set to 0. This can lead to hangs in some mixed graphics and compute workloads. Updated firmware is also required for AQL. Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-01-25drm/amd/amdgpu: Assign GART pages to AMD device mappingTom St Denis1-0/+8
This allows kernel mapped pages like the PDB and PTB to be read via the iomem debugfs when there is no vram in the system. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.7.x
2024-01-25drm/amd/pm: Fetch current power limit from FWLijo Lazar1-0/+1
Power limit of SMUv13.0.6 SOCs can be updated by out-of-band ways. Fetch the limit from firmware instead of using cached values. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.7.x
2024-01-25drm/amdgpu: Fix null pointer dereferenceHawking Zhang1-1/+1
amdgpu_reg_state_sysfs_fini could be invoked at the time when asic_func is even not initialized, i.e., amdgpu_discovery_init fails for some reason. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-01-25drm/amdgpu: Show vram vendor only if availableLijo Lazar1-1/+16
Ony if vram vendor info is available, show in sysfs. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.7.x
2024-01-25drm/amd/pm: update the power cap settingKenneth Feng2-4/+104
update the power cap setting for smu_v13.0.0/smu_v13.0.7 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2356 Signed-off-by: Kenneth Feng <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-01-25drm/amdgpu: Avoid fetching vram vendor informationLijo Lazar1-1/+2
For GFX 9.4.3 APUs, the current method of fetching vram vendor information is not reliable. Avoid fetching the information. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.7.x
2024-01-25drm/amdgpu/pm: Fix the power source flag errorMa Jun3-10/+7
The power source flag should be updated when [1] System receives an interrupt indicating that the power source has changed. [2] System resumes from suspend or runtime suspend Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-01-25drm/amd/display: Fix uninitialized variable usage in core_link_ 'read_dpcd() ↵Srinivasan Shanmugam1-2/+2
& write_dpcd()' functions The 'status' variable in 'core_link_read_dpcd()' & 'core_link_write_dpcd()' was uninitialized. Thus, initializing 'status' variable to 'DC_ERROR_UNEXPECTED' by default. Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.c:226 core_link_read_dpcd() error: uninitialized symbol 'status'. drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.c:248 core_link_write_dpcd() error: uninitialized symbol 'status'. Cc: [email protected] Cc: Jerry Zuo <[email protected]> Cc: Jun Lei <[email protected]> Cc: Wayne Lin <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Hamza Mahfooz <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amd/pm: udpate smu v13.0.6 message permissionYang Wang1-2/+2
update smu v13.0.6 message to allow guest driver set gfx clock. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25amdgpu/drm: Use vram manager for virtualization page retirementVictor Skvortsov1-10/+20
In runtime, use vram manager for virtualization page retirement. Signed-off-by: Victor Skvortsov <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-25drm/amdgpu: Add RAS_POISON_READY host response messageVictor Skvortsov2-0/+7
In a non-FLR page avoidance scenario, the host driver will provide the bad pages in the pf2vf exchange region. Adding a new host response message to indicate when the pf2vf exchange region has been updated. Signed-off-by: Victor Skvortsov <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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