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2024-04-30drm/amdgpu: add function descripion of new functionsSunil Khatri1-0/+2
Add function description of the new functions added in amd_ip_funcs. new functions added are: a. dump_ip_state b. print_ip_state Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: 3.2.283Aric Cyr1-1/+1
This version brings along following fixes: - Disable seamless boot on 128b/132b encoding - Have cursor and surface updates together - Change ASSR disable sequence to avoid corruption - Fix few IPS problems - Enable Replay for DCN315 - Fix few ODM problems - Fix FEC_READY write timing - Fix few FPO problems - Adjust DML21 gpuvm_enable assignment - Fix divide by 0 error in VM environment - Fix few DCN35 problems - Fix flickering on DCN321 - Fix mst resume problem - Fix multi-disp FAMS problem - Refactor Replay - Update some of the dcn303 parameters - Enable legacy fast update for dcn301 - Add VCO parameter for DCN31 FPU - Fix problems reported by Coverity Acked-by: Wayne Lin <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Disable seamless boot on 128b/132b encodingSung Joon Kim1-0/+3
[why] preOS will not support display mode programming and link training for UHBR rates. [how] If we detect a sink that's UHBR capable, disable seamless boot Reviewed-by: Anthony Koo <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Change ASSR disable sequenceSwapnil Patel1-2/+1
[Why] Currently disabling ASSR before stream is disabled causes visible display corruption. [How] Move disable ASSR command to after stream has been disabled. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Swapnil Patel <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Add periodic detection for IPSRoman Li6-2/+113
[Why] HPD interrupt cannot be handled in IPS2 state. So if there's a display topology change while system in IPS2 it can be missed. [How] Implement worker to check each 5 sec in IPS for HPD. Reviewed-by: Hamza Mahfooz <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Notify idle link detection through shared stateNicholas Kazlauskas5-1/+57
[Why] We can hang in IPS2 checking DMCUB_SCRATCH0 for link detection state. [How] Replace the HW access with a check on the shared state bit. This will work the same way as the SCRATCH0 but won't require a wake in the case where link detection isn't required. Reviewed-by: Duncan Ma <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Enable Replay for DCN315Joan Lee1-0/+12
[why & how] Enable Replay for DCN315. Reviewed-by: Robin Chen <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Joan Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: use even ODM slice width for two pixels per containerWenjing Liu26-64/+103
[why] When optc uses two pixel per container, each ODM slice width must be an even number. [how] If ODM slice width is odd number increase it by 1. Reviewed-by: Dillon Varone <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Fix FEC_READY write on DP LTIlya Bakoulin1-8/+6
[Why/How] We can miss writing FEC_READY in some cases before LT start, which violates DP spec. Remove the condition guarding the DPCD write so that the write happens unconditionally. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: For FPO + Vactive check that all pipes support VAAlvin Lee3-7/+17
[Description] For FPO + Vactive scenarios we must check that all non-FPO pipes have VACTIVE margin to allow it. The previous check only confirmed that there is at least one pipe that has vactive margin, but this is incorrect as the vactive display could be using two pipes (MPO) where the desktop plane has vactive margin, and the video plane does not. Reviewed-by: Samson Tam <[email protected]> Reviewed-by: Chaitanya Dhere <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: gpuvm handling in DML21Nevenko Stupar3-1/+3
[Why & How] Currently in DML2.1 gpuvm_enable was hardcoded. Use passed info from DC for DML21 to be in sync with what is used in DC. Reviewed-by: Chaitanya Dhere <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Nevenko Stupar <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Assign linear_pitch_alignment even for VMAlvin Lee1-0/+1
[Description] Assign linear_pitch_alignment so we don't cause a divide by 0 error in VM environments Reviewed-by: Sohaib Nadeem <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Refactor HUBBUB into component folderRevalla Hari Krishna31-15/+114
[why] cleaning up the code refactor requires hubbub to be in its own component. [how] Move all files under newly created hubbub folder and fix the makefiles. Reviewed-by: Martin Leung <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Revalla Hari Krishna <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Only program P-State force if pipe config changedAlvin Lee1-1/+17
[Description] Today for MED update type we do not call update clocks. However, for FPO the assumption is that update clocks should be called to disable P-State switch before any HW programming since FPO in FW and driver are not synchronized. This causes an issue where on a MED update, an FPO P-State switch could be taking place, then driver forces P-State disallow in the below code and prevents FPO from completing the sequence. In this case we add a check to avoid re-programming (and thus re-setting) the P-State force register by only reprogramming if the pipe was not previously Subvp or FPO. The assumption is that the P-State force register should be programmed correctly the first time SubVP / FPO was enabled, so there's no need to update / reset it if the pipe config has never exited SubVP / FPO. Reviewed-by: Samson Tam <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Revert "dc: Keep VBios pixel rate div setting util next ↵Webb Chen20-141/+111
mode set" This reverts commit 4d4d3ff16db2 ("drm/amd/display: Keep VBios pixel rate div setting util next mode set") which causes issue. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Webb Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Enable RCO for PHYSYMCLK in DCN35Daniel Miess7-45/+41
[Why & How] Enable root clock optimization for PHYSYMCLK and only disable it when it's actively being used v2: Fix array-index-out-of-bounds in dcn35_calc_blocks_to_gate Reviewed-by: Roman Li <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Daniel Miess <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Add trigger FIFO resync path for DCN35Nicholas Kazlauskas2-0/+12
[Why] FIFO error can occur if we don't trigger a DISPCLK change after touching K1/K2 dividers. For 4k144 eDP + hotplug of USB-C DP display we see FIFO underflow. [How] We have the path to trigger the resync as the workaround in DCN314/DCN32, it just needs to be ported over to DCN35. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Re-enable IPS2 for static screenRoman Li1-1/+1
[Why] IPS stability was fixed in bios. [How] Set disable_ips init flag to DMUB_IPS_ENABLE. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: take ODM slice count into account when deciding DSC sliceWenjing Liu1-7/+23
[why] DSC slice must be divisible by ODM slice count. [how] If DSC slice count is not a multiple of ODM slice count, increase DSC slice until it is. Otherwise fail to compute DSC configuration. Reviewed-by: Chaitanya Dhere <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Fix DC mode screen flickering on DCN321Leo Ma1-3/+12
[Why && How] Screen flickering saw on 4K@60 eDP with high refresh rate external monitor when booting up in DC mode. DC Mode Capping is disabled which caused wrong UCLK being used. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Leo Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Defer handling mst up request in resumeWayne Lin1-1/+0
[Why] Like commit ec5fa9fcdeca ("drm/amd/display: Adjust the MST resume flow"), we want to avoid handling mst topology changes before restoring the old state. If we enable DP_UP_REQ_EN before calling drm_atomic_helper_resume(), have changce to handle CSN event first and fire hotplug event before restoring the cached state. [How] Disable mst branch sending up request event before we restoring the cached state. DP_UP_REQ_EN will be set later when we call drm_dp_mst_topology_mgr_resume(). Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Hersen Wu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Restrict multi-disp support for in-game FAMSIswara Nagulendran3-3/+11
[HOW&WHY] In multi-monitor cases the VBLANK stretch that is required to align both monitors may be so large that it may create issues for gaming performance. Use debug value to restrict in-game FAMS support for multi-disp use case. Reviewed-by: Harry Vanzylldejong <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Iswara Nagulendran <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Refactor for Replay Link off frame countDennis Chan2-7/+3
[why] To refine for link off frame count in diagnose tool, the driver show the link off frame count number instead of showing link off frame count level. Reviewed-by: ChunTao Tso <[email protected]> Reviewed-by: Robin Chen <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Dennis Chan <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Handle the case which quad_part is equal 0Rodrigo Siqueira1-0/+3
Add code to handle case when quad_part is 0 in gpu_addr_to_uma(). Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Add log_color_state callback to multiple DCNsRodrigo Siqueira5-0/+5
Set up to enable log color state for multiple DCNs. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Remove legacy code in DCRodrigo Siqueira5-24/+1
This commit just remove some trivial legacy code in some of the DC files. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Update some of the dcn303 parametersRodrigo Siqueira1-4/+7
Adjust to update some of the dcn303 parameters. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Enable legacy fast update for dcn301Rodrigo Siqueira1-0/+1
Set up to enable legacy fast update. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Adjust functions prefix for some of the dcn301 fpu functionsRodrigo Siqueira3-12/+18
Add dcn301_fpu prefix to some of the FPU function with the required adjustments. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Add VCO speed parameter for DCN31 FPURodrigo Siqueira1-0/+2
Add VCO speed parameters in the bounding box array. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Remove unnecessary filesWayne Lin7-32/+0
[Why & How] We accidentally upstream unnecessary files. Remove them. Reviewed-by: Tom Chung <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Adjust codestyle for dcn31 and hdcp_msgRodrigo Siqueira2-5/+5
This commit just update the code style in two if conditions and in an static array. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Add missing SMU versionRodrigo Siqueira1-1/+2
This commit add PP_SMU_VER_VG to the pp_smu_ver list. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Improve registers writeRodrigo Siqueira1-1/+2
Add REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE to optimize the burst write for the regama lut. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Always use legacy way of setting cursor on DCEHarry Wentland1-2/+4
Some IGT tests fail with the new atomic cursor updates when running on older DCE-based ASICs. To work around these issues keep calling the amdgpu_dm_commit_cursors for each cursor update on DCE, even if those cursor updates coincide with other plane updates. Reviewed-by: Agustin Gutierrez <[email protected]> Reviewed-by: Sun peng Li <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amdgpu: remove unused MCA driver codesYang Wang3-183/+82
- remove unused callback functions. - make part of mca functions static and refine the function order. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Do cursor programming with rest of pipeHarry Wentland6-12/+105
Cursors are always programmed independently of updates on other planes. When atomic commits program cursor and surface updates together the cursor update might be locked out by the surface update and not take effect. To combat this program cursor and surface updates together via dc_update_planes_and_stream to ensure they can be applied atomically. When cursor updates come on their own use the old method to program the cursor as dc_update_planes_and_stream isn't handling this case correctly (yet), leading to a flickering screen. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2186 Reviewed-by: Agustin Gutierrez <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amdgpu: Add mmhub v4_1_0 ip headers (v4)Hawking Zhang2-0/+8284
v1: Add mmhub v4_1_0 register offset and shift masks header files. (Hawking) v2: Update mmhub v4_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update mmhub v4_1_0 register offset and shift masks header files to RE2.5 (Likun) v4: Clean up mmhub v4_1_0 ip headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: 3.2.282Aric Cyr1-1/+1
Summary: * Changes across DSC, MST, DMCUB, Panel Replay and misc fixes. * Fixes to cursor programming sequence * Add some missing register defs * Formatting/Sytle fixes Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: [FW Promotion] Release 0.0.214.0Anthony Koo1-1/+1
- Adjust the dmub_fw_boot_options reserved bits to be correct Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amdgpu/discovery: Add common soc24 ip blockLikun Gao1-0/+5
Add common soc24 ip block. v2: squash in updates (Alex) Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Replace uint8_t with u8 for dp_hdmi_dongle_signature_strRodrigo Siqueira1-1/+1
The string dp_hdmi_dongle_signature_str already uses u8 but the string dp_hdmi_dongle_signature_str does not. Just replace uint8_t with u8 for dp_hdmi_dongle_signature_str. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amdgpu/mes11: adjust mes initialization sequenceJack Xiao1-1/+8
Adjust mes queue initialization before kgq/kcq initialization to enable mes mapping legacy queue. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amdgpu/mes11: add mes mapping legacy queue supportJack Xiao1-0/+26
Add mes11 map legacy queue packet submission. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Update dcn351 debug flags and function pointersSung Joon Kim2-2/+3
[why & how] There are potential issues with Z8 and IPS that need to be addressed and need to add in missing function pointers. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amdgpu: once more fix the call oder in amdgpu_ttm_move() v2Christian König3-28/+38
This reverts drm/amdgpu: fix ftrace event amdgpu_bo_move always move on same heap. The basic problem here is that after the move the old location is simply not available any more. Some fixes were suggested, but essentially we should call the move notification before actually moving things because only this way we have the correct order for DMA-buf and VM move notifications as well. Also rework the statistic handling so that we don't update the eviction counter before the move. v2: add missing NULL check Signed-off-by: Christian König <[email protected]> Fixes: 94aeb4117343 ("drm/amdgpu: fix ftrace event amdgpu_bo_move always move on same heap") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3171 Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> CC: [email protected]
2024-04-30drm/amd/display: Keep VBios pixel rate div setting util next mode setWebb Chen20-112/+141
[why] VBios & Driver may have differnet pixel rate div policy. If the policy is not same and fast boot is enabled, it would cause the pixel rate is too high after driver only performs stream blank & unblank. [how] We would keep pixel rate div setting by VBios until next mode set. Reviewed-by: Jun Lei <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Webb Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Disable error correction if it's not supportedCruise1-26/+21
[Why] Error correction was enabled in a monitor which doesn't support. [How] Disable error correction if it's not supported Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Cruise <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Fix recout calculation for stereo side-by-sideSung Joon Kim1-0/+3
[why & how] The recout x offset was incorrect which led to wrong viewport calculation. For stereo side-by-side case, the slice index should be 0 for both split pipes. Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Sung Joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Set cursor attributes before positionHarry Wentland2-2/+2
HWSS set_cursor_attributes copies the stream's cursor attributes to the hubp cursor attributes. set_cursor_position might attempt to program the cursor attributes but will program them wrong if they're not set correctly. We need to call HWSS set_cursor_attributes first to ensure hubp has the right attributes to be programmed. Reviewed-by: Agustin Gutierrez <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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