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2024-05-16drm/xe/pf: Expose PF monitor details via debugfsMichal Wajdeczko1-0/+7
For debug purposes we might want to view statistics maintained by the PF driver about VFs activity. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/xe/pf: Track adverse events notifications from GuCMichal Wajdeczko6-0/+206
When thresholds used to monitor VFs activities are configured, then GuC may send GUC2PF_ADVERSE_EVENT messages informing the PF driver about exceeded thresholds. Start handling such messages. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/xe/guc: Add GUC2PF_ADVERSE_EVENT to ABIMichal Wajdeczko1-0/+30
When thresholds used to monitor VFs activities are configured, then GuC may send GUC2PF_ADVERSE_EVENT messages informing the PF driver about exceeded thresholds. Add necessary definitions to our GuC firmware ABI header. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/xe/pf: Allow configuration of VF thresholds over debugfsMichal Wajdeczko1-0/+72
Initial values of all thresholds used by the GuC to monitor VF's activity is zero (disabled) and we need to explicitly configure them per each VF. Expose additional attributes over debugfs. Definitions of all attributes are generated so we will not need to make any changes if new thresholds would be added to the set. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/xe/pf: Introduce functions to configure VF thresholdsMichal Wajdeczko3-0/+97
The GuC firmware monitors VF's activity and notifies the PF driver once any configured threshold related to such activity is exceeded. Add functions to allow configuration of these thresholds per VF. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/xe/guc: Add support for threshold KLVs in to_string() helperMichal Wajdeczko1-0/+12
Use MAKE_XE_GUC_KLV_THRESHOLDS_SET to generate missing conversion of threshold KLV keys to string. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/xe/guc: Introduce GuC KLV thresholds setMichal Wajdeczko2-0/+132
The GuC firmware monitors VF's activity and notifies the PF driver once any configured threshold related to such activity is exceeded. The available thresholds are defined in the GuC ABI as part of the GuC VF Configuration KLVs. Threshold configurations performed by the PF driver and notifications sent by the GuC rely on the KLV keys, which are not zero-based and might not guarantee continuity. To simplify the driver code and eliminate the need to repeat very similar code for each threshold, introduce the threshold set macro that allows to generate required code based on unique threshold tag. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/xe/guc: Add more KLV helper macrosMichal Wajdeczko1-1/+14
In upcoming patches we will want to generate some of the KLV keys from other macros. Add MAKE_GUC_KLV_{KEY|LEN} macros for that and make sure they will correctly expand provided TAG parameter. Also fix PREP_GUC_KLV_TAG to also work correctly within other macros. Reviewed-by: Piotr Piórkowski <[email protected]> Signed-off-by: Michal Wajdeczko <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16Merge tag 'drm-next-2024-05-16' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds2-2/+37
Pull drm fix from Dave Airlie: - fix breakage in buddy allocator * tag 'drm-next-2024-05-16' of https://gitlab.freedesktop.org/drm/kernel: drm/tests: Add a unit test for range bias allocation drm/buddy: Fix the range bias clear memory allocation issue
2024-05-16drm/i915: pass dev_priv explicitly to CURSURFLIVEJani Nikula2-5/+10
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CURSURFLIVE register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/86aa98ad9f883681f5c2e3aba839d02d8591bfbf.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: pass dev_priv explicitly to CUR_CHICKENJani Nikula1-1/+1
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CUR_CHICKEN register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/0bd1fa8ab346ba2bb40f435136b975b472ad2bc8.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: pass dev_priv explicitly to CUR_FBC_CTLJani Nikula3-5/+6
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CUR_FBC_CTL register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/f5e76f916ccf02aaf6016ffd476e9544817ac179.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: pass dev_priv explicitly to CURSIZEJani Nikula2-2/+2
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CURSIZE register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/521ca44416eb95dcfcf4bfbc32ac7f9371aeaf5d.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: pass dev_priv explicitly to CURPOS_ERLY_TPTJani Nikula2-2/+4
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CURPOS_ERLY_TPT register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/2263b6412e983026990f7f6730b0b1141be4fd0f.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: pass dev_priv explicitly to CURPOSJani Nikula4-9/+9
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CURPOS register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ca229a123cb8a5d6a2970649a47236b3da1b02ad.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: pass dev_priv explicitly to CURBASEJani Nikula4-8/+8
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CURBASE register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e552df69a4e6a3dbd562ba8c442d0219cda3bfd0.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: pass dev_priv explicitly to CURCNTRJani Nikula6-16/+16
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CURCNTR register macro. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/06bc681558c86f351ae596e9600133bb10ae4bdd.1715774156.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-16drm/i915: Support replaying GPU hangs with captured context imageTvrtko Ursulin9-3/+166
When debugging GPU hangs Mesa developers are finding it useful to replay the captured error state against the simulator. But due various simulator limitations which prevent replicating all hangs, one step further is being able to replay against a real GPU. This is almost doable today with the missing part being able to upload the captured context image into the driver state prior to executing the uploaded hanging batch and all the buffers. To enable this last part we add a new context parameter called I915_CONTEXT_PARAM_CONTEXT_IMAGE. It follows the existing SSEU configuration pattern of being able to select which context to apply against, paired with the actual image and its size. Since this is adding a new concept of debug only uapi, we hide it behind a new kconfig option and also require activation with a module parameter. Together with a warning banner printed at driver load, all those combined should be sufficient to guard against inadvertently enabling the feature. In terms of implementation we allow the legacy context set param to be used since that removes the need to record the per context data in the proto context, while still allowing flexibility of specifying context images for any context. Mesa MR using the uapi can be seen at: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27594 v2: * Fix whitespace alignment as per checkpatch. * Added warning on userspace misuse. * Rebase for extracting ce->default_state shadowing. v3: * Rebase for I915_CONTEXT_PARAM_LOW_LATENCY. Signed-off-by: Tvrtko Ursulin <[email protected]> Cc: Lionel Landwerlin <[email protected]> Cc: Carlos Santa <[email protected]> Cc: Rodrigo Vivi <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Tested-by: Carlos Santa <[email protected]> Signed-off-by: Tvrtko Ursulin <[email protected]> Signed-off-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/i915: Shadow default engine context image in the contextTvrtko Ursulin3-6/+10
To enable adding override of the default engine context image let us start shadowing the per engine state in the context. Signed-off-by: Tvrtko Ursulin <[email protected]> Cc: Lionel Landwerlin <[email protected]> Cc: Carlos Santa <[email protected]> Cc: Rodrigo Vivi <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Tvrtko Ursulin <[email protected]> Signed-off-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin2843-86157/+399162
Some display refactoring patches are needed in order to allow conflict- less merging. Signed-off-by: Tvrtko Ursulin <[email protected]>
2024-05-16drm/tests: Add a unit test for range bias allocationArunpravin Paneer Selvam1-1/+35
Allocate cleared blocks in the bias range when the DRM buddy's clear avail is zero. This will validate the bias range allocation in scenarios like system boot when no cleared blocks are available and exercise the fallback path too. The resulting blocks should always be dirty. v1:(Matthew) - move the size to the variable declaration section. - move the mm.clear_avail init to allocator init. Signed-off-by: Arunpravin Paneer Selvam <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-16drm/buddy: Fix the range bias clear memory allocation issueArunpravin Paneer Selvam1-1/+2
Problem statement: During the system boot time, an application request for the bulk volume of cleared range bias memory when the clear_avail is zero, we dont fallback into normal allocation method as we had an unnecessary clear_avail check which prevents the fallback method leads to fb allocation failure following system goes into unresponsive state. Solution: Remove the unnecessary clear_avail check in the range bias allocation function. v2: add a kunit for this corner case (Daniel Vetter) Signed-off-by: Arunpravin Paneer Selvam <[email protected]> Fixes: 96950929eb23 ("drm/buddy: Implement tracking clear page feature") Reviewed-by: Matthew Auld <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/xe/pf: Implement pci_driver.sriov_configure callbackMichal Wajdeczko4-0/+161
The PCI subsystem already exposes the "sriov_numvfs" attribute that users can use to enable or disable SR-IOV VFs. Add custom implementation of the .sriov_configure callback defined by the pci_driver to perform additional steps, including fair VFs provisioning with the resources, as required by our platforms. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Piotr Piórkowski <[email protected]> Cc: Badal Nilawar <[email protected]> Cc: Rodrigo Vivi <[email protected]> Reviewed-by: Piotr Piórkowski <[email protected]> #v2 Reviewed-by: Badal Nilawar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/panel: simple: Add Microtips Technology MF-103HIEB0GA0 panelAradhya Bhatia1-0/+32
Add support for Microtips Technology USA MF-103HIEB0GA0 10.25"[0], 1920x720, 8-bit TFT LCD with LVDS interface. Its a Dual-LVDS Panel and does not support touch. [0]: Panel Datasheet https://simplespec.microtipsusa.com/uploads/spec/datasheetFile/2660/13-103HIEB0GA0-S_V1.0_20211206.pdf Signed-off-by: Aradhya Bhatia <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/panel: simple: Add Microtips Technology 13-101HIEBCAF0-C panelAradhya Bhatia1-0/+32
Add support for Microtips Technology USA 13-101HIECAF0-C 10.1", 1920x1200, 8-bit TFT LCD with LVDS interface, LED backlight and touch support (ILITEK 2511). [0]: Panel Datasheet https://simplespec.microtipsusa.com/uploads/spec/datasheetFile/2588/13-101HIEBCAF0-S_V1.1_20221104.pdf Signed-off-by: Aradhya Bhatia <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/panel: simple: Add Lincoln Tech Sol LCD185-101CT panelAradhya Bhatia1-0/+32
Add support for Lincoln Technology Solutions LCD185-101CT, 10.1", 1920x1200, 8-bit TFT LCD with LVDS interface, LED backlight and PCAP touch support (Goodix GT928). [0]: Panel Datasheet https://lincolntechsolutions.com/wp-content/uploads/2023/04/LCD185-101CTL1ARNTT_DS_R1.3.pdf Signed-off-by: Aradhya Bhatia <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/panel: innolux-p079zca: Don't use a table for initting panelsDouglas Anderson1-144/+140
Consensus on the mailing lists is that panels shouldn't use a table of init commands but should instead use init functions. We'll use the same concepts as the recently introduced mipi_dsi_generic_write_seq_multi() to make this clean/easy and also not bloat the driver too much. Measuring before/after this change: $ scripts/bloat-o-meter \ .../before/panel-innolux-p079zca.ko \ .../after/panel-innolux-p079zca.ko add/remove: 3/2 grow/shrink: 0/1 up/down: 2356/-1944 (412) Function old new delta innolux_p097pfg_init - 1772 +1772 innolux_p097pfg_init.d - 480 +480 innolux_panel_write_multi - 104 +104 innolux_panel_prepare 412 308 -104 .compoundliteral 480 - -480 innolux_p097pfg_init_cmds 1360 - -1360 Total: Before=5802, After=6214, chg +7.10% Note that, unlike some other drivers, we actually make this panel driver _bigger_ by using the new functions. This is because the innolux-p079zca panel driver didn't have as complex of a table and thus the old table was more efficient than the code. The bloat is still not giant (only 412 bytes). Also note that we can't direclty use mipi_dsi_generic_write_seq_multi() here because we need to deal with the crazy "nop" that this driver sends after all commands. This means that we have to write code that is "inspired" by the new macros. Since we're touching all the tables, let's also convert hex numbers to lower case as per kernel conventions. Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20240514102056.v5.9.I947e28c81f9ef7dcd3add6e193be72d6f8ea086f@changeid Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.9.I947e28c81f9ef7dcd3add6e193be72d6f8ea086f@changeid
2024-05-15drm/panel: ili9882t: Don't use a table for initting panelsDouglas Anderson1-426/+368
Consensus on the mailing lists is that panels shouldn't use a table of init commands but should instead use init functions. With the recently introduced mipi_dsi_dcs_write_seq_multi() this is not only clean/easy but also saves space. Measuring before/after this change: $ scripts/bloat-o-meter \ .../before/panel-ilitek-ili9882t.ko \ .../after/panel-ilitek-ili9882t.ko add/remove: 3/2 grow/shrink: 0/2 up/down: 6834/-8177 (-1343) Function old new delta starry_ili9882t_init - 6152 +6152 starry_ili9882t_init.d - 678 +678 ili9882t_disable.d - 4 +4 ili9882t_disable 260 228 -32 ili9882t_prepare 540 396 -144 .compoundliteral 681 - -681 starry_ili9882t_init_cmd 7320 - -7320 Total: Before=11928, After=10585, chg -11.26% Let's do the conversion. Since we're touching all the tables, let's also convert hex numbers to lower case as per kernel conventions. Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20240514102056.v5.8.I407b977f9508573103491df549dfaffc3688db13@changeid Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.8.I407b977f9508573103491df549dfaffc3688db13@changeid
2024-05-15drm/panel: boe-tv101wum-nl6: Don't use a table for initting panelsDouglas Anderson1-1350/+1442
Consensus on the mailing lists is that panels shouldn't use a table of init commands but should instead use init functions. With the recently introduced mipi_dsi_dcs_write_seq_multi() this is not only clean/easy but also saves space. Measuring before/after this change: $ scripts/bloat-o-meter \ .../before/panel-boe-tv101wum-nl6.ko \ .../after/panel-boe-tv101wum-nl6.ko add/remove: 14/8 grow/shrink: 0/1 up/down: 27062/-31433 (-4371) Function old new delta inx_hj110iz_init - 7040 +7040 boe_tv110c9m_init - 6440 +6440 boe_init - 5916 +5916 starry_qfh032011_53g_init - 1944 +1944 starry_himax83102_j02_init - 1228 +1228 inx_hj110iz_init.d - 1040 +1040 boe_tv110c9m_init.d - 982 +982 auo_b101uan08_3_init - 944 +944 boe_init.d - 580 +580 starry_himax83102_j02_init.d - 512 +512 starry_qfh032011_53g_init.d - 180 +180 auo_kd101n80_45na_init - 172 +172 auo_b101uan08_3_init.d - 82 +82 auo_kd101n80_45na_init.d - 2 +2 auo_kd101n80_45na_init_cmd 144 - -144 boe_panel_prepare 592 440 -152 auo_b101uan08_3_init_cmd 1056 - -1056 starry_himax83102_j02_init_cmd 1392 - -1392 starry_qfh032011_53g_init_cmd 2256 - -2256 .compoundliteral 3393 - -3393 boe_init_cmd 7008 - -7008 boe_tv110c9m_init_cmd 7656 - -7656 inx_hj110iz_init_cmd 8376 - -8376 Total: Before=37297, After=32926, chg -11.72% Let's do the conversion. Since we're touching all the tables, let's also convert hex numbers to lower case as per kernel conventions. Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20240514102056.v5.7.Ib5030ab5cd41b4e08b1958bd7e51571725723008@changeid Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.7.Ib5030ab5cd41b4e08b1958bd7e51571725723008@changeid
2024-05-15drm/panel: novatek-nt36672e: Switch to mipi_dsi_dcs_write_seq_multi()Douglas Anderson1-287/+289
This is a mechanical conversion of the novatek-nt36672e driver to use the new mipi_dsi_dcs_write_seq_multi(). The new function is easier for clients to understand and using it also causes smaller code to be generated. Specifically: $ scripts/bloat-o-meter \ ...after/panel-novatek-nt36672e.ko \ ...ctx/panel-novatek-nt36672e.ko add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-988 (-988) Function old new delta nt36672e_1080x2408_60hz_init 6236 5248 -988 Total: Before=10651, After=9663, chg -9.28% Cc: Ritesh Kumar <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20240514102056.v5.6.I3c08a7d02c467d2bc88da14e513ea4c8649fce45@changeid Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.6.I3c08a7d02c467d2bc88da14e513ea4c8649fce45@changeid
2024-05-15drm/mipi-dsi: Introduce mipi_dsi_*_write_seq_multi()Douglas Anderson1-0/+56
The current mipi_dsi_*_write_seq() macros are non-intutitive because they contain a hidden "return" statement that will return out of the _caller_ of the macro. Let's mark them as deprecated and instead introduce some new macros that are more intuitive. These new macros are less optimal when an error occurs but should behave more optimally when there is no error. Specifically these new macros cause smaller code to get generated and the code size savings (less to fetch from RAM, less cache space used, less RAM used) are important. Since the error case isn't something we need to optimize for and these new macros are easier to understand and more flexible, they should be used. After converting to use these new functions, one example shows some nice savings while also being easier to understand. $ scripts/bloat-o-meter \ ...after/panel-novatek-nt36672e.ko \ ...ctx/panel-novatek-nt36672e.ko add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-988 (-988) Function old new delta nt36672e_1080x2408_60hz_init 6236 5248 -988 Total: Before=10651, After=9663, chg -9.28% Reviewed-by: Neil Armstrong <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20240514102056.v5.5.Ie94246c30fe95101e0e26dd5f96e976dbeb8f242@changeid Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.5.Ie94246c30fe95101e0e26dd5f96e976dbeb8f242@changeid
2024-05-15drm/mipi-dsi: Reduce driver bloat of mipi_dsi_*_write_seq()Douglas Anderson1-0/+56
Through a cooperative effort between Hsin-Yi Wang and Dmitry Baryshkov, we have realized the dev_err() in the mipi_dsi_*_write_seq() macros was causing quite a bit of bloat to the kernel. Let's hoist this call into drm_mipi_dsi.c by adding a "chatty" version of the functions that includes the print. While doing this, add a bit more comments to these macros making it clear that they print errors and also that they return out of _the caller's_ function. Without any changes to clients this gives a nice savings. Specifically the macro was inlined and thus the error report call was inlined into every call to mipi_dsi_dcs_write_seq() and mipi_dsi_generic_write_seq(). By using a call to a "chatty" function, the usage is reduced to one call in the chatty function and a function call at the invoking site. Building with my build system shows one example: $ scripts/bloat-o-meter \ .../before/panel-novatek-nt36672e.ko \ .../after/panel-novatek-nt36672e.ko add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-4404 (-4404) Function old new delta nt36672e_1080x2408_60hz_init 10640 6236 -4404 Total: Before=15055, After=10651, chg -29.25% Note that given the change in location of the print it's harder to include the "cmd" in the printout for mipi_dsi_dcs_write_seq() since, theoretically, someone could call the new chatty function with a zero-size array and it would be illegal to dereference data[0]. There's a printk format to print the whole buffer and this is probably more useful for debugging anyway. Given that we're doing this for mipi_dsi_dcs_write_seq(), let's also print the buffer for mipi_dsi_generic_write_seq() in the error case. It should be noted that the current consensus of DRM folks is that the mipi_dsi_*_write_seq() should be deprecated due to the non-intuitive return behavior. A future patch will formally mark them as deprecated and provide an alternative. Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20240514102056.v5.4.Id15fae80582bc74a0d4f1338987fa375738f45b9@changeid Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.4.Id15fae80582bc74a0d4f1338987fa375738f45b9@changeid
2024-05-15drm/xe/pf: Don't advertise support to enable VFs if not readyMichal Wajdeczko1-0/+11
Even if we have not enabled SR-IOV support using the platform specific has_sriov flag, the hardware may still report SR-IOV capability and the PCI layer may wrongly advertise driver support to enable VFs. Explicitly reset the number of supported VFs to zero to avoid confusion. Applications may read the /sys/bus/pci/devices/.../sriov_totalvfs prior to enabling VFs using the sriov_numvfs to check if such an operation is possible. Signed-off-by: Michal Wajdeczko <[email protected]> Reviewed-by: Piotr Piórkowski <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15Merge tag 'drm-next-2024-05-15' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds1272-55354/+74218
Pull drm updates from Dave Airlie: "This is the main pull request for the drm subsystems for 6.10. In drivers the main thing is a new driver for ARM Mali firmware based GPUs, otherwise there are a lot of changes to amdgpu/xe/i915/msm and scattered changes to everything else. In the core a bunch of headers and Kconfig was refactored, along with the addition of a new panic handler which is meant to provide a user friendly message when a panic happens and graphical display is enabled. New drivers: - panthor: ARM Mali/Immortalis CSF-based GPU driver Core: - add a CONFIG_DRM_WERROR option - make more headers self-contained - grab resv lock in pin/unpin - fix vmap resv locking - EDID/eDP panel matching - Kconfig cleanups - DT sound bindings - Add SIZE_HINTS property for cursor planes - Add struct drm_edid_product_id and helpers. - Use drm device based logging in more drm functions. - drop seq_file.h from a bunch of places - use drm_edid driver conversions dp: - DP Tunnel documentation - MST read sideband cap - Adaptive sync SDP prep work ttm: - improve placement for TTM BOs in idle/busy handling panic: - Fixes for drm-panic, and option to test it. - Add drm panic to simpledrm, mgag200, imx, ast bridge: - improve init ordering - adv7511: allow GPIO pin sharing - tc358775: add tc358675 support panel: - AUO B120XAN01.0 - Samsung s6e3fa7 - BOE NT116WHM-N44 - CMN N116BCA-EA1, - CrystalClear CMT430B19N00 - Startek KD050HDFIA020-C020A - powertip PH128800T006-ZHC01 - Innolux G121X1-L03 - LG sw43408 - Khadas TS050 V2 - EDO RM69380 OLED - CSOT MNB601LS1-1 amdgpu: - HDCP/ODM/RAS fixes - Devcoredump improvements - Expose VCN activity via sysfs - SMY 13.0.x updates - Enable fast updates on DCN 3.1.4 - Add dclk and vclk reporting on additional devices - Add ACA RAS infrastructure - Implement TLB flush fence - EEPROM handling fixes - SMUIO 14.0.2 support - SMU 14.0.1 Updates - SMU 14.0.2 support - Sync page table freeing with TLB flushes - DML2 refactor - DC debug improvements - DCN 3.5.x Updates - GPU reset fixes - HDP fix for second GFX pipe on GC 10.x - Enable secondary GFX pipe on GC 10.3 - Refactor and clean up BACO/BOCO/BAMACO handling - Remove invalid TTM resource start check - UAF fix in VA IOCTL - GPUVM page fault redirection to secondary IH rings for IH 6.x - Initial support for mapping kernel queues via MES - Fix VRAM memory accounting amdkfd: - MQD handling cleanup - Preemption handling fixes for XCDs - TLB flush fix for GC 9.4.2 - Properly clean up workqueue during module unload - Fix memory leak process create failure - Range check CP bad op exception targets to avoid reporting invalid exceptions to userspace - Fix eviction fence handling - Fix leak in GPU memory allocation failure case - DMABuf import handling fix - Enable SQ watchpoint for gfx10 i915: - Adding new DG2 PCI ID - add context hints for GT frequency - enable only one CCS for compute workloads - new workarounds - Fix UAF on destroy against retire race and remove two earlier partial fixes - Limit the reserved VM space to only the platforms that need it - Fix gt reset with GuC submission is disable - Add and use gt_to_guc() wrapper i915/xe display: - Lunar Lake display enabling, including cdclk and other refactors - BIOS/VBT/opregion related refactor - Digital port related refactor/clean-up - Fix 2s boot time regression on DP panel replay init - Remove duplication on audio enable/disable on SDVO and g4x+ DP - Disable AuxCCS framebuffers if built for Xe - Make crtc disable more atomic - Increase DP idle pattern wait timeout to 2ms - Start using container_of_const() for some extra const safety - Fix Jasper Lake boot freeze - Enable MST mode for 128b/132b single-stream sideband - Enable Adaptive Sync SDP Support for DP - Fix MTL supported DP rates - removal of UHBR13.5 - PLL refactoring - Limit eDP MSO pipe only for display version 20 - More display refactor towards independence from i915 dev_priv - Convert i915/xe fbdev to DRM client - More initial work to make display code more independent from i915 xe: - improved error capture - clean up some uAPI leftovers - devcoredump update - Add BMG mocs table - Handle GSCCS ER interrupt - Implement xe2- and GuC workarounds - struct xe_device cleanup - Hwmon updates - Add LRC parsing for more GPU instruction - Increase VM_BIND number of per-ioctl Ops - drm/xe: Add XE_BO_GGTT_INVALIDATE flag - Initial development for SR-IOV support - Add new PCI IDs to DG2 platform - Move userptr over to start using hmm_range_fault msm: - Switched to generating register header files during build process instead of shipping pre-generated headers - Merged DPU and MDP4 format databases. - DP: - Stop using compat string to distinguish DP and eDP cases - Added support for X Elite platform (X1E80100) - Reworked DP aux/audio support - Added SM6350 DP to the bindings - GPU: - a7xx perfcntr reg fixes - MAINTAINERS updates - a750 devcoredump support radeon: - Silence UBSAN warnings related to flexible arrays nouveau: - move some uAPI objects to uapi headers omapdrm: - console fix ast: - add i2c polling qaic: - add debugfs entries exynos: - fix platform_driver .owner - drop cleanup code mediatek: - Use devm_platform_get_and_ioremap_resource() in mtk_hdmi_ddc_probe() - Add GAMMA 12-bit LUT support for MT8188 - Rename mtk_drm_* to mtk_* - Drop driver owner initialization - Correct calculation formula of PHY Timing" * tag 'drm-next-2024-05-15' of https://gitlab.freedesktop.org/drm/kernel: (1477 commits) drm/xe/ads: Use flexible-array drm/xe: Use ordered WQ for G2H handler drm/msm/gen_header: allow skipping the validation drm/msm/a6xx: Cleanup indexed regs const'ness drm/msm: Add devcoredump support for a750 drm/msm: Adjust a7xx GBIF debugbus dumping drm/msm: Update a6xx registers XML drm/msm: Fix imported a750 snapshot header for upstream drm/msm: Import a750 snapshot registers from kgsl MAINTAINERS: Add Konrad Dybcio as a reviewer for the Adreno driver MAINTAINERS: Add a separate entry for Qualcomm Adreno GPU drivers drm/msm/a6xx: Avoid a nullptr dereference when speedbin setting fails drm/msm/adreno: fix CP cycles stat retrieval on a7xx drm/msm/a7xx: allow writing to CP_BV counter selection registers drm: zynqmp_dpsub: Always register bridge Revert "drm/bridge: ti-sn65dsi83: Fix enable error path" drm/fb_dma: Add checks in drm_fb_dma_get_scanout_buffer() drm/fbdev-generic: Do not set physical framebuffer address drm/panthor: Fix the FW reset logic drm/panthor: Make sure we handle 'unknown group state' case properly ...
2024-05-15drm/i915/pciids: don't include RPL-U PCI IDs in RPL-PJani Nikula3-0/+3
It's confusing for INTEL_RPLP_IDS() to include INTEL_RPLU_IDS(). Even if we treat them the same elsewhere, the lists of PCI IDs should not. Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/28fe0910efb93a28c400728af14beff015667f42.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/i915/pciids: remove 12 from INTEL_TGL_IDS()Jani Nikula3-3/+3
Most other PCI ID macros do not encode the gen in the name. Follow suit for TGL. Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/044a5c553dc4564431bbef197d5e2dd085624fc2.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/i915/pciids: remove 11 from INTEL_ICL_IDS()Jani Nikula2-2/+2
Most other PCI ID macros do not encode the gen in the name. Follow suit for ICL. Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/36973674bf333dfdd7cd32ae656754bfa150022b.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/i915/pciids: don't include WHL/CML PCI IDs in CFLJani Nikula1-0/+2
It's confusing for INTEL_CFL_IDS() to include all WHL and CML PCI IDs. Even if we treat them the same in a lot of places, CML is a platform of its own, and the lists of PCI IDs should not conflate them. Largely go by the idea that if a platform has a name, group its PCI IDs together. That said, AML is special, having both KBL and CFL variants. Leave that alone. v2: Also split out WHL not just CML (Rodrigo) Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/7cca91dc78ed2b5982f14e400f03a1704645e475.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/i915/pciids: add INTEL_IVB_IDS()Jani Nikula1-2/+1
Add INTEL_IVB_IDS() to identify all IVBs except IVB Q transcode. Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ed89a25b2c6bce318fe59e883d18b62d9453196b.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/i915/pciids: add INTEL_SNB_IDS()Jani Nikula1-2/+1
Add INTEL_SNB_IDS() to identify all SNBs. Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ffcb2d954ad9bca78ccd39836dc0a3dc7c6c0253.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/i915/pciids: add INTEL_ILK_IDS(), use acronymJani Nikula2-4/+4
Most other PCI ID macros use platform acronyms. Follow suit for ILK. Add INTEL_ILK_IDS() to identify all ILKs. Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/27ada56363cfa6a5b093cb31908a4b89aa912621.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/i915/pciids: add INTEL_PNV_IDS(), use acronymJani Nikula2-4/+3
Most other PCI ID macros use platform acronyms. Follow suit for PNV. Add INTEL_PNV_IDS() to identify all PNVs. Cc: Bjorn Helgaas <[email protected]> Cc: [email protected] Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/5f9b34a2cd388244be03263a5147776bfe64d5ac.1715340032.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-15drm/xe: Only zap PTEs as neededMatthew Brost1-1/+2
If PTEs are already invalidated no need to invalidate again. Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: Himal Prasad Ghimiray <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/fbdev-shmem: Clean up deferred I/OThomas Zimmermann1-0/+1
Call fb_deferred_io_cleanup() upon destroying the framebuffer device. Releases the internal memory. Signed-off-by: Thomas Zimmermann <[email protected]> Fixes: 150f431a0831 ("drm/fbdev: Add fbdev-shmem") Cc: Thomas Zimmermann <[email protected]> Cc: Javier Martinez Canillas <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Reviewed-by: Javier Martinez Canillas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/fbdev-dma: Clean up deferred I/OThomas Zimmermann1-0/+1
Call fb_deferred_io_cleanup() upon destroying the framebuffer device. Releases the internal memory. Signed-off-by: Thomas Zimmermann <[email protected]> Fixes: 808a40b69468 ("drm/fbdev-dma: Implement damage handling and deferred I/O") Cc: Thomas Zimmermann <[email protected]> Cc: Javier Martinez Canillas <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-15drm/i915: Handle SKL+ WM/DDB registers next to all other plane registersVille Syrjälä5-98/+107
Having the plane WM/DDB regitster write functions in skl_watermarks.c is rather annoying when trying to implement DSB based plane updates. Move them into the respective files that handle all other plane register writes. Less places where I need to worry about the DSB vs. MMIO decisions. The downside is that we spread the wm struct details a bit further afield. But if that becomes too annoying we can probably abstract things a bit more with a few extra functions. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-15drm/i915: Nuke skl_write_wm_level() and skl_ddb_entry_write()Ville Syrjälä1-35/+22
Get rid of skl_ddb_entry_write() and skl_write_wm_level() and just call intel_de_write_fw() directly. This is prep work towards DSB based plane updates where these wrappers are more of a hinderance. Done with cocci mostly: @@ expression D, R, L; @@ - skl_write_wm_level(D, R, L) + intel_de_write_fw(D, R, skl_plane_wm_reg_val(L)) @@ expression D, R, B; @@ - skl_ddb_entry_write(D, R, B) + intel_de_write_fw(D, R, skl_plane_ddb_reg_val(B)) Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-15drm/i915: Extract skl_plane_{wm,ddb}_reg_val()Ville Syrjälä1-10/+19
Extract helpers to calculate the final wm/ddb register values for skl+. Will allow me to more cleanly remove the register write wrappers for these registers. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-15drm/i915: Refactor skl+ plane register offset calculationsVille Syrjälä1-92/+93
Currently every skl+ plane register defines some intermediate macros to calculate the final register offset. Pull all of that into common macros, simplifying the final register offset stuff into just five defines: - raw register offsets for the planes 1 and 2 on pipes A and B - the final parametrized macro v2: Rebase Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-15drm/i915: Drop a few unwanted tabs from skl+ plane reg definesVille Syrjälä1-3/+3
A few extra tabs have snuck into the skl+ plane register bit definitions. Remove them. v2: Rebase Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]